On 03/23/2010 06:39 PM, Michael Schnell wrote: >>> With 16 bit flash configurations I suppose the Avalon bus will do four Word >>> reads instead of a single one >>> > Supposedly it will do two Word reads, of course, still resulting in the same > problem. > Hi Michael,
The write cycle of the avalon bus controller is correct. Just the read cycle (8 bits or 16 bits) caused problem with toggle status checking. There is no problem with Intel flash, because the busy checking is different. In u-boot, there are nios2 specific flash drivers (board/altera/common/flash.c and AMDLV065D.c) to handle status polling for amd flash. But they didn't use the cfi info to detect flash parameters. You have to define them for each board. I have tested 8 bits/16 bits amd flash and 16 bits intel flash on four altera dev boards without problem. - Thomas _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
