The patch converts the pci5441 board to use the common cfi flash
driver.
The addressing of devices is changed to virtual address.
Signed-off-by: Thomas Chou <tho...@wytron.com.tw>
---
board/psyent/pci5441/Makefile | 2 +-
board/psyent/pci5441/config.mk | 2 +-
board/psyent/pci5441/u-boot.lds | 1 +
include/configs/PCI5441.h | 44 +++++++++++++++++++++++---------------
4 files changed, 30 insertions(+), 19 deletions(-)
diff --git a/board/psyent/pci5441/Makefile b/board/psyent/pci5441/Makefile
index 301b4a0..18f2f55 100644
--- a/board/psyent/pci5441/Makefile
+++ b/board/psyent/pci5441/Makefile
@@ -28,7 +28,7 @@ endif
LIB = $(obj)lib$(BOARD).a
-COMOBJS := ../common/AMDLV065D.o
+COMOBJS :=
COBJS := $(BOARD).o $(COMOBJS)
diff --git a/board/psyent/pci5441/config.mk b/board/psyent/pci5441/config.mk
index d72bcee..9c67ec3 100644
--- a/board/psyent/pci5441/config.mk
+++ b/board/psyent/pci5441/config.mk
@@ -21,7 +21,7 @@
# MA 02111-1307 USA
#
-TEXT_BASE = 0x018e0000
+#TEXT_BASE = 0x018e0000
PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
diff --git a/board/psyent/pci5441/u-boot.lds b/board/psyent/pci5441/u-boot.lds
index b2d88a5..5c26351 100644
--- a/board/psyent/pci5441/u-boot.lds
+++ b/board/psyent/pci5441/u-boot.lds
@@ -28,6 +28,7 @@ ENTRY(_start)
SECTIONS
{
+ . = text_base;
.text :
{
cpu/nios2/start.o (.text)
diff --git a/include/configs/PCI5441.h b/include/configs/PCI5441.h
index 831a60d..d193aa8 100644
--- a/include/configs/PCI5441.h
+++ b/include/configs/PCI5441.h
@@ -24,6 +24,9 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_BOARD_NAME "Psyent PCI5441"
+#define IO_REGION_BASE 0x80000000
+
/*------------------------------------------------------------------------
* BOARD/CPU
*----------------------------------------------------------------------*/
@@ -32,7 +35,7 @@
#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address
*/
#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry
point*/
-#define CONFIG_SYS_NIOS_SYSID_BASE 0x00920828 /* System id address
*/
+#define CONFIG_SYS_NIOS_SYSID_BASE 0x80920828 /* System id address
*/
#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec.
init*/
/*------------------------------------------------------------------------
@@ -47,7 +50,7 @@
/*------------------------------------------------------------------------
* MEMORY BASE ADDRESSES
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr
*/
+#define CONFIG_SYS_FLASH_BASE 0x80000000 /* FLASH base addr
*/
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte
*/
#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr
*/
#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte
*/
@@ -59,23 +62,28 @@
* -Global data is placed below the heap.
* -The stack is placed below global data (&grows down).
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN (128 * 1024) /* Reserve 128k
*/
+#define CONFIG_SYS_TEXT_LEN (128 * 1024) /* Reserve 128k */
+#define CONFIG_SYS_TEXT_BASE 0x018e0000
+#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_RESET_ADDR |
IO_REGION_BASE)
+#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_TEXT_LEN
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size
rsvd*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE -
CONFIG_SYS_MALLOC_LEN)
+#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_TEXT_BASE -
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE -
CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
/*------------------------------------------------------------------------
* FLASH (AM29LV065D)
*----------------------------------------------------------------------*/
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix nios2 flash timing issue in
amd toggle*/
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank
*/
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks
*/
-#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec)
*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec)
*/
-#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size
*/
/*------------------------------------------------------------------------
* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
@@ -93,13 +101,16 @@
* CONSOLE
*----------------------------------------------------------------------*/
#if defined(CONFIG_CONSOLE_JTAG)
-#define CONFIG_SYS_NIOS_CONSOLE 0x00920820 /* JTAG UART base addr
*/
+#define CONFIG_ALTERA_JTAGUART
#else
-#define CONFIG_SYS_NIOS_CONSOLE 0x009208a0 /* UART base addr
*/
+#define CONFIG_ALTERA_UART
#endif
-#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed
*/
-#define CONFIG_BAUDRATE 115200 /* Initial baudrate
*/
+#define CONFIG_SYS_JTAGUART_BASE 0x80920820 /* JTAG UART base addr
*/
+#define CONFIG_SYS_UART_BASE 0x809208a0 /* UART base addr
*/
+
+#define CONFIG_SYS_UART_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_BAUDRATE 115200 /* Initial
baudrate */
#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-)
*/
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console
info*/
@@ -116,11 +127,10 @@
* registers, we can slow it down to 10 msec using TMRCNT. If the default
* period is acceptable, TMRCNT can be left undefined.
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr
*/
-#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num
*/
-#define CONFIG_SYS_NIOS_TMRMS 10 /* 10 msec per tick
*/
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_NIOS_TMRMS *
(CONFIG_SYS_CLK_FREQ/1000))
-#define CONFIG_SYS_HZ
(CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1))
+#define CONFIG_SYS_TIMER_BASE 0x80920860 /* Tick timer base addr
*/
+#define CONFIG_SYS_TIMER_IRQ 3 /* Timer IRQ num
*/
+#define CONFIG_SYS_TIMER_FREQ CONFIG_SYS_CLK_FREQ /* Timer input
freq */
+#define CONFIG_SYS_HZ 1000 /* should be 1000 for
flash timing */
/*
--
1.6.6.1
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