-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 Hi Simon,
On 18.12.2015 23:41, Simon Glass wrote: > Hi Mateusz, > > On 16 December 2015 at 15:46, Mateusz Kulikowski > <mateusz.kulikow...@gmail.com> wrote: [...] >> I'm not sure if I can do that - I can test it, perhaps it will even work on >> my board, but it was put explicitly in Linux driver (1-5ms delay). >> >> Documentation says: >> "SW should wait until bit 0 (MCLK_REG_WR_ACTIVE) of MCI_STATUS2 register >> is 0, after writing to MCI_POWER register and before accessing this >> register again." >> >> But this applies to all writes, not to reset request - I'm not sure >> how MCI_STATUS2 will behave during reset (it may get zeroed earlier). >> >> Do you really think I should try to decrease this delay? > > Can you change the code to wait until bit 0 is 0, instead of having a delay? This seems to work - at least on my board so will do it that way - thanks :) Regards, Mateusz -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJWdT3MAAoJELvtohmVtQzBjRUIAIwoq7nv3Ed/WrDi+azQscUD RvZe8KGFGy0VOVbrV4iMYmG6SJzN9cxrA4q1oGVsUWZyh1uHuDMlhdPLqaW6EIC5 wQFeY2zWffNKJlx1MGhJKwKB+plYXWzEp6LDYIgB+LaTOUCPZOsnxJvac6bDvXF/ FLR3AXGMzHL1nrty/7MToNB2AtRynBxwEPRmyu5e1aNd9rfq+CrkyIqcsQ9M7VQz y1UbJCUWDcwKKIDLUMfM9z67xx7O436M1fDSL1ELxuxI8C2UtdiycFu/uKm3XP+o Nt871BEKLwK5WnkuFERZaXd8kbUYq+j1iOlt+oL7pTOY8+8IBQABnHf3YT1TCUo= =0ZkP -----END PGP SIGNATURE----- _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
