Ok renaming it worked and I could extract the petalinux bsp. Thanks for the 
hint.
The dts I found is very similar to the one we use successfully in the mainline 
Linux Kernel. There SPI + SPI Flash are working.

However, I think (please correct me if I am wrong) the petalinux u-boot config 
does not use driver model + dts.
I think the previous method does not work anymore in mainline u-boot as the spi 
driver has already been ported.
If I do not use these defines:
# define CONFIG_DM
# define CONFIG_DM_SPI
# define CONFIG_OF_SPI

I'l get a compilation error.
So I think it would be a good change to test the u-boot driver model with the 
Xilinx SPI driver. I am happy to play the guinea pic ;-)

I think currently it is something with the u-boot dts parsing as none of the 
functions provided by xilinx_spi.c are called.
I attached the currently used u-boot configuration + u-boot dts.





> -----Original Message-----
> From: Michal Simek [mailto:michal.si...@xilinx.com]
> Sent: Dienstag, 27. Oktober 2015 12:37
> To: Hoefle Marco <marco.hoe...@nanotronic.ch>; Michal Simek
> <michal.si...@xilinx.com>; Jagan Teki <jt...@openedev.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] u-boot device model SPI + SPI Flash
> 
> On 10/27/2015 12:12 PM, Hoefle Marco wrote:
> >
> >
> >> -----Original Message-----
> >> From: Michal Simek [mailto:michal.si...@xilinx.com]
> >> Sent: Montag, 26. Oktober 2015 14:52
> >> To: Jagan Teki <jt...@openedev.com>; Hoefle Marco
> >> <marco.hoe...@nanotronic.ch>; Michal Simek
> <michal.si...@xilinx.com>
> >> Cc: u-boot@lists.denx.de
> >> Subject: Re: [U-Boot] u-boot device model SPI + SPI Flash
> >>
> >> On 10/23/2015 12:20 PM, Jagan Teki wrote:
> >>> On 23 October 2015 at 15:42, Hoefle Marco
> >>> <marco.hoe...@nanotronic.ch>
> >> wrote:
> >>>> Maybe somebody has a valid u-boot dts file for a microblaze system
> >>>> with
> >> an SPI core? That would helpful.
> >>>> We want to move from a parallel nor flash to a SPI flash for FPGA
> >>>> config,
> >> u-boot, Linux Kernel and rootfs.
> >>>> The last missing part is u-boot. The kernel dts file is ok and the
> >>>> mtd
> >> partitions are set up correctly.
> >>>
> >>> I even grepped on linux/arch/microblaze couldn't get much info, So
> >>> added Michal he well aware of this may be he can help.
> >>
> >>
> >>
> http://www.xilinx.com/support/download/index.html/content/xilinx/en/d
> >> o wnloadNav/embedded-design-tools/2015-2.html
> >>
> >> ac701 bsp and I expect also Kc705.
> >
> > I downloaded the AC701 bsp file but it is not a valid archive. Do I need to
> use  (and learn how to use) the 3 GB pertalinux tools to build u-boot for
> Microblaze?
> > The u-boot config for the AC701 and the dts file would probably sufficient.
> 
> it is tar.gz just rename it.
> 
> Thanks,
> Michal
 

/*
 * (C) Copyright 2007-2010 Michal Simek
 *
 * Michal SIMEK <mon...@monstr.eu>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include "../board/xilinx/microblaze-generic/xparameters.h"

/* MicroBlaze CPU */
#define	MICROBLAZE_V5		1

/* linear and spi flash memory */
#ifdef XILINX_FLASH_START
#define	FLASH
#undef	SPIFLASH
#undef	RAMENV	/* hold environment in flash */
#else
#ifdef XILINX_SPI_FLASH_BASEADDR
#undef	FLASH
#define	SPIFLASH
#undef	RAMENV	/* hold environment in flash */
#else
#undef	FLASH
#undef	SPIFLASH
#define	RAMENV	/* hold environment in RAM */
#endif
#endif

/* uart */
#ifdef XILINX_UARTLITE_BASEADDR
# define CONFIG_XILINX_UARTLITE
# define CONFIG_SERIAL_BASE	XILINX_UARTLITE_BASEADDR
# define CONFIG_BAUDRATE	XILINX_UARTLITE_BAUDRATE
# define CONFIG_SYS_BAUDRATE_TABLE	{ CONFIG_BAUDRATE }
# define CONSOLE_ARG	"console=console=ttyUL0,115200\0"
#elif XILINX_UART16550_BASEADDR
# define CONFIG_SYS_NS16550		1
# define CONFIG_SYS_NS16550_SERIAL
# if defined(__MICROBLAZEEL__)
#  define CONFIG_SYS_NS16550_REG_SIZE	-4
# else
#  define CONFIG_SYS_NS16550_REG_SIZE	4
# endif
# define CONFIG_CONS_INDEX		1
# define CONFIG_SYS_NS16550_COM1 \
		((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
# define CONFIG_SYS_NS16550_CLK	XILINX_UART16550_CLOCK_HZ
# define CONFIG_BAUDRATE	115200

/* The following table includes the supported baudrates */
# define CONFIG_SYS_BAUDRATE_TABLE \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
# define CONSOLE_ARG	"console=console=ttyS0,115200\0"
#else
# error Undefined uart
#endif

/* setting reset address */
/*#define	CONFIG_SYS_RESET_ADDRESS	CONFIG_SYS_TEXT_BASE*/

/* ethernet */
#undef CONFIG_SYS_ENET
#if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
# define CONFIG_XILINX_EMACLITE	1
# define CONFIG_SYS_ENET
#endif
#if defined(XILINX_LLTEMAC_BASEADDR)
# define CONFIG_XILINX_LL_TEMAC	1
# define CONFIG_SYS_ENET
#endif
#if defined(XILINX_AXIEMAC_BASEADDR)
# define CONFIG_XILINX_AXIEMAC	1
# define CONFIG_SYS_ENET
#endif

#undef ET_DEBUG

/* gpio */
#ifdef XILINX_GPIO_BASEADDR
# define CONFIG_XILINX_GPIO
# define CONFIG_SYS_GPIO_0_ADDR		XILINX_GPIO_BASEADDR
#endif

/* interrupt controller */
#ifdef XILINX_INTC_BASEADDR
# define CONFIG_SYS_INTC_0_ADDR		XILINX_INTC_BASEADDR
# define CONFIG_SYS_INTC_0_NUM		XILINX_INTC_NUM_INTR_INPUTS
#endif

/* timer */
#if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
#  define CONFIG_SYS_TIMER_0_ADDR	XILINX_TIMER_BASEADDR
#  define CONFIG_SYS_TIMER_0_IRQ	XILINX_TIMER_IRQ
#endif

/* watchdog */
#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
# define CONFIG_WATCHDOG_BASEADDR	XILINX_WATCHDOG_BASEADDR
# define CONFIG_WATCHDOG_IRQ		XILINX_WATCHDOG_IRQ
# define CONFIG_HW_WATCHDOG
# define CONFIG_XILINX_TB_WATCHDOG
#endif

#ifndef CONFIG_OF_CONTROL
/* ddr sdram - main memory */
# define CONFIG_SYS_SDRAM_BASE	XILINX_RAM_START
# define CONFIG_SYS_SDRAM_SIZE	XILINX_RAM_SIZE
#endif

#define CONFIG_SYS_MALLOC_LEN	0xC0000
#ifndef CONFIG_SPL_BUILD
# define CONFIG_SYS_MALLOC_F_LEN	1024
#else
# define CONFIG_SYS_MALLOC_SIMPLE
# define CONFIG_SYS_MALLOC_F_LEN	0x150
#endif

/* Stack location before relocation */
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_TEXT_BASE

/*
 * CFI flash memory layout - Example
 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000;	  8MB
 *
 * SECT_SIZE = 0x20000;			128kB is one sector
 * CONFIG_ENV_SIZE = SECT_SIZE;		128kB environment store
 *
 * 0x2200_0000	CONFIG_SYS_FLASH_BASE
 *					FREE		256kB
 * 0x2204_0000	CONFIG_ENV_ADDR
 *					ENV_AREA	128kB
 * 0x2206_0000
 *					FREE
 * 0x2280_0000	CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
 *
 */

#ifdef FLASH
# define CONFIG_SYS_FLASH_BASE		XILINX_FLASH_START
# define CONFIG_SYS_FLASH_SIZE		XILINX_FLASH_SIZE
# define CONFIG_SYS_FLASH_CFI		1
# define CONFIG_FLASH_CFI_DRIVER	1
/* ?empty sector */
# define CONFIG_SYS_FLASH_EMPTY_INFO	1
/* max number of memory banks */
# define CONFIG_SYS_MAX_FLASH_BANKS	1
/* max number of sectors on one chip */
# define CONFIG_SYS_MAX_FLASH_SECT	512
/* hardware flash protection */
# define CONFIG_SYS_FLASH_PROTECTION
/* use buffered writes (20x faster) */
# define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
# ifdef	RAMENV
#  define CONFIG_ENV_IS_NOWHERE	1
#  define CONFIG_ENV_SIZE	0x1000
#  define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)

# else	/* FLASH && !RAMENV */
#  define CONFIG_ENV_IS_IN_FLASH	1
/* 128K(one sector) for env */
#  define CONFIG_ENV_SECT_SIZE	0x20000
#  define CONFIG_ENV_ADDR \
			(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
#  define CONFIG_ENV_SIZE	0x20000
# endif /* FLASH && !RAMBOOT */
#else /* !FLASH */
#ifdef SPIFLASH
# define CONFIG_SYS_NO_FLASH		1
# undef CONFIG_CMD_IMLS
# define CONFIG_CMD_SPI
# define CONFIG_CMD_SF_TEST
# define CONFIG_DM
# define CONFIG_DM_SPI
# define CONFIG_OF_SPI
# define CONFIG_SPI_FLASH
# define CONFIG_SYS_SPI_BASE		XILINX_SPI_FLASH_BASEADDR
# define CONFIG_XILINX_SPI		1
# define CONFIG_SPI			1
#define CONFIG_CMD_DM 1
# define CONFIG_SF_DUAL_FLASH
# define CONFIG_SYS_MAX_FLASH_BANKS	1
# define CONFIG_SYS_MAX_FLASH_SECT	512
//# define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
//# define CONFIG_SF_DEFAULT_SPEED	XILINX_SPI_FLASH_MAX_FREQ
//# define CONFIG_SF_DEFAULT_CS		XILINX_SPI_FLASH_CS

# ifdef	RAMENV
#  define CONFIG_ENV_IS_NOWHERE	1
#  define CONFIG_ENV_SIZE	0x1000
#  define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)

# else	/* SPIFLASH && !RAMENV */
#  define CONFIG_ENV_IS_IN_SPI_FLASH	1
#  define CONFIG_ENV_SPI_MODE		SPI_MODE_3
#  define CONFIG_ENV_SPI_MAX_HZ		50000000
#  define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
/* 128K(two sectors) for env */
#  define CONFIG_ENV_SECT_SIZE	0x10000
#  define CONFIG_ENV_SIZE	(2 * CONFIG_ENV_SECT_SIZE)
/* Warning: adjust the offset in respect of other flash content and size */
#  define CONFIG_ENV_OFFSET	(128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
# endif /* SPIFLASH && !RAMBOOT */
#else /* !SPIFLASH */

/* ENV in RAM */
# define CONFIG_SYS_NO_FLASH	1
# define CONFIG_ENV_IS_NOWHERE	1
# define CONFIG_ENV_SIZE	0x1000
# define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
#endif /* !SPIFLASH */
#endif /* !FLASH */


/* system ace */
#ifdef XILINX_SYSACE_BASEADDR
# define CONFIG_SYSTEMACE
/* #define DEBUG_SYSTEMACE */
# define SYSTEMACE_CONFIG_FPGA
# define CONFIG_SYS_SYSTEMACE_BASE	XILINX_SYSACE_BASEADDR
# define CONFIG_SYS_SYSTEMACE_WIDTH	XILINX_SYSACE_MEM_WIDTH
# define CONFIG_DOS_PARTITION
#endif

#if defined(XILINX_USE_ICACHE)
# define CONFIG_ICACHE
#else
# undef CONFIG_ICACHE
#endif

#if defined(XILINX_USE_DCACHE)
# define CONFIG_DCACHE
#else
# undef CONFIG_DCACHE
#endif

#ifndef XILINX_DCACHE_BYTE_SIZE
#define XILINX_DCACHE_BYTE_SIZE	32768
#endif

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_MFSL
//#define CONFIG_CMD_GPIO

#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
# define CONFIG_CMD_CACHE
#else
# undef CONFIG_CMD_CACHE
#endif

#ifdef CONFIG_SYS_ENET
# define CONFIG_CMD_PING
# define CONFIG_CMD_DHCP
# define CONFIG_CMD_TFTPPUT
#endif

#if defined(CONFIG_SYSTEMACE)
# define CONFIG_CMD_EXT2
# define CONFIG_CMD_FAT
#endif

#if defined(FLASH)
# define CONFIG_CMD_JFFS2
# define CONFIG_CMD_UBI
# undef CONFIG_CMD_UBIFS

# if !defined(RAMENV)
#  define CONFIG_CMD_SAVES
# endif

#else
#if defined(SPIFLASH)
# define CONFIG_CMD_SF

# if !defined(RAMENV)
#  define CONFIG_CMD_SAVES
# endif
#else
# undef CONFIG_CMD_JFFS2
# undef CONFIG_CMD_UBI
# undef CONFIG_CMD_UBIFS
#endif
#endif

#if defined(CONFIG_CMD_JFFS2)
# define CONFIG_MTD_PARTITIONS
#endif

#if defined(CONFIG_CMD_UBIFS)
# define CONFIG_CMD_UBI
# define CONFIG_LZO
#endif

#if defined(CONFIG_CMD_UBI)
# define CONFIG_MTD_PARTITIONS
# define CONFIG_RBTREE
#endif

#if defined(CONFIG_MTD_PARTITIONS)
/* MTD partitions */
#define CONFIG_CMD_MTDPARTS	/* mtdparts command line support */
#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
#define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT		"nor0=flash-0"

/* default mtd partition table */
#define MTDPARTS_DEFAULT	"mtdparts=flash-0:256k(u-boot),"\
				"256k(env),3m(kernel),1m(romfs),"\
				"1m(cramfs),-(jffs2)"
#endif

/* Miscellaneous configurable options */
#define	CONFIG_SYS_PROMPT	"U-Boot> "
/* size of console buffer */
#define	CONFIG_SYS_CBSIZE	512
 /* print buffer size */
#define	CONFIG_SYS_PBSIZE \
		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* max number of command args */
#define	CONFIG_SYS_MAXARGS	15
#define	CONFIG_SYS_LONGHELP
/* default load address */
#define	CONFIG_SYS_LOAD_ADDR	XILINX_RAM_START

#define	CONFIG_BOOTDELAY	-1	/* -1 disables auto-boot */
#define	CONFIG_BOOTARGS		"root=romfs"
#define	CONFIG_HOSTNAME		XILINX_BOARD_NAME
#define	CONFIG_BOOTCOMMAND	"base 0;tftp 11000000 image.img;bootm"
#define	CONFIG_IPADDR		192.168.0.3
#define	CONFIG_SERVERIP		192.168.0.5
#define	CONFIG_GATEWAYIP	192.168.0.1

/* architecture dependent code */
#define	CONFIG_SYS_USR_EXCEP	/* user exception */

#define	CONFIG_PREBOOT	"echo U-BOOT for ${hostname};setenv preboot;echo"

#define	CONFIG_EXTRA_ENV_SETTINGS	"unlock=yes\0" \
					"nor0=flash-0\0"\
					"mtdparts=mtdparts=flash-0:"\
					"256k(u-boot),256k(env),3m(kernel),"\
					"1m(romfs),1m(cramfs),-(jffs2)\0"\
					"nc=setenv stdout nc;"\
					"setenv stdin nc\0" \
					"serial=setenv stdout serial;"\
					"setenv stdin serial\0"\
					"ethaddr=00:0A:35:02:C7:19\0"

#define CONFIG_CMDLINE_EDITING

#define CONFIG_NETCONSOLE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV

/* Use the HUSH parser */
#define CONFIG_SYS_HUSH_PARSER

/* Enable flat device tree support */
#define CONFIG_LMB		1
#define CONFIG_FIT		1
#define CONFIG_OF_LIBFDT	1

#if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) || defined(CONFIG_XILINX_EMACLITE)
# define CONFIG_MII		1
# define CONFIG_CMD_MII		1
# define CONFIG_PHY_GIGE	1
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	1
# define CONFIG_PHYLIB		1
# define CONFIG_PHY_ATHEROS	1
# define CONFIG_PHY_BROADCOM	1
# define CONFIG_PHY_DAVICOM	1
# define CONFIG_PHY_LXT		1
# define CONFIG_PHY_MARVELL	1
# define CONFIG_PHY_MICREL	1
# define CONFIG_PHY_NATSEMI	1
# define CONFIG_PHY_REALTEK	1
# define CONFIG_PHY_VITESSE	1
#else
# undef CONFIG_MII
# undef CONFIG_CMD_MII
# undef CONFIG_PHYLIB
#endif

/* SPL part */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT

#define CONFIG_SPL_LDSCRIPT	"arch/microblaze/cpu/u-boot-spl.lds"

#define CONFIG_SPL_RAM_DEVICE
#ifdef CONFIG_SYS_FLASH_BASE
# define CONFIG_SPL_NOR_SUPPORT
# define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_FLASH_BASE
#endif

/* for booting directly linux */
#define CONFIG_SPL_OS_BOOT

#define CONFIG_SYS_OS_BASE		(CONFIG_SYS_FLASH_BASE + \
					 0x60000)
#define CONFIG_SYS_FDT_BASE		(CONFIG_SYS_FLASH_BASE + \
					 0x40000)
#define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_TEXT_BASE + \
					 0x1000000)

/* SP location before relocation, must use scratch RAM */
/* BRAM start */
#define CONFIG_SYS_INIT_RAM_ADDR	0x0
/* BRAM size - will be generated */
#define CONFIG_SYS_INIT_RAM_SIZE	0x100000

# define CONFIG_SPL_STACK_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 CONFIG_SYS_MALLOC_F_LEN)

/* Just for sure that there is a space for stack */
#define CONFIG_SPL_STACK_SIZE		0x100

#define CONFIG_SYS_UBOOT_START		CONFIG_SYS_TEXT_BASE

#define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_INIT_RAM_SIZE - \
					 CONFIG_SYS_INIT_RAM_ADDR - \
					 CONFIG_SYS_MALLOC_F_LEN - \
					 CONFIG_SPL_STACK_SIZE)

#endif	/* __CONFIG_H */

Attachment: microblaze-generic_defconfig
Description: microblaze-generic_defconfig

Attachment: microblaze-generic.dts
Description: microblaze-generic.dts

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to