On 08:43 Thu 09 Jul     , Matthias Weisser wrote:
> Hello Jean-Christophe
> 
> >> +int board_init(void)
> >> +{
> >> +  /* arch number of Versatile Board */
> >> +  gd->bd->bi_arch_number = 0      /*MACH_TYPE_GSJADECPU*/;
> > nack
> 
> How to get a arch number? As I don't use Linux on that board
> I don't think I need one. What is the right way to handle 
> such a situation? Dont't set bi_arch_number at all?
you have no plan to support linux?
if not, just do not add it and disable linux boot support
btw please put a comment in the config about it
> 
> >> +#define CCNT_BASE         0xfff42000
> > please move define to proper header
> >> +#define CDEBUG1           0xec
> >> +
> >> +#define DDR2C_BASE                0xf3000000
> >> +#define DRIC                      0x00
> >> +#define DRIC1                     0x02
> >> +#define DRIC2                     0x04
> >> +#define DRCA                      0x06
> >> +#define DRCM                      0x08
> >> +#define DRCST1                    0x0a
> >> +#define DRCST2                    0x0c
> >> +#define DRCR                      0x0e
> >> +#define DRCF                      0x20
> >> +#define DRASR                     0x30
> >> +#define DRIMS                     0x50
> >> +#define DROS                      0x60
> >> +#define DRIBSLI           0x62
> >> +#define DRIBSODT1         0x64
> >> +#define DRIBSOCD          0x66
> >> +#define DRIBSOCD2         0x68
> >> +#define DROABA                    0x70
> >> +#define DROBV                     0x80
> >> +#define DROBS                     0x84
> >> +#define DROBSR1           0x86
> >> +#define DROBSR2           0x88
> >> +#define DROBSR3           0x8a
> >> +#define DROBSR4           0x8c
> >> +#define DRIMR1                    0x90
> >> +#define DRIMR2                    0x92
> >> +#define DRIMR3                    0x94
> >> +#define DRIMR4                    0x96
> >> +#define DROISR1           0x98
> >> +#define DROISR2           0x9a
> > what is this define?
> 
> I will check this and move the needed ones to jade.h
> 
> >> +
> >> +  .macro wait, count
> >> +  mov             r4, #\count
> >> +3:
> >> +  subs    r4, r4, #0x1
> >> +  bne             3b
> >> +
> >> +  .endm
> > please use include/asm-arm/macro.h
> 
> I don't have this file here. Is it currently included in the 
> master branch of u-boot?
yes
> 
> >> +/*
> >> + * Reset CPU by writing SWRSTREQ to CRSR-register
> >> + */
> >> +.globl reset_cpu
> >> +reset_cpu:
> >> +  ldr     r0, =0xfffe7000         /* CRG Base address */
> >> +  ldr     r2, =0x00000002         /* SWRSTREQ */
> >> +  str     r2, [r0, #0x0c]
> >> +
> >> +_loop_forever:
> >> +          b               _loop_forever
> > is it board or soc specific reset?
> 
> Reset is soc specific. I will move it to reset.c in the soc dir.
> Right?
yes please
> 
> > this ram init is board or soc specific?
> 
> RAM init is board specific as the soc could use other RAM 
> configurations on other boards. So I think it should stay here.
> 
> >> +#define CONFIG_SYS_HZ                     1000
> >> +#define CONFIG_JADE_IOCLK         (41500000)
> >> +#define CONFIG_SYS_TIMERBASE      0xfffe0000
> > I guess it's soc specific so please move it to proper header
> 
> For the timer base, yes.
> 
> >> +#define VIDEO_KBD_INIT_FCT                0
> >> +#define VIDEO_TSTC_FCT                    serial_tstc
> >> +#define VIDEO_GETC_FCT                    serial_getc
> > ??
> > why?
> 
> Well, copy + paste from other board. Even if video is stdout/stdin
> serial port is used for input. Better way would be...?
please use device_t in this case
and set via preboot the correct stdout/stderr
you can also consider to add iomux support so you can use both at the sametime

Best Regards,
J.
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