Hi,
>> }
>>
>> unsigned char mmc_board_init(void)
> unsigned char?
> why
in omap3_mmc.c, many functions return the unsigned char.
I don't know why too :(
but if we need it can be changed.
>> + switch (curr_device) {
>> + case 1:
>> + writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 |
>> + PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
>> + &t2_base->pbias_lite);
>>
>> - writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
>> - &t2_base->devconf0);
>> + writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
>> + &t2_base->devconf0);
>> + break;
>> + case 2:
>> + case 3:
>> + writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL,
>> + &t2_base->devconf1);
>> + break;
>> + }
> please only active code when the user activate the mmcx support
>
> how your driver will work it I want to have two mmc support at the sametime??
I announced the patch for mmc command (but not applied yet)
please check it
http://lists.denx.de/pipermail/u-boot/2009-March/049835.html
>> +int mmc_legacy_init(int dev)
>> {
>> + if (mmc_set_dev(dev) != 0)
>> + return 1;
>> +
> btw it will better to move to the new Framework
new Framework is what?
do you mean generic mmc?
>> /*
>> * OMAP HSMMC register definitions
>> */
>> -#define OMAP_HSMMC_BASE 0x4809C000
>> +#define OMAP_HSMMC_BASE_MMC1 0x4809C000
>> +#define OMAP_HSMMC_BASE_MMC2 0x480B4000
>> +#define OMAP_HSMMC_BASE_MMC3 0x480AD000
> it's really a shame that TI does not make it in order and at the same shift
> so we could do this
> #define OMAP_HSMMC_BASE(x) (0x4809C000 + (shift << x))
right but.. I can't find any patterns for OMAP's HSMMC register.
also HSMMC register is defined separately at linux kernel code
(please see arch/arm/plat-omap/include/mach/mmc.h)
Many thanks
Minkyu Kang
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