Re: [RFC PATCH] xen/amd-iommu: Add interrupt remapping quirk for ath11k

2025-03-05 Thread Jan Beulich
On 27.02.2025 19:28, Jason Andryuk wrote: > On 2025-02-27 05:23, Roger Pau Monné wrote: >> On Wed, Feb 26, 2025 at 04:11:25PM -0500, Jason Andryuk wrote: >> All this work on AMD because when interrupt remapping is enabled all >> MSIs are handled by the remapping table, while on Intel there's still

[PATCH 15/16] xen/arm: Save/restore context on suspend/resume

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic The context of CPU general purpose and system control registers has to be saved on suspend and restored on resume. This is implemented in hyp_suspend and before the return from hyp_resume function. The hyp_suspend is invoked just before the PSCI system suspend call is issue

Re: [PATCH v2 2/2] xen/arm: mpu: Ensure that the page size is 4KB

2025-03-05 Thread Luca Fancellu
Hi Ayan, > On 4 Mar 2025, at 17:57, Ayan Kumar Halder wrote: > > Similar to commit (d736b6eb451b, "xen/arm: mpu: Define Xen start address for > MPU systems"), one needs to add a build assertion to ensure that the page size > is 4KB on arm32 based systems as well. > The existing build assertion i

[PATCH 16/16] CHANGELOG: Mention Xen suspend/resume to RAM feature on arm64

2025-03-05 Thread Mykola Kvach
Signed-off-by: Mykola Kvach --- CHANGELOG.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 04c21d5bce..489404fc8b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)

Re: [PATCH] xen/public: remove some unused defines from xs_wire.h

2025-03-05 Thread Jan Beulich
On 05.03.2025 10:27, Jürgen Groß wrote: > On 05.03.25 10:14, Jan Beulich wrote: >> On 05.03.2025 09:56, Juergen Gross wrote: >>> xs_wire.h contains some defines XS_WRITE_* which seem to be leftovers >>> from some decades ago. They haven't been used in the Xen tree since at >>> least Xen 2.0 and the

[PATCH 11/16] xen/arm: Implement PSCI system suspend

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic The implementation consists of: -Adding PSCI system suspend call as new PSCI function -Trapping PSCI system_suspend HVC -Implementing PSCI system suspend call (virtual interface that allows guests to suspend themselves), but currently it is only partially implemented, so

[PATCH 14/16] xen/arm: Resume memory management on Xen resume

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic The MMU needs to be enabled in the resume flow before the context can be restored (we need to be able to access the context data by virtual address in order to restore it). The configuration of system registers prior to branching to the routine that sets up the page tables

Re: [PATCH v2 1/2] xen/domain: Annotate struct domain as page aligned

2025-03-05 Thread Jan Beulich
On 04.03.2025 00:29, Andrew Cooper wrote: > struct domain is always a page aligned allocation. Update it's type to > reflect this, so we can safely reuse the lower bits in the pointer for > auxiliary information. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Anthony PER

Re: [PATCH v3] x86/vmx: Rewrite vmx_sync_pir_to_irr() to be more efficient

2025-03-05 Thread Jan Beulich
On 05.03.2025 00:22, Andrew Cooper wrote: > There are two issues. First, pi_test_and_clear_on() pulls the cache-line to > the CPU and dirties it even if there's nothing outstanding, but the final > bitmap_for_each() is O(256) when O(8) would do, and would avoid multiple > atomic updates to the sam

Re: [PATCH v2] x86/msr: expose MSR_FAM10H_MMIO_CONF_BASE on AMD

2025-03-05 Thread Jan Beulich
On 03.03.2025 15:13, Roger Pau Monné wrote: > On Mon, Mar 03, 2025 at 01:41:15PM +, Andrew Cooper wrote: >> On 03/03/2025 9:19 am, Roger Pau Monne wrote: >>> The MMIO_CONF_BASE reports the base of the MCFG range on AMD systems. >>> Currently Linux is unconditionally attempting to read the MSR w

[PATCH v2 2/5] x86/IDT: Make idt_tables[] be per_cpu(idt)

2025-03-05 Thread Andrew Cooper
This can be a plain per_cpu() variable, and __read_mostly seeing as it's allocated once and never touched again. This removes a NR_CPU's sized structure, and improves NUMA locality of access for both the the VT-x and SVM context switch paths. No functional change. Signed-off-by: Andrew Cooper -

Re: [PATCH v8 0/9] remove libxenctrl usage from xenstored

2025-03-05 Thread Juergen Gross
On 25.02.25 12:10, Juergen Gross wrote: Ping? Especially ... On 04.02.25 12:33, Juergen Gross wrote: Xenstored is using libxenctrl for only one purpose: to get information about state of domains. This patch series is removing that dependency by introducing a new stable interface which can be u

Re: [PATCH] xen/public: remove some unused defines from xs_wire.h

2025-03-05 Thread Jan Beulich
On 05.03.2025 09:56, Juergen Gross wrote: > xs_wire.h contains some defines XS_WRITE_* which seem to be leftovers > from some decades ago. They haven't been used in the Xen tree since at > least Xen 2.0 and they make no sense anyway. > > Remove them, as they seem not to be related to any Xen inter

[PATCH 00/16] Suspend to RAM support for Xen on arm64

2025-03-05 Thread Mykola Kvach
This is V1 series from Mirela Simonovic. Ported to 4.16 and with added changes suggested here https://lore.kernel.org/all/CAKPH-NjmaZENb8gT=+fobraycrf01_--6gura2ck9di5wiu...@mail.gmail.com This is V2 series form Mykyta Poturai: https://marc.info/?l=xen-devel&m=166514782207736&w=2 This series intr

Re: [PATCH] docs: fix INTRODUCE description in xenstore.txt

2025-03-05 Thread Andrii Sultanov
Unrelated to the contents of this patch, but talking about docs/misc/xenstore.txt: it also mentions GET/SET_QUOTA calls, but these are not part of the xs_wire.h, and instead can only be used as sub-arguments to CONTROL calls.

Re: [PATCH] docs: fix INTRODUCE description in xenstore.txt

2025-03-05 Thread Jürgen Groß
On 05.03.25 13:13, Andrii Sultanov wrote: Unrelated to the contents of this patch, but talking about docs/misc/xenstore.txt: it also mentions GET/SET_QUOTA calls, but these are not part of the xs_wire.h, and instead can only be used as sub-arguments to CONTROL calls. I have a patch series in

Re: [PATCH v2] x86/msr: expose MSR_FAM10H_MMIO_CONF_BASE on AMD

2025-03-05 Thread Jan Beulich
On 03.03.2025 10:19, Roger Pau Monne wrote: > The MMIO_CONF_BASE reports the base of the MCFG range on AMD systems. > Currently Linux is unconditionally attempting to read the MSR without a > safe MSR accessor, and since Xen doesn't allow access to it Linux reports > the following error: > > unche

[PATCH 04/16] xen/cpu: prevent disable_nonboot_cpus crash on ARM64

2025-03-05 Thread Mykola Kvach
If we call disable_nonboot_cpus on ARM64 with system_state set to SYS_STATE_suspend, the following assertion will be triggered: ``` (XEN) [ 25.582712] Disabling non-boot CPUs ... (XEN) [ 25.587032] Assertion '!in_irq() && (local_irq_is_enabled() || num_online_cpus() <= 1)' failed at common/xm

Re: [PATCH] xen/page_alloc: Simplify domain_adjust_tot_pages

2025-03-05 Thread Jan Beulich
On 27.02.2025 15:36, Alejandro Vallejo wrote: > On Wed Feb 26, 2025 at 2:05 PM GMT, Jan Beulich wrote: >> On 24.02.2025 15:49, Alejandro Vallejo wrote: >>> Open question to whoever reviews this... >>> >>> On Mon Feb 24, 2025 at 1:27 PM GMT, Alejandro Vallejo wrote: spin_lock(&heap_lock);

Re: [PATCH] xen/page_alloc: Simplify domain_adjust_tot_pages

2025-03-05 Thread Jan Beulich
On 27.02.2025 15:50, Alejandro Vallejo wrote: > On Wed Feb 26, 2025 at 2:28 PM GMT, Roger Pau Monné wrote: >> On Wed, Feb 26, 2025 at 03:08:33PM +0100, Jan Beulich wrote: >>> On 26.02.2025 14:56, Roger Pau Monné wrote: On Mon, Feb 24, 2025 at 01:27:24PM +, Alejandro Vallejo wrote: > --

Re: [PATCH] xen/page_alloc: Simplify domain_adjust_tot_pages

2025-03-05 Thread Jan Beulich
On 27.02.2025 15:59, Alejandro Vallejo wrote: > On Wed Feb 26, 2025 at 2:02 PM GMT, Jan Beulich wrote: >> On 24.02.2025 14:27, Alejandro Vallejo wrote: >>> @@ -504,17 +502,16 @@ unsigned long domain_adjust_tot_pages(struct domain >>> *d, long pages) >>> goto out; >>> >>> spin_lock(

[PATCH] xen/public: remove some unused defines from xs_wire.h

2025-03-05 Thread Juergen Gross
xs_wire.h contains some defines XS_WRITE_* which seem to be leftovers from some decades ago. They haven't been used in the Xen tree since at least Xen 2.0 and they make no sense anyway. Remove them, as they seem not to be related to any Xen interface we have today. Signed-off-by: Juergen Gross -

Re: [PATCH v3 1/2] xen/passthrough: Provide stub functions when !HAS_PASSTHROUGH

2025-03-05 Thread Luca Fancellu
Hi Stefano, > On 4 Mar 2025, at 19:22, Stefano Stabellini wrote: > > On Wed, 19 Feb 2025, Jan Beulich wrote: >> On 19.02.2025 16:25, Luca Fancellu wrote: On 19 Feb 2025, at 13:30, Jan Beulich wrote: On 19.02.2025 14:06, Luca Fancellu wrote: >> On 19 Feb 2025, at 12:45, Jan Beulich

Re: [PATCH] xen/public: remove some unused defines from xs_wire.h

2025-03-05 Thread Jürgen Groß
On 05.03.25 10:14, Jan Beulich wrote: On 05.03.2025 09:56, Juergen Gross wrote: xs_wire.h contains some defines XS_WRITE_* which seem to be leftovers from some decades ago. They haven't been used in the Xen tree since at least Xen 2.0 and they make no sense anyway. Remove them, as they seem not

Re: [PATCH v2 2/2] xen/watchdog: Identify which domain watchdog fired

2025-03-05 Thread Jan Beulich
On 04.03.2025 00:29, Andrew Cooper wrote: > --- a/xen/common/sched/core.c > +++ b/xen/common/sched/core.c > @@ -1534,12 +1534,19 @@ long vcpu_yield(void) > > static void cf_check domain_watchdog_timeout(void *data) > { > -struct domain *d = data; > +/* > + * The data parameter encod

[PATCH 05/16] xen/percpu: don't initialize percpu on resume

2025-03-05 Thread Mykola Kvach
Invocation of the CPU_UP_PREPARE notification on ARM64 during resume causes a crash: (XEN) [ 315.807606] Error bringing CPU1 up: -16 (XEN) [ 315.811926] Xen BUG at common/cpu.c:258 [...] (XEN) [ 316.142765] Xen call trace: (XEN) [ 316.146048][<0a202264>] enable_nonboot_cpus+0x128/0

Re: [PATCH] x86/msi: prevent MSI entry re-writes of the same data

2025-03-05 Thread Jan Beulich
On 28.02.2025 12:32, Roger Pau Monne wrote: > @@ -191,8 +193,6 @@ void msi_compose_msg(unsigned vector, const cpumask_t > *cpu_mask, struct msi_msg > > static int write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) > { > -entry->msg = *msg; > - > if ( iommu_intremap != iommu_in

Re: [PATCH] xen/iocap.h: add documentation

2025-03-05 Thread Jan Beulich
On 24.02.2025 12:38, Grygorii Strashko wrote: > Change rangeset parameters to "start, last" as proposed in [1], > and add documentation for public interface. > > No functional changes. > > [1] https://patchwork.kernel.org/comment/26251962/ > Signed-off-by: Grygorii Strashko To be honest, this i

Re: [PATCH v3 0/3] x86/dom0: be less restrictive with the Interrupt Address Range

2025-03-05 Thread Roger Pau Monné
On Wed, Mar 05, 2025 at 03:54:56PM +0100, Jan Beulich wrote: > On 05.03.2025 15:35, Roger Pau Monné wrote: > > On Wed, Mar 05, 2025 at 03:27:18PM +0100, Jan Beulich wrote: > >> On 19.02.2025 17:48, Roger Pau Monne wrote: > >>> Hello, > >>> > >>> First two patches are preparatory changes to reduce t

Re: [PATCH v2 2/5] x86/IDT: Make idt_tables[] be per_cpu(idt)

2025-03-05 Thread Jan Beulich
On 05.03.2025 01:02, Andrew Cooper wrote: > This can be a plain per_cpu() variable, and __read_mostly seeing as it's > allocated once and never touched again. cpu_smpboot_free() certainly touches (really: modifies) it again. Just that ... > @@ -1009,7 +1009,7 @@ static void cpu_smpboot_free(unsig

[PATCH 13/16] xen/arm: Implement PSCI SYSTEM_SUSPEND call (physical interface)

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic PSCI system suspend function shall be invoked to finalize Xen suspend procedure. Resume entry point, which needs to be passed via 1st argument of PSCI system suspend call to the EL3, is hyp_resume. For now, hyp_resume is just a placeholder that will be implemented in assemb

Re: [PATCH] xen/page_alloc: Simplify domain_adjust_tot_pages

2025-03-05 Thread Alejandro Vallejo
On Wed Mar 5, 2025 at 1:39 PM GMT, Jan Beulich wrote: > On 05.03.2025 14:22, Alejandro Vallejo wrote: > > On Wed Mar 5, 2025 at 10:49 AM GMT, Jan Beulich wrote: > >> On 27.02.2025 15:36, Alejandro Vallejo wrote: > >>> On Wed Feb 26, 2025 at 2:05 PM GMT, Jan Beulich wrote: > On 24.02.2025 15:49

Re: [PATCH v4 01/11] x86/HVM: improve CET-IBT pruning of ENDBR

2025-03-05 Thread Jan Beulich
On 05.03.2025 15:47, Andrew Cooper wrote: > On 25/02/2025 11:37 am, Jan Beulich wrote: >> __init{const,data}_cf_clobber can have an effect only for pointers >> actually populated in the respective tables. While not the case for SVM >> right now, VMX installs a number of pointers only under certain

Re: [PATCH v3 08/12] x86/emulator: Refactor FXSAVE_AREA to use wrappers

2025-03-05 Thread Alejandro Vallejo
On Wed Mar 5, 2025 at 3:29 PM GMT, Jan Beulich wrote: > On 10.01.2025 14:28, Alejandro Vallejo wrote: > > --- a/xen/arch/x86/x86_emulate/blk.c > > +++ b/xen/arch/x86/x86_emulate/blk.c > > @@ -11,9 +11,12 @@ > > !defined(X86EMUL_NO_SIMD) > > # ifdef __XEN__ > > # include > > -# define FXSA

Re: [PATCH v3 08/12] x86/emulator: Refactor FXSAVE_AREA to use wrappers

2025-03-05 Thread Jan Beulich
On 05.03.2025 17:16, Alejandro Vallejo wrote: > On Wed Mar 5, 2025 at 3:29 PM GMT, Jan Beulich wrote: >> On 10.01.2025 14:28, Alejandro Vallejo wrote: >>> --- a/xen/arch/x86/x86_emulate/blk.c >>> +++ b/xen/arch/x86/x86_emulate/blk.c >>> @@ -11,9 +11,12 @@ >>> !defined(X86EMUL_NO_SIMD) >>> # i

Re: [PATCH v4 01/11] x86/HVM: improve CET-IBT pruning of ENDBR

2025-03-05 Thread Jan Beulich
On 05.03.2025 16:39, Roger Pau Monné wrote: > On Wed, Mar 05, 2025 at 04:02:51PM +0100, Jan Beulich wrote: >> On 05.03.2025 15:48, Roger Pau Monné wrote: >>> On Tue, Feb 25, 2025 at 12:37:00PM +0100, Jan Beulich wrote: __init{const,data}_cf_clobber can have an effect only for pointers act

Re: [PATCH] x86/msi: prevent MSI entry re-writes of the same data

2025-03-05 Thread Roger Pau Monné
On Wed, Mar 05, 2025 at 11:30:51AM +0100, Jan Beulich wrote: > On 28.02.2025 12:32, Roger Pau Monne wrote: > > @@ -191,8 +193,6 @@ void msi_compose_msg(unsigned vector, const cpumask_t > > *cpu_mask, struct msi_msg > > > > static int write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) >

Re: [PATCH v4 01/11] x86/HVM: improve CET-IBT pruning of ENDBR

2025-03-05 Thread Roger Pau Monné
On Wed, Mar 05, 2025 at 05:23:05PM +0100, Jan Beulich wrote: > On 05.03.2025 16:39, Roger Pau Monné wrote: > > On Wed, Mar 05, 2025 at 04:02:51PM +0100, Jan Beulich wrote: > >> On 05.03.2025 15:48, Roger Pau Monné wrote: > >>> On Tue, Feb 25, 2025 at 12:37:00PM +0100, Jan Beulich wrote: > __in

Re: [PATCH v4] xen/consoled: clean up console handling for PV shim

2025-03-05 Thread Jan Beulich
On 26.02.2025 23:47, dm...@proton.me wrote: > @@ -562,10 +560,9 @@ static void __serial_rx(char c) > rc = vpl011_rx_char_xen(d, c); > #endif > > -#ifdef CONFIG_X86 > -if ( pv_shim && pv_console ) > -consoled_guest_tx(c); > -#endif > +if ( consoled_is_enabled() ) > +

Xen Project Releases Version 4.20

2025-03-05 Thread Oleksii Kurochko
Hello everyone, It's with great pleasure that I announce our 4.20 PR release. I want to thank the whole community for their efforts in getting this release published! *Please find the PR article attached here * Ple

Xen Security Notice 2 (CVE-2024-35347) AMD CPU Microcode Signature Verification Vulnerability

2025-03-05 Thread Andrew Cooper
See: https://bughunters.google.com/blog/5424842357473280/zen-and-the-art-of-microcode-hacking https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7033.html Right now there are four known but (reasonably) benign microcodes from a non-AMD source.  However, there is a tool to sign arbi

Re: [PATCH v2 1/2] x86/vlapic: Fix handling of writes to APIC_ESR

2025-03-05 Thread Jan Beulich
On 03.03.2025 19:53, Andrew Cooper wrote: > Xen currently presents APIC_ESR to guests as a simple read/write register. > > This is incorrect. The SDM states: > > The ESR is a write/read register. Before attempt to read from the ESR, > software should first write to it. (The value written doe

Re: [PATCH 00/16] Suspend to RAM support for Xen on arm64

2025-03-05 Thread Mykola Kvach
On Wed, Mar 5, 2025 at 11:11 AM Mykola Kvach wrote: > > This is V1 series from Mirela Simonovic. Ported to 4.16 and with added changes > suggested here > https://lore.kernel.org/all/CAKPH-NjmaZENb8gT=+fobraycrf01_--6gura2ck9di5wiu...@mail.gmail.com > > This is V2 series form Mykyta Poturai: > http

Re: [PATCH] xen/page_alloc: Simplify domain_adjust_tot_pages

2025-03-05 Thread Alejandro Vallejo
On Wed Mar 5, 2025 at 10:49 AM GMT, Jan Beulich wrote: > On 27.02.2025 15:36, Alejandro Vallejo wrote: > > On Wed Feb 26, 2025 at 2:05 PM GMT, Jan Beulich wrote: > >> On 24.02.2025 15:49, Alejandro Vallejo wrote: > >>> Open question to whoever reviews this... > >>> > >>> On Mon Feb 24, 2025 at 1:27

Re: [PATCH] xen/page_alloc: Simplify domain_adjust_tot_pages

2025-03-05 Thread Jan Beulich
On 05.03.2025 14:22, Alejandro Vallejo wrote: > On Wed Mar 5, 2025 at 10:49 AM GMT, Jan Beulich wrote: >> On 27.02.2025 15:36, Alejandro Vallejo wrote: >>> On Wed Feb 26, 2025 at 2:05 PM GMT, Jan Beulich wrote: On 24.02.2025 15:49, Alejandro Vallejo wrote: > Open question to whoever review

Re: [PATCH] x86/trampoline: Rename entrypoints

2025-03-05 Thread Jan Beulich
On 03.03.2025 23:43, Andrew Cooper wrote: > ... to be more concise, and to match our other entrypoints into Xen. > > In acpi_sleep_prepare(), calculate bootsym_phys() once, which GCC seems > unwilling to of it's own accord. > > No functional change. > > Signed-off-by: Andrew Cooper Acked-by: J

[PATCH] tools/libs/store: use single_with_domid() in xs_get_domain_path()

2025-03-05 Thread Juergen Gross
xs_get_domain_path() can be simplified by using single_with_domid(). Signed-off-by: Juergen Gross --- tools/libs/store/xs.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/tools/libs/store/xs.c b/tools/libs/store/xs.c index e22f99b59f..cf3266807f 100644 --- a/tools/libs/

Re: [PATCH v2 3/5] x86/IDT: Generate bsp_idt[] at build time

2025-03-05 Thread Jan Beulich
On 05.03.2025 01:02, Andrew Cooper wrote: > ... rather than dynamically at boot time. Aside from less runtime overhead, > this approach is less fragile than the preexisting autogen stubs mechanism. > > We can manage this with some linker calculations. See patch comments for full > details. > >

Re: [PATCH v3 0/3] x86/dom0: be less restrictive with the Interrupt Address Range

2025-03-05 Thread Jan Beulich
On 19.02.2025 17:48, Roger Pau Monne wrote: > Hello, > > First two patches are preparatory changes to reduce the changes required > in patch 3. I would have wanted those to go in 4.20 to fix the issues > on Lenovo Thinkpads, but it's too late now. > > Thanks, Roger. > > Roger Pau Monne (3): >

Re: [PATCH v2 2/2] x86/vlapic: Drop vlapic->esr_lock

2025-03-05 Thread Jan Beulich
On 03.03.2025 19:53, Andrew Cooper wrote: > The exact behaviour of LVTERR interrupt generation is implementation > specific. > > * Newer Intel CPUs generate an interrupt when pending_esr becomes >nonzero. > > * Older Intel and all AMD CPUs generate an interrupt when any >individual bit

Re: [XEN PATCH v2 2/3] xen/rt: address violation of MISRA C Rule 8.2

2025-03-05 Thread Jan Beulich
On 25.02.2025 10:38, Nicola Vetrini wrote: > Rule 8.2 states: "Function types shall be in prototype form with > named parameters". > > The parameter name is missing from the function pointer type > that constitutes the first parameter. > > No functional change. > > Signed-off-by: Nicola Vetrini

Re: [PATCH v4 01/11] x86/HVM: improve CET-IBT pruning of ENDBR

2025-03-05 Thread Andrew Cooper
On 25/02/2025 11:37 am, Jan Beulich wrote: > __init{const,data}_cf_clobber can have an effect only for pointers > actually populated in the respective tables. While not the case for SVM > right now, VMX installs a number of pointers only under certain > conditions. Hence the respective functions wo

Re: [PATCH v4 01/11] x86/HVM: improve CET-IBT pruning of ENDBR

2025-03-05 Thread Roger Pau Monné
On Tue, Feb 25, 2025 at 12:37:00PM +0100, Jan Beulich wrote: > __init{const,data}_cf_clobber can have an effect only for pointers > actually populated in the respective tables. While not the case for SVM > right now, VMX installs a number of pointers only under certain > conditions. Hence the respe

Re: [PATCH v3 0/3] x86/dom0: be less restrictive with the Interrupt Address Range

2025-03-05 Thread Jan Beulich
On 05.03.2025 15:35, Roger Pau Monné wrote: > On Wed, Mar 05, 2025 at 03:27:18PM +0100, Jan Beulich wrote: >> On 19.02.2025 17:48, Roger Pau Monne wrote: >>> Hello, >>> >>> First two patches are preparatory changes to reduce the changes required >>> in patch 3. I would have wanted those to go in 4

Re: [PATCH v2 1/2] xen/arm: mpu: Move some of the definitions to common file

2025-03-05 Thread Orzel, Michal
On 05/03/2025 10:37, Ayan Kumar Halder wrote: > Hi Michal > > On 05/03/2025 07:28, Orzel, Michal wrote: >> >> On 04/03/2025 18:57, Ayan Kumar Halder wrote: >>> For AArch32, refer to ARM DDI 0568A.c ID110520. >>> MPU_REGION_SHIFT is same between AArch32 and AArch64 (HPRBAR). >>> Also, NUM_MPU_RE

Re: [PATCH v4 01/11] x86/HVM: improve CET-IBT pruning of ENDBR

2025-03-05 Thread Jan Beulich
On 05.03.2025 15:48, Roger Pau Monné wrote: > On Tue, Feb 25, 2025 at 12:37:00PM +0100, Jan Beulich wrote: >> __init{const,data}_cf_clobber can have an effect only for pointers >> actually populated in the respective tables. While not the case for SVM >> right now, VMX installs a number of pointers

Re: [PATCH v3 08/12] x86/emulator: Refactor FXSAVE_AREA to use wrappers

2025-03-05 Thread Jan Beulich
On 10.01.2025 14:28, Alejandro Vallejo wrote: > --- a/xen/arch/x86/x86_emulate/blk.c > +++ b/xen/arch/x86/x86_emulate/blk.c > @@ -11,9 +11,12 @@ > !defined(X86EMUL_NO_SIMD) > # ifdef __XEN__ > # include > -# define FXSAVE_AREA ((void *)¤t->arch.xsave_area->fpu_sse) > +/* Has a fastpath fo

Re: [RFC PATCH] xen/amd-iommu: Add interrupt remapping quirk for ath11k

2025-03-05 Thread Jan Beulich
On 27.02.2025 17:49, Jason Andryuk wrote: > On 2025-02-27 03:54, Jan Beulich wrote: >> On 26.02.2025 22:11, Jason Andryuk wrote: >>> Signed-off-by: Xenia Ragiadakou >>> Signed-off-by: Jason Andryuk >> >> Just to clarify: Who's the original patch author? The common expectation >> is that the first

Re: [PATCH v8 1/6] xen/README: add compiler and binutils versions for RISCV-64

2025-03-05 Thread Jan Beulich
On 28.02.2025 21:07, Oleksii Kurochko wrote: > Considering that the Zbb extension is supported since GCC version 12 [1] > and that older GCC versions do not support Z extensions in -march (I haven't > faced this issue for GCC >=11.2), leading to compilation failures, > the baseline version for GCC

[PATCH] docs: fix INTRODUCE description in xenstore.txt

2025-03-05 Thread Juergen Gross
The description of the Xenstore INTRODUCE command is still referencing xend. Fix that. While at it, make clear that the Xenstore implementation is allowed to ignore the specified gfn and use the Xenstore reserved grant id GNTTAB_RESERVED_XENSTORE instead. Signed-off-by: Juergen Gross --- docs/m

[PATCH 06/16] xen/arm: Introduce system suspend config option

2025-03-05 Thread Mykola Kvach
From: Mykola Kvach This option enables the system suspend support. This is the mechanism that allows the system to be suspended to RAM and later resumed. Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- xen/arch/arm/Kconfig | 11 +++ 1 file changed, 11 insertions(+) diff

[PATCH 12/16] xen/arm: Trigger Xen suspend when hardware domain completes suspend

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic When hardware domain finalizes its suspend procedure the suspend of Xen is triggered by calling system_suspend(). Hardware domain finalizes the suspend from its boot core (VCPU#0), which could be mapped to any physical CPU, i.e. the system_suspend() function could be execut

[PATCH 03/16] xen/arm: introduce a separate struct for watchdog timers

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic Introduce a separate struct for watchdog timers. It is needed to properly implement the suspend/resume actions for the watchdog timers. To be able to restart watchdog timer after suspend we need to remember their frequency somewhere. To not bloat the struct timer a new stru

[PATCH 01/16] iommu: Add checks before calling iommu suspend/resume

2025-03-05 Thread Mykola Kvach
From: Mykyta Poturai These functions may be unimplemented, so check that they exist before calling to prevent crashes. Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Introduced in patch series V3. --- xen/drivers/passthrough/iommu.c | 4 ++-- 1 file changed, 2 insertions(+), 2

[PATCH 08/16] xen/arm: add watchdog domain suspend/resume helpers

2025-03-05 Thread Mykola Kvach
From: Mykola Kvach This patch implements suspend/resume helpers for the watchdog. While a domain is suspended its watchdogs must be paused. Otherwise, if the domain stays in the suspend state for a longer period of time compared to the watchdog period, the domain would be shutdown on resume. Prop

[PATCH 10/16] xen/arm: Implement GIC suspend/resume functions (gicv2 only)

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic System suspend may lead to a state where GIC would be powered down. Therefore, Xen should save/restore the context of GIC on suspend/resume. Note that the context consists of states of registers which are controlled by the hypervisor. Other GIC registers which are accessibl

[PATCH 07/16] xen/char: implement suspend/resume calls for SCIF driver

2025-03-05 Thread Mykola Kvach
From: Mykola Kvach The changes have been tested only on the Renesas R-Car-H3 Starter Kit board. Signed-off-by: Volodymyr Babchuk Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Mykola Kvach --- xen/drivers/char/scif-uart.c | 31 ++- 1 file changed, 30 insert

Re: [PATCH v2 1/2] xen/arm: mpu: Move some of the definitions to common file

2025-03-05 Thread Ayan Kumar Halder
Hi Michal On 05/03/2025 07:28, Orzel, Michal wrote: On 04/03/2025 18:57, Ayan Kumar Halder wrote: For AArch32, refer to ARM DDI 0568A.c ID110520. MPU_REGION_SHIFT is same between AArch32 and AArch64 (HPRBAR). Also, NUM_MPU_REGIONS_SHIFT is same between AArch32 and AArch64 (HMPUIR). Signed-off

Re: Verbosity during boot

2025-03-05 Thread Jan Beulich
On 27.02.2025 21:38, Andrew Cooper wrote: > I've raised this during review before, but: > >> (XEN) [    1.209230] AMD-Vi: IOMMU Extended Features: >> (XEN) [    1.213998] - Peripheral Page Service Request >> (XEN) [    1.218849] - x2APIC >> (XEN) [    1.221536] - NX bit >> (XEN) [    1.224221] - I

Re: [PATCH v8 2/8] iommu/arm: Introduce iommu_add_dt_pci_sideband_ids API

2025-03-05 Thread Jan Beulich
On 28.02.2025 12:31, Mykyta Poturai wrote: > > > On 26.02.25 12:48, Jan Beulich wrote: >> On 26.02.2025 10:58, Mykyta Poturai wrote: >>> On 10.02.25 12:52, Jan Beulich wrote: On 10.02.2025 11:30, Mykyta Poturai wrote: > --- a/xen/drivers/passthrough/iommu.c > +++ b/xen/drivers/passth

[PATCH 02/16] xen/x86: Move freeze/thaw_domains into common files

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic These functions will be reused by suspend/resume support for ARM. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- xen/arch/x86/acpi/power.c | 29 - xen/common/domai

[PATCH 09/16] xen/arm: add suspend and resume timer helpers

2025-03-05 Thread Mykola Kvach
From: Mirela Simonovic Timer interrupts have to be disabled while the system is in suspend. Otherwise, a timer interrupt would fire and wake-up the system. Suspending the timer interrupts consists of disabling physical EL1 and EL2 timers. The resume consists only of raising timer softirq, which w

Re: [PATCH v3 2/2] xen/arm: Restrict Kconfig configuration for LLC coloring

2025-03-05 Thread Luca Fancellu
Hi Stefano, > On 4 Mar 2025, at 19:20, Stefano Stabellini wrote: > > On Tue, 4 Mar 2025, Luca Fancellu wrote: >> Hi, >> >>> On 18 Feb 2025, at 15:06, Jan Beulich wrote: >>> >>> On 18.02.2025 16:01, Orzel, Michal wrote: On 18/02/2025 14:44, Jan Beulich wrote: > On 18.02.2025 10:51, Lu

Re: [PATCH v3 0/3] x86/dom0: be less restrictive with the Interrupt Address Range

2025-03-05 Thread Roger Pau Monné
On Wed, Mar 05, 2025 at 03:27:18PM +0100, Jan Beulich wrote: > On 19.02.2025 17:48, Roger Pau Monne wrote: > > Hello, > > > > First two patches are preparatory changes to reduce the changes required > > in patch 3. I would have wanted those to go in 4.20 to fix the issues > > on Lenovo Thinkpads,

Re: [PATCH v8 4/6] xen/riscv: make zbb as mandatory

2025-03-05 Thread Jan Beulich
On 28.02.2025 21:07, Oleksii Kurochko wrote: > According to riscv/booting.txt, it is expected that Zbb should be supported. > > Drop ANDN_INSN() in asm/cmpxchg.h as Zbb is mandatory now so `andn` > instruction could be used directly. > > Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich

Re: [PATCH v2 0/5] x86/IDT: Generate the IDT at build time

2025-03-05 Thread Jan Beulich
On 05.03.2025 01:02, Andrew Cooper wrote: > This is a chunk of the FRED work split out because it's pretty self contained. > > It's mostly cleanup/refactoring, although patch > > traps.c is already overly large and going to get larger with FRED, so I'm > splitting traps-setup.c out of it, as the

Re: [PATCH v4 01/11] x86/HVM: improve CET-IBT pruning of ENDBR

2025-03-05 Thread Roger Pau Monné
On Wed, Mar 05, 2025 at 04:02:51PM +0100, Jan Beulich wrote: > On 05.03.2025 15:48, Roger Pau Monné wrote: > > On Tue, Feb 25, 2025 at 12:37:00PM +0100, Jan Beulich wrote: > >> __init{const,data}_cf_clobber can have an effect only for pointers > >> actually populated in the respective tables. While

Ping: [PATCH] x86/ACPI: annotate assembly data with type and size

2025-03-05 Thread Jan Beulich
On 02.10.2024 09:41, Jan Beulich wrote: > Further use the generic framework from xen/linkage.h. While there drop > excess alignment and move to .bss. > > Requested-by: Andrew Cooper > Signed-off-by: Jan Beulich May I please ask for an ack or otherwise? Jan > --- > Of course alongside ASM_INT(

Re: [PATCH v2] xen/console: make console buffer size configurable

2025-03-05 Thread Jan Beulich
On 05.03.2025 02:12, dm...@proton.me wrote: > --- a/docs/misc/xen-command-line.pandoc > +++ b/docs/misc/xen-command-line.pandoc > @@ -425,10 +425,13 @@ The following are examples of correct specifications: > ### conring_size > > `= ` > > -> Default: `conring_size=16k` > +> Default: `conring_siz

Re: [PATCH 01/16] iommu: Add checks before calling iommu suspend/resume

2025-03-05 Thread Jan Beulich
On 05.03.2025 10:11, Mykola Kvach wrote: > --- a/xen/drivers/passthrough/iommu.c > +++ b/xen/drivers/passthrough/iommu.c > @@ -613,7 +613,7 @@ int __init iommu_setup(void) > > int iommu_suspend(void) > { > -if ( iommu_enabled ) > +if ( iommu_enabled && iommu_get_ops() && iommu_get_ops()

Re: [PATCH 02/16] xen/x86: Move freeze/thaw_domains into common files

2025-03-05 Thread Jan Beulich
On 05.03.2025 10:11, Mykola Kvach wrote: > From: Mirela Simonovic > > These functions will be reused by suspend/resume support for ARM. And until then they are going to violate the Misra rule requiring there to not be unreachable code. > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @

Re: [PATCH 0/7] Add support for R-Car Gen4 PCI host controller

2025-03-05 Thread Stefano Stabellini
On Mon, 24 Feb 2025, Mykyta Poturai wrote: > This series adds support for R-Car Gen4 PCI host controller. > > To fully support the controller, the following changes were made: > - Generic mechanism to support PCI child buses is added. > - Private data for PCI host bridge and means to access it are

[PATCH] tools/init-dom0less: Fix cpus > 1 and xenstore entries

2025-03-05 Thread Jason Andryuk
The trailing / in the path is incorrect and generates an error when writing to xenstore: Checking domid: 1 Init dom0less domain: 1 init-dom0less: writing to xenstore: No error information init-dom0less exits without finishing initialization. vcpu_max_id is an inclusive value, so it should be incl

BUG - running new version on nested virtualization

2025-03-05 Thread KAĞAN IŞILDAK
Hey there I'm facing weird issue. At my lab env. i'm building xen 4.18 and make deb package than i use it on virtual machine which running on esxi with CPU features for nested virtualization and there's no problem. (I can create vm and able to do all operational things etc.) Last week i tried to

[PATCH] Xen: CI fixes from XSN-2

2025-03-05 Thread Andrew Cooper
* Add cf_check annotation to cmp_patch_id() used by bsearch(). * Add U suffix to the K[] table to fix MISRA Rule 7.2 violations. Fixes: 372af524411f ("xen/lib: Introduce SHA2-256") Fixes: 630e8875ab36 ("x86/ucode: Perform extra SHA2 checks on AMD Fam17h/19h microcode") Signed-off-by: Andrew Coo

Re: BUG - running new version on nested virtualization

2025-03-05 Thread Andrew Cooper
On 05/03/2025 10:05 pm, KAĞAN IŞILDAK wrote: > Hey there > > I'm facing weird issue. At my lab env. i'm building xen 4.18 and make > deb package than i use it on virtual machine which running on esxi > with CPU features for nested virtualization and there's no problem. (I > can create vm and able t

Re: [PATCH] docs: fix INTRODUCE description in xenstore.txt

2025-03-05 Thread Andrew Cooper
On 05/03/2025 8:52 am, Juergen Gross wrote: > The description of the Xenstore INTRODUCE command is still referencing > xend. Fix that. > > While at it, make clear that the Xenstore implementation is allowed > to ignore the specified gfn and use the Xenstore reserved grant id > GNTTAB_RESERVED_XENST

Re: [XEN PATCH v2 2/3] xen/rt: address violation of MISRA C Rule 8.2

2025-03-05 Thread Stefano Stabellini
On Wed, 5 Mar 2025, Jan Beulich wrote: > On 25.02.2025 10:38, Nicola Vetrini wrote: > > Rule 8.2 states: "Function types shall be in prototype form with > > named parameters". > > > > The parameter name is missing from the function pointer type > > that constitutes the first parameter. > > > > No

Re: [PATCH v8 2/6] automation: drop debian:11-riscv64 container

2025-03-05 Thread Stefano Stabellini
On Fri, 28 Feb 2025, Oleksii Kurochko wrote: > There are two reasons for that: > 1. In the README, GCC baseline is chosen to be 12.2, whereas Debian 11 >uses GCC 10.2.1. > 2. Xen requires mandatory some Z extensions, but GCC 10.2.1 does not >support Z extensions in -march, causing the compi

Re: [PATCH v8 0/9] remove libxenctrl usage from xenstored

2025-03-05 Thread Stefano Stabellini
On Wed, 5 Mar 2025, Juergen Gross wrote: > On 25.02.25 12:10, Juergen Gross wrote: > > Ping? Especially ... > > > > On 04.02.25 12:33, Juergen Gross wrote: > > > Xenstored is using libxenctrl for only one purpose: to get information > > > about state of domains. > > > > > > This patch series is r

Re: [PATCH] Xen: CI fixes from XSN-2

2025-03-05 Thread Stefano Stabellini
On Wed, 5 Mar 2025, Andrew Cooper wrote: > * Add cf_check annotation to cmp_patch_id() used by bsearch(). > * Add U suffix to the K[] table to fix MISRA Rule 7.2 violations. > > Fixes: 372af524411f ("xen/lib: Introduce SHA2-256") > Fixes: 630e8875ab36 ("x86/ucode: Perform extra SHA2 checks on AM

Re: BUG - running new version on nested virtualization

2025-03-05 Thread KAĞAN IŞILDAK
Hey Andrew I know but as i said at 4.18 theres no problem, im mounting at /etc/fstab succ. Im facing this issue on newer versions (4.19, 4.20) These installation also same with 4.18(same /etc/fstab config) but main problem is why it raise error and cant mount Andrew Cooper , 6 Mar 2025 Per, 01:44

Re: [PATCH] docs: fix INTRODUCE description in xenstore.txt

2025-03-05 Thread Jürgen Groß
On 05.03.25 23:57, Andrew Cooper wrote: On 05/03/2025 8:52 am, Juergen Gross wrote: The description of the Xenstore INTRODUCE command is still referencing xend. Fix that. While at it, make clear that the Xenstore implementation is allowed to ignore the specified gfn and use the Xenstore reserve

[PATCH v5] xen/consoled: clean up console handling for PV shim

2025-03-05 Thread dmkhn
From: Denis Mukhin There are few places which check pv_shim console under CONFIG_PV_SHIM or CONFIG_X86 in xen console driver. Instead of inconsistent #ifdef-ing, introduce and use consoled_is_enabled() in switch_serial_input() and __serial_rx(). PV shim case is fixed in __serial_rx() - should b