On Wed, Jan 8, 2025 at 1:23 PM Andrew Cooper wrote:
> Seeing as this is the only issue, I'm happy to fix on commit?
Fine by me!
P.
On 08/01/2025 7:16 am, Jan Beulich wrote:
> On 07.01.2025 18:18, Petr Beneš wrote:
>> On Tue, Jan 7, 2025 at 5:46 PM Jan Beulich wrote:
>>> Hmm ... Instead of you touching the bit in every one of the case blocks,
>>> I was expecting you to clear the bit ahead of the switch(), accepting a
>>> doubl
On 07.01.2025 18:18, Petr Beneš wrote:
> On Tue, Jan 7, 2025 at 5:46 PM Jan Beulich wrote:
>> Hmm ... Instead of you touching the bit in every one of the case blocks,
>> I was expecting you to clear the bit ahead of the switch(), accepting a
>> double update in the p2m_access_r_pw case.
>
> I did
On Tue, Jan 7, 2025 at 5:46 PM Jan Beulich wrote:
> Hmm ... Instead of you touching the bit in every one of the case blocks,
> I was expecting you to clear the bit ahead of the switch(), accepting a
> double update in the p2m_access_r_pw case.
I did consider it, but ultimately didn't like the dou
On 02.01.2025 18:13, Petr Beneš wrote:
> --- a/xen/arch/x86/mm/p2m-ept.c
> +++ b/xen/arch/x86/mm/p2m-ept.c
> @@ -154,27 +154,39 @@ static void ept_p2m_type_to_flags(const struct
> p2m_domain *p2m,
> case p2m_access_n:
> case p2m_access_n2rwx:
> entry->r = entry->w =
From: Petr Beneš
This patch introduces a new XENMEM_access_r_pw permission. Functionally, it is
similar to XENMEM_access_r, but for processors with
TERTIARY_EXEC_EPT_PAGING_WRITE support (Intel 12th Gen/Alder Lake and later),
it also permits the CPU to write to the page during guest page-table
