>>> On 16.02.17 at 22:49, wrote:
> On Thu, Feb 16, 2017 at 02:29:45AM -0700, Jan Beulich wrote:
>> >>> On 15.02.17 at 22:53, wrote:
>> > On Wed, Feb 15, 2017 at 03:22:02AM -0700, Jan Beulich wrote:
>> >> >>> On 14.02.17 at 19:38, wrote:
>> >> > --- a/xen/arch/x86/boot/head.S
>> >> > +++ b/xen/ar
This run is configured for baseline tests only.
flight 68571 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/68571/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf b173ad78519b2ade309019614b52e1453727e20d
baseline v
On Thu, 16 Feb 2017 23:11:22 -0800
Joe Perches wrote:
> To enable eventual removal of pr_warning
>
> This makes pr_warn use consistent for arch/x86
>
> Prior to this patch, there were 46 uses of pr_warning and
> 122 uses of pr_warn in arch/x86
>
> Miscellanea:
>
> o Coalesce a few formats and
>>> On 16.02.17 at 19:09, wrote:
> On 16/02/17 16:34, Jan Beulich wrote:
> On 16.02.17 at 17:11, wrote:
>>> On 16/02/17 15:52, Jan Beulich wrote:
>>> On 16.02.17 at 16:02, wrote:
> On Thu, Feb 16, 2017 at 11:36 AM, Jan Beulich wrote:
> On 15.02.17 at 18:43, wrote:
>>> 1
When running as pv domain xen_cpuid() is being used instead of
native_cpuid(). In xen_cpuid() the aperf/mperf feature is indicated
as not being present by special casing the related cpuid leaf.
Instead of delivering fake cpuid values clear the cpu capability bit
for aperf/mperf instead.
Signed-of
Xen doesn't support DCA (direct cache access) for pv domains. Clear
the corresponding capability indicator.
Signed-off-by: Juergen Gross
---
arch/x86/xen/enlighten.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 51ef952..83399ce
Reduce special casing of xen_cpuid() and disable DCA feature for pv
domains as it isn't supported under Xen.
Juergen Gross (2):
x86/xen: don't indicate DCA support in pv domains
x86/xen: use capabilities instead of fake cpuid values
arch/x86/xen/enlighten.c | 14 ++
1 file change
To enable eventual removal of pr_warning
This makes pr_warn use consistent for arch/x86
Prior to this patch, there were 46 uses of pr_warning and
122 uses of pr_warn in arch/x86
Miscellanea:
o Coalesce a few formats and realign arguments
o Convert a couple of multiple line printks to single lin
There are ~4300 uses of pr_warn and ~250 uses of the older
pr_warning in the kernel source tree.
Make the use of pr_warn consistent across all kernel files.
This excludes all files in tools/ as there is a separate
define pr_warning for that directory tree and pr_warn is
not used in tools/.
Done
>>> On 16.02.17 at 19:38, wrote:
> On Thu, 16 Feb 2017, Jan Beulich wrote:
>> >>> On 16.02.17 at 16:23, wrote:
>> On 14.02.17 at 15:56, wrote:
>> >> On Fri, Feb 10, 2017 at 02:54:23AM -0700, Jan Beulich wrote:
>> >>> Not so far. It appears to happen when grub clears the screen
>> >>> before
flight 105861 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105861/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-xl-credit2 15 guest-start/debian.repeat fail REGR. vs. 105840
Regressions which
> From: Tian, Kevin
> Sent: Friday, February 17, 2017 11:35 AM
> > >>
> > >> Or wait - do you have the same issue if you use
> > >> "iommu=no,no-intremap"? In which case the problem would be
> > >> that "iommu=no" should clear more than just "iommu_enable", or
> > >> code checking iommu_intremap ea
flight 105871 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105871/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-libvirt 14 guest-saverestorefail REGR. vs. 105852
test-armhf-a
Use uint32_t rather than int to align to the type of
xen_mc_physcpuinfo.ncpus.
Signed-off-by: Haozhong Zhang
---
Cc: Ian Jackson
Cc: Wei Liu
---
tools/tests/mce-test/tools/xen-mceinj.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/tools/tests/mce-test/tools/
If option '-l' or '--lmce' is specified and the host supports LMCE,
xen-mceinj will inject LMCE to CPU specified by '-c' (or CPU0 if '-c'
is not present).
Signed-off-by: Haozhong Zhang
---
Cc: Ian Jackson
Cc: Wei Liu
---
tools/libxc/include/xenctrl.h | 1 +
tools/libxc/xc_misc.c
An attemp to write to MSR_IA32_MCG_STATUS with any value other than 0
would result in #GP on Intel CPU.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mce.c | 9 -
1 file changed, 8 insertions(+), 1
All existing calls to x86_mcinfo_reserve() are followed by statements
that set the size and the type of the reserved space, so move them into
x86_mcinfo_reserve() to simplify the code.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/vmce.c | 35 ---
1 file changed, 20 insertions(+), 15 deletions(-)
diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cp
Inject LMCE to guest if the host MCE is LMCE and the affected vcpu is
known. Otherwise, broadcast MCE to all vcpus on Intel host.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mcaction.c | 14 --
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mce.c | 16
xen/arch/x86/cpu/mcheck/mce.h | 1 -
2 files changed, 17 deletions(-)
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cp
The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was
surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated
from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC.
Because Xen had dropped support for 32-bit x86 host, these two loops
can be merged now.
Signed
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mce.c | 16
xen/include/public/arch-x86/xen-mca.h | 1 +
2 files changed, 17 insertions(+)
diff --git a/xen/arch/x86/cpu/mcheck/mce.c
Replace tab indentation by whitespace.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mce.h | 40 +--
xen/include/public/arch-x86/xen-mca.h | 24 ++---
If LMCE is supported by host and "lmce = 1" is present in xl config, the
LMCE capability will be exposed in guest MSR_IA32_MCG_CAP. By default,
LMCE is not exposed to guest so as to keep the backwards migration
compatibility.
Signed-off-by: Haozhong Zhang
---
Cc: Ian Jackson
Cc: Wei Liu
Cc: Chr
The current implementation only fills MC MSRs on vcpu0 and leaves MC
MSRs on other vcpus empty in the broadcast case. When guest reads 0
from MSR_IA32_MCG_STATUS on vcpuN (N > 0), it may think it's not
possible to recover the execution on that vcpu and then get panic,
although MSR_IA32_MCG_STATUS f
This patch series adds LMCE support to Xen, although more than half
patches are for code cleanup and bug fix.
LMCE
--
Intel Local MCE (LMCE) is a feature on Intel Skylake Server CPU that
can deliver MCE to a single processor thread instead of br
If MCG_LMCE_P is present in guest MSR_IA32_MCG_CAP, then set LMCE and
LOCK bits in guest MSR_IA32_FEATURE_CONTROL. Intel SDM requires those
bits are set before SW can enable LMCE.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Jun N
If MCG_LMCE_P is present in guest MSR_IA32_MCG_CAP, then allow guest
to read/write MSR_IA32_MCG_EXT_CTL.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/vmce.c | 32 +++-
x
Implementations of these two functions are effectively the same, so
unify them by a common intel_default_mce_handler().
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mce_intel.c | 27 +++
Enable LMCE if it's supported by the host CPU. If Xen boot parameter
"mce_fb = 1" is present, LMCE will be disabled forcibly.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mce.h | 1 +
xen/arch/x86/c
LMCE is sent to only one CPU thread, so MCE handler, barriers and
softirq handler should go without waiting for other CPUs, when
handling LMCE. Note LMCE is still broadcast to all vcpus as regular
MCE on Intel CPU right now.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mce.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 2695b0c..e32
Remove declarations of functions
intel_mcheck_timer()
mce_intel_feature_init()
mce_cap_init()
x86_mcinfo_getptr()
whose definitions had been removed long time ago.
Signed-off-by: Haozhong Zhang
---
Cc: Christoph Egger
Cc: Liu Jinsong
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/
Hello Folks,
Sorry, forgot to mention the version:
> # xl info
> [...]
> release: 4.9.3-200.186.fc25.x86_64
plain "xl list" produces:
> # xl list
> NameID Mem VCPUsStateTime(s)
> Domain-0 0 2
Hello Folks,
plain "xl list" produces:
> # xl list
> NameID Mem VCPUsStateTime(s)
> Domain-0 0 2048 1 r-
> 108.2
and "xl list -l" produces:
> # xl list -l
> [
> {
> "domid": 0,
>
flight 105866 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105866/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-libvirt 14 guest-saverestorefail REGR. vs. 105852
test-armhf-a
flight 105855 xen-4.7-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105855/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
test-amd64-amd64-xl-rtds 9 debian-install fail REGR. vs. 105661
test-armhf-armhf-libvirt
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: Thursday, February 16, 2017 7:16 PM
>
> They're all solely dependent on guest type, so we don't need to repeat
> all the same three pointers in every vCPU control structure. Instead use
> static const structures, and store pointers to them in
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: Thursday, February 16, 2017 8:36 PM
>
> >>> On 16.02.17 at 13:27, wrote:
> > On 16/02/17 11:15, Jan Beulich wrote:
> >> When __context_switch() is being bypassed during original context
> >> switch handling, the vCPU "owning" the VMCS partial
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: Thursday, February 16, 2017 5:32 PM
>
> >>> On 15.02.17 at 20:30, wrote:
> > On Wed, Feb 15, 2017 at 3:03 AM, Jan Beulich wrote:
> > On 15.02.17 at 00:21, wrote:
> >>> On 14/02/2017 22:47, Tamas K Lengyel wrote:
> (XEN) Switched to
> From: Andrew Cooper [mailto:andrew.coop...@citrix.com]
> Sent: Thursday, February 16, 2017 11:46 PM
>
> XSA-173 (c/s 8b1764833) introduces gfn_bits, and an upper limit which might be
> lower than the real maxphysaddr, to avoid overflowing the superpage shadow
> backpointer.
>
> However, plenty
flight 105853 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105853/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-xl-qemuu-winxpsp3-vcpus1 9 windows-install fail REGR. vs.
105796
Regressions wh
flight 105845 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105845/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-xl-multivcpu 6 xen-boot fail REGR. vs. 59254
test-armhf-armhf-xl
This run is configured for baseline tests only.
flight 68569 xen-4.4-testing real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/68569/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-pygrub 13 guest-savere
flight 105859 xtf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105859/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
xtf 2b8c78575cb534908ccc8824d76904376b9c38a5
baseline version:
xtf 01b0192030c01dc8af02dc
Because of some reason, We no longer support COLO kernel proxy.
So we send this patch set to make Xen use userspace colo-proxy in qemu.
Below is a COLO userspace proxy ascii figure:
Primary qemu
Secondary qemu
+--
Add remus '-p' to enable userspace colo proxy(in qemu).
Signed-off-by: Zhang Chen
---
docs/man/xl.pod.1.in | 5 +
tools/libxl/libxl.h | 6 ++
tools/libxl/libxl_colo.h | 5 +
tools/libxl/libxl_colo_save.c | 2 ++
tools/libxl/libxl_types.idl | 17 +
We use params->colo_proxy_script to make do_domain_create()
doesn't take "colo_proxy_script" anymore.
Signed-off-by: Zhang Chen
---
tools/libxl/libxl_create.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/tools/libxl/libxl_create.c b/tools/libxl/libxl_cre
In this patch we add a function to close COLO kernel Proxy on secondary side.
Signed-off-by: Zhang Chen
---
tools/libxl/libxl_colo_restore.c | 8 ++--
tools/libxl/libxl_create.c | 8 ++--
tools/libxl/libxl_types.idl | 1 +
tools/libxl/xl_cmdimpl.c | 18 +
We use kernel colo proxy's way to get the checkpoint event
from qemu colo-compare.
Qemu colo-compare need add a API to support this(I will add this in qemu).
Signed-off-by: Zhang Chen
---
tools/libxl/libxl_colo.h | 2 +
tools/libxl/libxl_colo_proxy.c | 85 +
Qemu need this args to start userspace colo-proxy.
Signed-off-by: Zhang Chen
---
tools/libxl/libxl_dm.c | 98 +
tools/libxl/libxl_nic.c | 78
tools/libxl/libxl_types.idl | 31 +-
tools/libxl/xl_
Qemu need this args to start userspace colo-proxy.
Signed-off-by: Zhang Chen
---
tools/libxl/libxl_dm.c | 34 ++
tools/libxl/libxl_nic.c | 27 +++
tools/libxl/libxl_types.idl | 15 ++-
tools/libxl/xl_cmdimpl.c| 27 +
In this patch we close kernel COLO-Proxy on primary side.
Signed-off-by: Zhang Chen
---
tools/libxl/libxl_colo_proxy.c | 27 +++
tools/libxl/libxl_colo_save.c | 9 +++--
2 files changed, 34 insertions(+), 2 deletions(-)
diff --git a/tools/libxl/libxl_colo_proxy.c b
flight 105847 xen-4.5-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105847/
Failures :-/ but no regressions.
Tests which are failing intermittently (not blocking):
test-armhf-armhf-xl7 host-ping-check-xen fail in 105827 pass in 105847
test-amd64-i386-xl-qemuu-win7
flight 105864 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105864/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-libvirt 14 guest-saverestorefail REGR. vs. 105852
test-armhf-a
On Wed, 15 Feb 2017, Sameer Goel wrote:
> From: Lv Zheng
>
> ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca
>
> This patch adds support for IORT (IO Remapping Table) in iasl.
>
> Note that some field names are modified to shrink their length or the
> decompiled IORT ASL will contain fie
Hi Thomas,
[auto build test ERROR on next-20170216]
[also build test ERROR on v4.10-rc8]
[cannot apply to tip/x86/core kvm/linux-next tip/auto-latest v4.9-rc8 v4.9-rc7
v4.9-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
Hi Thomas,
[auto build test ERROR on next-20170216]
[also build test ERROR on v4.10-rc8]
[cannot apply to tip/x86/core kvm/linux-next tip/auto-latest v4.9-rc8 v4.9-rc7
v4.9-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
flight 105854 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105854/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf b173ad78519b2ade309019614b52e1453727e20d
baseline version:
ovmf fd12acdeff7a04ad34ccb
flight 105862 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105862/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-libvirt 14 guest-saverestorefail REGR. vs. 105852
test-armhf-a
On Thu, 16 Feb 2017, Julien Grall wrote:
> On 16/02/2017 22:10, Stefano Stabellini wrote:
> > On Thu, 16 Feb 2017, Julien Grall wrote:
> > > Hi Stefano,
> > >
> > > On 11/02/17 02:05, Stefano Stabellini wrote:
> > > > Concurrent execution of gic_update_one_lr and vgic_store_itargetsr can
> > > > r
On 16/02/2017 22:10, Stefano Stabellini wrote:
On Thu, 16 Feb 2017, Julien Grall wrote:
Hi Stefano,
On 11/02/17 02:05, Stefano Stabellini wrote:
Concurrent execution of gic_update_one_lr and vgic_store_itargetsr can
result in the wrong pcpu being set as irq target, see
http://marc.info/?l=xe
This run is configured for baseline tests only.
flight 68567 xen-4.6-testing real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/68567/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-xtf-amd64-amd64-320 xtf/test-hvm32-
On Thu, 16 Feb 2017, Stefano Stabellini wrote:
> > > > > AVG MIN MAX WARM MAX
> > > > >
> > > > > NODEBUG no WFI 1890 1800 3170 2070
> > > > > NODEBUG WFI 4850 4810 7030 4980
> > > > > NODEBUG no WFI credit2 2217 2090
The default dom0_mem is 128M which is not sufficient to boot an Ubuntu
based Dom0. Increase it to 512M.
Signed-off-by: Stefano Stabellini
---
Changes in v2: use MB macro
---
xen/arch/arm/domain_build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/domain_bui
On Thu, 16 Feb 2017, Boris Ostrovsky wrote:
> On 02/16/2017 04:19 PM, Stefano Stabellini wrote:
> > On Thu, 16 Feb 2017, Boris Ostrovsky wrote:
> > > On 02/15/2017 11:20 PM, Boris Ostrovsky wrote:
> > > > (Now with correct address for Stefano)
> > > >
> > > > Upstream qemu appears to be crashing d
On Thu, Feb 16, 2017 at 03:56:21PM -0600, Doug Goldstein wrote:
> On 2/16/17 3:49 PM, Daniel Kiper wrote:
> > On Thu, Feb 16, 2017 at 02:29:45AM -0700, Jan Beulich wrote:
> > On 15.02.17 at 22:53, wrote:
> >>> On Wed, Feb 15, 2017 at 03:22:02AM -0700, Jan Beulich wrote:
> >>> On 14.02.17 a
This run is configured for baseline tests only.
flight 68568 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/68568/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf fd12acdeff7a04ad34ccb95103eb6204b8901749
baseline v
On Thu, 16 Feb 2017, Julien Grall wrote:
> Hi Stefano,
>
> On 11/02/17 02:05, Stefano Stabellini wrote:
> > Concurrent execution of gic_update_one_lr and vgic_store_itargetsr can
> > result in the wrong pcpu being set as irq target, see
> > http://marc.info/?l=xen-devel&m=148218667104072.
> >
> >
On 2/16/17 3:49 PM, Daniel Kiper wrote:
> On Thu, Feb 16, 2017 at 02:29:45AM -0700, Jan Beulich wrote:
> On 15.02.17 at 22:53, wrote:
>>> On Wed, Feb 15, 2017 at 03:22:02AM -0700, Jan Beulich wrote:
>>> On 14.02.17 at 19:38, wrote:
> --- a/xen/arch/x86/boot/head.S
> +++ b/xen/arch
The KVM segment_base function is confusing. This patch replaces integers
with appropriate flags, simplify constructs and add comments.
Signed-off-by: Thomas Garnier
---
Based on next-20170213
---
arch/x86/kvm/vmx.c | 30 --
1 file changed, 20 insertions(+), 10 deletio
Each processor holds a GDT in its per-cpu structure. The sgdt
instruction gives the base address of the current GDT. This address can
be used to bypass KASLR memory randomization. With another bug, an
attacker could target other per-cpu structures or deduce the base of
the main memory section (PAGE
This patch aligns MODULES_END to the beginning of the Fixmap section.
It optimizes the space available for both sections. The address is
pre-computed based on the number of pages required by the Fixmap
section.
It will allow GDT remapping in the Fixmap section. The current
MODULES_END static addre
This patch makes the GDT remapped pages read-only to prevent corruption.
This change is done only on 64-bit.
The native_load_tr_desc function was adapted to correctly handle a
read-only GDT. The LTR instruction always writes to the GDT TSS entry.
This generates a page fault if the GDT is read-only
On 02/16/2017 04:19 PM, Stefano Stabellini wrote:
On Thu, 16 Feb 2017, Boris Ostrovsky wrote:
On 02/15/2017 11:20 PM, Boris Ostrovsky wrote:
(Now with correct address for Stefano)
Upstream qemu appears to be crashing during VCPU hotplug. I think this
is something relatively new since I have
Le 16/02/2017 à 14:36, Konrad Rzeszutek Wilk a écrit :
Is it time now to officially remove Dom0 support?
So we do have an prototype implementation of netback but it is waiting
for review of xen-devel to the spec.
And I believe the implementation does utilize some of the dom0
parts of code in DP
On Thu, Feb 16, 2017 at 02:29:45AM -0700, Jan Beulich wrote:
> >>> On 15.02.17 at 22:53, wrote:
> > On Wed, Feb 15, 2017 at 03:22:02AM -0700, Jan Beulich wrote:
> >> >>> On 14.02.17 at 19:38, wrote:
> >> > --- a/xen/arch/x86/boot/head.S
> >> > +++ b/xen/arch/x86/boot/head.S
> >> > @@ -394,10 +394
flight 105860 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105860/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-libvirt 14 guest-saverestorefail REGR. vs. 105852
test-armhf-a
On Thu, 16 Feb 2017, Boris Ostrovsky wrote:
> On 02/15/2017 11:20 PM, Boris Ostrovsky wrote:
> > (Now with correct address for Stefano)
> >
> > Upstream qemu appears to be crashing during VCPU hotplug. I think this
> > is something relatively new since I have been doing this a few week ago.
> >
>
On 02/16/2017 11:09 AM, Peter Zijlstra wrote:
> On Wed, Feb 15, 2017 at 04:37:49PM -0500, Waiman Long wrote:
>> The cpu argument in the function prototype of vcpu_is_preempted()
>> is changed from int to long. That makes it easier to provide a better
>> optimized assembly version of that function.
On 02/16/2017 11:48 AM, Peter Zijlstra wrote:
> On Wed, Feb 15, 2017 at 04:37:50PM -0500, Waiman Long wrote:
>> +/*
>> + * Hand-optimize version for x86-64 to avoid 8 64-bit register saving and
>> + * restoring to/from the stack. It is assumed that the preempted value
>> + * is at an offset of 16 f
On Thu, 16 Feb 2017, Julien Grall wrote:
> Hi Stefano,
>
> On 15/02/2017 23:05, Stefano Stabellini wrote:
> > The default dom0_mem is 128M which is not sufficient to boot a Ubuntu
> > based Dom0. Increase it to 512M.
> >
> > Signed-off-by: Stefano Stabellini
>
> I am not a big fan of increasing
Replace one opencoded mfn_eq() and some coding style issues on altered lines.
Swap __mfn_valid() to being bool, although it can't be updated to take mfn_t
because of include dependencies.
No functional change.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
CC: Stefano Stabellini
CC: Julien G
On Thu, 16 Feb 2017, Julien Grall wrote:
> Hi Stefano,
>
> On 11/02/17 02:05, Stefano Stabellini wrote:
> > We don't need a lock in vgic_get_target_vcpu anymore, solving the
> > following lock inversion bug: the rank lock should be taken first, then
> > the vgic lock. However, gic_update_one_lr is
On Thu, 16 Feb 2017, Dario Faggioli wrote:
> On Fri, 2017-02-10 at 10:32 -0800, Stefano Stabellini wrote:
> > On Fri, 10 Feb 2017, Dario Faggioli wrote:
> > > Right, interesting use case. I'm glad to see there's some interest
> > > in
> > > it, and am happy to help investigating, and trying to make
flight 105858 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105858/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-libvirt 14 guest-saverestorefail REGR. vs. 105852
test-armhf-a
flight 105840 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/105840/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
test-armhf-armhf-libvirt 13 saverestore-support-checkfail like 105821
test-armhf-armhf-libvirt-xs
Hi Stefano,
On 11/02/17 02:05, Stefano Stabellini wrote:
Concurrent execution of gic_update_one_lr and vgic_store_itargetsr can
result in the wrong pcpu being set as irq target, see
http://marc.info/?l=xen-devel&m=148218667104072.
To solve the issue, add barriers, remove an irq from the infligh
On 16/02/17 18:56, Wei Liu wrote:
> Several `ln -sf` can race with each other and cause error like:
>
> 14:43:56 00:07:06 O: ln: cannot remove 'asm': No such file or directory
>
> Provide dedicated targets for soft-linking directories.
>
> Reported-by: Andrew Cooper
> Signed-off-by: Wei Liu
> ---
Hi Andre,
On 01/30/2017 12:31 PM, Andre Przywara wrote:
Each ITS maps a pair of a DeviceID (usually the PCI b/d/f triplet) and
an EventID (the MSI payload or interrupt ID) to a pair of LPI number
and collection ID, which points to the target CPU.
This mapping is stored in the device and collect
On Thu, 16 Feb 2017, Julien Grall wrote:
> Hi Jan,
>
> On 16/02/17 16:34, Jan Beulich wrote:
> > > > > On 16.02.17 at 17:11, wrote:
> > > On 16/02/17 15:52, Jan Beulich wrote:
> > > > > > > On 16.02.17 at 16:02, wrote:
> > > > > On Thu, Feb 16, 2017 at 11:36 AM, Jan Beulich
> > > > > wrote:
> >
Wei Liu (3):
fuzz/x86emul: avoid race in link farm rune
x86emul/test: avoid race in link farm rune
gitignore: ignore asm soft link in fuzz and x86emul test
.gitignore | 2 ++
tools/fuzz/x86_instruction_emulator/Makefile | 8 ++--
tools/tests/x86_emulato
Several `ln -sf` can race with each other. Provide dedicated targets
for soft-linking directories.
Signed-off-by: Wei Liu
---
tools/tests/x86_emulator/Makefile | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/tools/tests/x86_emulator/Makefile
b/tools/tests/x86_emulat
Signed-off-by: Wei Liu
---
.gitignore | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.gitignore b/.gitignore
index 8810c6975a..c8d56d1bdb 100644
--- a/.gitignore
+++ b/.gitignore
@@ -147,6 +147,7 @@ tools/flask/utils/flask-setenforce
tools/flask/utils/flask-set-bool
tools/flask/utils/fla
Several `ln -sf` can race with each other and cause error like:
14:43:56 00:07:06 O: ln: cannot remove 'asm': No such file or directory
Provide dedicated targets for soft-linking directories.
Reported-by: Andrew Cooper
Signed-off-by: Wei Liu
---
tools/fuzz/x86_instruction_emulator/Makefile |
Hi Stefano,
On 11/02/17 02:05, Stefano Stabellini wrote:
We don't need a lock in vgic_get_target_vcpu anymore, solving the
following lock inversion bug: the rank lock should be taken first, then
the vgic lock. However, gic_update_one_lr is called with the vgic lock
held, and it calls vgic_get_ta
On Thu, 16 Feb 2017, Julien Grall wrote:
> Hello,
>
> The last two community calls went really good and I am suggesting to have a
> new one on Wednesday 1st March at 4pm UTC. Any opinions?
Is it possible to change the time to 5pm?
> Also, do you have any specific topic you would like to talk du
On Thu, 16 Feb 2017, Jan Beulich wrote:
> >>> On 16.02.17 at 16:23, wrote:
> On 14.02.17 at 15:56, wrote:
> >> On Fri, Feb 10, 2017 at 02:54:23AM -0700, Jan Beulich wrote:
> >>> Not so far. It appears to happen when grub clears the screen
> >>> before displaying its graphical menu, so I'd ra
On 16/02/17 17:44, Andre Przywara wrote:
Hi Julien,
Hi Andre,
On 06/02/17 12:39, Julien Grall wrote:
On 30/01/17 18:31, Andre Przywara wrote:
+
+if ( !dt_device_is_compatible(its, "arm,gic-v3-its") )
+continue;
+
+if ( !dt_device_is_available(its) )
+
Hi Jan,
On 16/02/17 16:34, Jan Beulich wrote:
On 16.02.17 at 17:11, wrote:
On 16/02/17 15:52, Jan Beulich wrote:
On 16.02.17 at 16:02, wrote:
On Thu, Feb 16, 2017 at 11:36 AM, Jan Beulich wrote:
On 15.02.17 at 18:43, wrote:
1.
I need:
Allow P2M core on ARM to update IOMMU mapping from t
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