Signed-off-by: Haozhong Zhang <haozhong.zh...@intel.com>
---
Cc: Christoph Egger <cheg...@amazon.de>
Cc: Liu Jinsong <jinsong....@alibaba-inc.com>
Cc: Jan Beulich <jbeul...@suse.com>
Cc: Andrew Cooper <andrew.coop...@citrix.com>
---
xen/arch/x86/cpu/mcheck/mce.c | 16 ++++++++++++++++
xen/include/public/arch-x86/xen-mca.h | 1 +
2 files changed, 17 insertions(+)
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 2d69222..56c1f5e 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -1510,6 +1510,7 @@ long do_mca(XEN_GUEST_HANDLE_PARAM(xen_mc_t) u_xen_mc)
{
const cpumask_t *cpumap;
cpumask_var_t cmv;
+ int cpu_nr;
if (nr_mce_banks == 0)
return x86_mcerr("do_mca #MC", -ENODEV);
@@ -1552,6 +1553,21 @@ long do_mca(XEN_GUEST_HANDLE_PARAM(xen_mc_t) u_xen_mc)
send_IPI_mask(cpumap, cmci_apic_vector);
}
break;
+ case XEN_MC_INJECT_TYPE_LMCE:
+ if ( !lmce_support )
+ {
+ ret = x86_mcerr("No LMCE support in platform", -EINVAL);
+ break;
+ }
+ /* ensure at most one CPU is specified */
+ cpu_nr = cpumask_next(cpumask_first(cpumap), cpumap);
+ if ( cpu_nr < nr_cpu_ids )
+ {
+ ret = x86_mcerr("More than one CPU specified", -EINVAL);
+ break;
+ }
+ on_selected_cpus(cpumap, x86_mc_mceinject, NULL, 1);
+ break;
default:
ret = x86_mcerr("Wrong mca type\n", -EINVAL);
break;
diff --git a/xen/include/public/arch-x86/xen-mca.h
b/xen/include/public/arch-x86/xen-mca.h
index 9566a33..037a174 100644
--- a/xen/include/public/arch-x86/xen-mca.h
+++ b/xen/include/public/arch-x86/xen-mca.h
@@ -412,6 +412,7 @@ struct xen_mc_mceinject {
#define XEN_MC_INJECT_TYPE_MASK 0x7
#define XEN_MC_INJECT_TYPE_MCE 0x0
#define XEN_MC_INJECT_TYPE_CMCI 0x1
+#define XEN_MC_INJECT_TYPE_LMCE 0x2
#define XEN_MC_INJECT_CPU_BROADCAST 0x8
--
2.10.1
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
