The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was
surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated
from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC.
Because Xen had dropped support for 32-bit x86 host, these two loops
can be merged now.
Signed-off-by: Haozhong Zhang <haozhong.zh...@intel.com>
---
Cc: Christoph Egger <cheg...@amazon.de>
Cc: Liu Jinsong <jinsong....@alibaba-inc.com>
Cc: Jan Beulich <jbeul...@suse.com>
Cc: Andrew Cooper <andrew.coop...@citrix.com>
---
xen/arch/x86/cpu/mcheck/mce_intel.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c
b/xen/arch/x86/cpu/mcheck/mce_intel.c
index 005e41d..498e8e4 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -211,10 +211,7 @@ intel_get_extended_msrs(struct mcinfo_global *mig, struct
mc_info *mi)
mc_ext->common.type = MC_TYPE_EXTENDED;
mc_ext->common.size = sizeof(struct mcinfo_extended);
- for (i = MSR_IA32_MCG_EAX; i <= MSR_IA32_MCG_MISC; i++)
- intel_get_extended_msr(mc_ext, i);
-
- for (i = MSR_IA32_MCG_R8; i <= MSR_IA32_MCG_R15; i++)
+ for (i = MSR_IA32_MCG_EAX; i <= MSR_IA32_MCG_R15; i++)
intel_get_extended_msr(mc_ext, i);
return mc_ext;
--
2.10.1
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