Hello Brandon,
How did you install UHD and GNU Radio? When you say that the USRP is not
receiving the waveform, do you see just noise or does the application not
even start? What file was missing, there should definitely not be anything
missing from those versions.
I recommend ensuring that uhd_u
Hi,
Thanks a lot for the suggestions.
I increased the MTU size to 9000. Now when I am generating signal in
computer and doing fft on FPGA (with the signal source block), I can do fft
with fft size 1024 with sample rate 200 MSps. This works perfectly without
any overrun or timeout.
However, when I
Hi, I am trying to use a B210 with an Icron USB 3.0 Spectra 3022 range
extender, found here:
http://www.icron.com/products/icron-brand/usb-extenders/fiber/usb-3-0-spectra-3022/
The device is only compatible with USB 3.0 devices and not backwards compatible
with USB 2.0. I am told by Icron tec
Hello everyone,
In B210 there are 2 half-band filters and 4 CIC filters. As far as I know
we can select how many filters we would like to use by tuning the ratio
between sample_rate and master_clock_rate. What is the rule of it?
I am looking forward to your answer,
Altug Kaya
Hi Bradon,
The TwinRX should show up as a TwinRX in the RX slot and an unknown
daughterboard in the TX slot. This is a cosmetic issue which we're aware of.
It is possible that you have a revision B TwinRX which has a newer ID than
is supported by your version of UHD. Can you please post the full
Ok, then I could say my loopback looks good enough.
Thank you for all your help and provided information. I'll check the links
you've shared as soon as I can.
Regards,
Brais.
2017-07-17 12:28 GMT+02:00 Derek Kozel :
> Hello Brais,
>
> The gain values for USRPs are indexed from 0 dB gain being
Hi,
Are there any source codes for those examples in the UHD software library
directory and I can refer to?
Thanks,
Jay
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Hi Derek,GNUradio starts but the tones(900Mhz and 900.4Mhz) being created by
the signal generators does not show up where it should near the center
frequency set(898Mhz). The flow chart works for other radios but this twinRx
board doesn't want to work. The file I am talking about is the db_twinr
Altuğ,
per channel, there's 2 half-bands and 1 CIC. The rule is: We try and
enable as many half-bands as possible, the rest is done by CIC. So, any
ratio of sample_rate to master_clock_rate that is divisible by 4 has 2
half-bands, any other even ratio has 1 half-band, and the remainder is
done in
Hi everyone,
Ettus Research is currently looking for a USRP Product Manager. If you're a
long time USRP user and always wanted to be able to drive the direction and
feature set of next generation USRPs, this is your chance!
This is a full-time position with a strong preference to be located
On 07/18/2017 08:22 AM, Jie Song via USRP-users wrote:
> Hi,
>
> Are there any source codes for those examples in the UHD software
> library directory and I can refer to?
Jay,
https://github.com/EttusResearch/uhd/tree/maint/host/examples
-- M
___
U
I finally got things connected to the B210, and now I am having
software/firmware compatibility issues.
I did do searches for this issue already on the net, but the instructions are
very vague.
I already tried to uninstall GNU radio and reinstall.
The current version I have is 3.7.9.rc1.
GR-U
How did you install GNU Radio and UHD, respectively?
-- M
On 07/18/2017 09:24 AM, Matheou, Konstantin J. (GRC-LCI0)[ZIN
TECHNOLOGIES INC] via USRP-users wrote:
> I finally got things connected to the B210, and now I am having
> software/firmware compatibility issues.
>
>
>
> I did do searches
On 07/10/2017 06:52 AM, Mareike Hetzel via USRP-users wrote:
> Martin,
>
> thank you very much for your help!
>
> I would like to do this! Could you please give me some further
> information what exactly I need to do? As I have never done anything
> with FPGAs, I don't know where to start. I have
There is a possible work around. If you use the external power supply
and can keep power applied after an initial firmware download, then the
B210 will enumerate as a USB 3.0 only device.
Ron
On 07/18/2017 06:00 AM, Sirkin, Joshua F. via USRP-users wrote:
Hi, I am trying to use a B210 with an
Hi,
I am currently doing some developing and one of my goals is to be able to task
an x310 containing two twinRX daughter cards.
I am currently using Centos 6.5 as my linux OS; is this even possible or do I
need to upgrade to Centos 7.2?
If someone could lay out the minimum requirements for co
It's pretty raw, but there's fosphor code in gr-ettus that displays
stuff via browser. See here:
https://github.com/EttusResearch/gr-ettus/tree/master/web
Don't ask me any questions about it :)
-- M
On 07/17/2017 08:48 AM, Steve Ringwald via USRP-users wrote:
> Hi,
>
>
>
> I’m currently runn
Mark,
TwinRX requires UHD 3.10.0.0 minimum. See this page if your OS meets the
requirements: http://files.ettus.com/manual/page_build_guide.html
Note: We lock down the requirements per release, which means any 3.10.*
release will have the same requirements.
I think that CentOS 6.5 doesnt' meet a
Hello all,
The 3.9.7 release of UHD has been posted. This is an update to the Long
Term Support series. There was one commit between the release candidate and
the final release. This added some safety checks to the
uhd_images_downloader script when using custom destination directories.
The tag fo
Hi,
I am new to the B200 SDR, I was trying to run example code
"txrx_loopback_to_file.exe" on B200 ( a cable connects TX/RX to RX2 already) by
the following command but no output data file found, please help. The command
misses some TX and TX addresses/subdev address which I don't know how to
Hi,
Can anyone point to any documentation or give some insight on how the E310 FPGA
Verilog code design is laid out? I am not familiar with Verilog, and just
extrapolating from what I understand from VHDL. What is the top level module?
The e310.v file? What is the structure? I cannot find any
On 07/18/2017 02:41 PM, Estrada Lupianez, Jenniffer Marie via USRP-users
wrote:
> Can anyone point to any documentation or give some insight on how the
> E310 FPGA Verilog code design is laid out? I am not familiar with
> Verilog, and just extrapolating from what I understand from VHDL. What
> is t
On 07/18/2017 05:31 PM, Jie Song via USRP-users wrote:
Hi,
I am new to the B200 SDR, I was trying to run example code
“txrx_loopback_to_file.exe” on B200 ( a cable connects TX/RX to RX2
already) by the following command but no output data file found,
please help. The command misses some TX
Hi Mark, Hi Martin,
nope, to my experience, the hassle of setting up PyBOMBS' requirements
and then hand-fixing the non-working PyBOMBS recipes on CentOS6.5 is not
compensated by the trouble saved. This starts with ancient python on
Centos6, continues with under-circumstances-non-SSL-capable
pytho
Preface: all this talks about uhd+gnuradio, uhd itself has far more slim
deps.
Last I used PyBOMBs (grcon last year) it didn't work too well on C6. Things
may have changed.
I know it was pushed pretty hard at grcon. I have gotten GR installed
thanks to Ben Hilbern's back port[1], but always built
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