On 07/10/2017 06:52 AM, Mareike Hetzel via USRP-users wrote: > Martin, > > thank you very much for your help! > > I would like to do this! Could you please give me some further > information what exactly I need to do? As I have never done anything > with FPGAs, I don't know where to start. I have to modify the FPGA > image? Will there be only the GPIO definition or a lot of my other code > as well? > Is there an example I could use to understand how this works (even > though it won't do what I want)?
Mareike, sorry, this got lost in the nevernever. So, this is not a trivial modification for a beginner, but I never want to discourage anyone from trying. I would recommend you get familiar with building regular FPGA images first, and take a look at Verilog syntax. Once you think you have a basic clue, I would recommend posting here again, but maybe start a new thread. We have some instructions in our manual for how to build FPGA images, and there's also the knowledge base. Cheers, Martin _______________________________________________ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
