Hi
I am interested in creating a RfNoc module for X410 FPGA that will add a
simple counter that depends on external gpio to the CHDR header.
In addition, I am required to read this value on any uhd packet on my host
application (Written in C ++, UHD 4).
I've searched online for a user guide with
I received a single ‘L’ and the code again fails with the LATE error with a
single e320 (in the same fashion as with two e320’s).
From: Marcus D. Leech
Sent: Wednesday, April 27, 2022 1:53 PM
To: Caffrey, Michael Paul ; usrp-users@lists.ettus.com
Subject: Re: [USRP-users] Re: [EXTERNAL] Re: sych
On 2022-04-27 15:31, Caffrey, Michael Paul wrote:
I can run the program over and over again from the command line of the
host without rebooting / resetting the host or the e320’s. Each time I
run the program, the first collects succeeds ( I receive the requested
amount of data, anyway), while
On 2022-04-27 15:31, Caffrey, Michael Paul wrote:
I can run the program over and over again from the command line of the
host without rebooting / resetting the host or the e320’s. Each time I
run the program, the first collects succeeds ( I receive the requested
amount of data, anyway), while
I can run the program over and over again from the command line of the host
without rebooting / resetting the host or the e320’s. Each time I run the
program, the first collects succeeds ( I receive the requested amount of data,
anyway), while subsequent receives in the loop of the program do no
On 2022-04-27 15:13, Caffrey, Michael Paul via USRP-users wrote:
That is a good question and I should have included that I can run the
program over and over and the 1^st attempt always succeeds and
subsequent fail. I do not reboot or reset the e320’s in any way
outside of the python example.
That is a good question and I should have included that I can run the program
over and over and the 1st attempt always succeeds and subsequent fail. I do not
reboot or reset the e320’s in any way outside of the python example.
From: Marcus D. Leech
Sent: Wednesday, April 27, 2022 12:02 PM
To: u
On 2022-04-27 13:43, Arash Jafari wrote:
Hello Marcus,
You can consider A and C points.
Kind regards
Arash
OK, so what is it you want to accomplish that the standard setup doesn't
accomplish?
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On 2022-04-27 13:52, Caffrey, Michael Paul via USRP-users wrote:
Hi all,
I am trying to use two e320’s to collect data at the same time derived
from some examples. I would like to perform this repeatedly, however
it only succeeds on the 1^st attempt, subsequently I get mysterious
‘LL…” and
Hi all,
I am trying to use two e320's to collect data at the same time derived from
some examples. I would like to perform this repeatedly, however it only
succeeds on the 1st attempt, subsequently I get mysterious 'LL..." and no
data with an ERROR_CODE_LATE_COMMAND. The modified example is b
Hello Marcus,
You can consider A and C points.
Kind regards
Arash
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Thanks Wade and Marcus – I appreciate the insights and will make some tweaks on
my end as a workaround.
Best,
David
From: Wade Fife
Sent: Wednesday, April 27, 2022 1:21 PM
To: Marcus D. Leech
Cc: usrp-users@lists.ettus.com
Subject: [USRP-users] Re: Programmatic determine rfnoc_chdr_clk from UH
Hi David,
I'm not super familiar with the software, but get_tick_rate() returning 0
might be because something's not implemented in the block controller
software. You could look at some other blocks to see how that's handled
(maybe the DDC/DUC). But I would expect get_tick_rate() to return the
sam
On 2022-04-27 09:53, David Raeman wrote:
Hi all,
Is it possible to programmatically determine the "rfnoc_chdr_clk" rate
from a UHD application? More specifically, I have a custom RFNoC block
clocked from rfnoc_chdr_clk, and I’d like to programmatically
determine its clock rate from the assoc
On 2022-04-22 12:32, Zeng, Huacheng wrote:
Hi All,
Can anyone having successful experience with X310 + two BasicRX
Daughterboards confirm that such a setup works? We can make it work
for the following settings: i) X310 + one BasicRX, ii) X310 + two
BasicTX, iii) X310 + two SBX for both TX and
Hi all,
Is it possible to programmatically determine the "rfnoc_chdr_clk" rate from a
UHD application? More specifically, I have a custom RFNoC block clocked from
rfnoc_chdr_clk, and I'd like to programmatically determine its clock rate from
the associated custom software driver so I can conver
Hi,
You are using a total of 20 MSps.That's a big chunk. Seems your
application is not fast enough.
It takes ~15' to fill your buffers, then you go into buffer overflow errors.
Again this is your application, and you know better how it is implemented.
HTH
Nikos..
On Wed, Apr 27, 2022 at 4:10 PM
Hello,
I have an USRP X300 configured with two TwinRX sharing the same LO. My
application uses all four RX channels of the SDR, with a sampling rate of 5
MSps each, continuously receiving samples.
The problem is that the application starts to output overflow errors, followed
by late command er
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