From: Tien Fong Chee
Replace with phys_size_t for better scalable. phys_size_t is defined in
arch/arm/include/asm/types.h .
Signed-off-by: Tien Fong Chee
---
drivers/ddr/altera/sdram_s10.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram_s10.c b
From: Tien Fong Chee
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.
Signed-off-by: Tien Fong Chee
---
drivers/ddr/altera/sdram_soc64.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/
From: Tien Fong Chee
Add Macronix mx25u51245g flash entry, so this can be used on
SoCFPGA devices.
Signed-off-by: Tien Fong Chee
---
drivers/mtd/spi/spi-nor-ids.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index
From: Tien Fong Chee
Bit[7-4] for both register seq2core and core2seq handshake in HPS are not
required for triggering DDR re-calibration or resetting EMIF. So, ignoring
these bits just for playing it safe.
Signed-off-by: Tien Fong Chee
---
drivers/ddr/altera/sdram_soc64.h | 2 +-
1 file
From: Tien Fong Chee
Replace with phys_size_t for all memory size variables declaration
for the sake of scalability. phys_size_t is defined in
/arch/arm/include/asm/types.h.
Signed-off-by: Tien Fong Chee
---
drivers/ddr/altera/sdram_s10.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
From: Tien Fong Chee
All the source code of sdram_n5x.c are from Intel, update the license to
use both GPL2.0 and BSD-3 Clause because this copy of code may used for
open source and internal project.
Signed-off-by: Tien Fong Chee
---
drivers/ddr/altera/sdram_n5x.c | 4 ++--
1 file changed, 2
From: Tien Fong Chee
Switching private data manual allocation to driver model auto allocation
so users no longer need to deallocate themself because this would be
deallocated by driver model when the device is no longer required.
Signed-off-by: Tien Fong Chee
---
doc/driver-model
From: Tien Fong Chee
Firmware loader would encounter problem if the MMC is accessed before
initializing it. This patch would adding the support of initializing
MMC before the MMC is accessed by firmware loader.
Signed-off-by: Tien Fong Chee
---
drivers/misc/fs_loader.c | 33
From: Tien Fong Chee
Firmware loader would encounter problem if the MMC is accessed before
initializing it. This patch would adding the support of initializing
MMC before the MMC is accessed by firmware loader.
Signed-off-by: Tien Fong Chee
---
drivers/misc/fs_loader.c | 31
From: Tien Fong Chee
This patchset contains dm driver for DMA330 controller.
This series is working on top of u-boot-socfpga.git -
http://git.denx.de/u-boot.git .
Tien Fong Chee (5):
drivers: dma: Enable DMA-330 driver support
drivers: dma: Add function to zeroes a range of destination
From: Tien Fong Chee
Enable DMAC driver support for DMA-330 controller.
The driver is also compatible to PL330 product.
Signed-off-by: Tien Fong Chee
---
drivers/dma/Kconfig |9 +-
drivers/dma/Makefile |1 +
drivers/dma/dma330.c | 1514
From: Tien Fong Chee
This new DMA class function enables DMA being used for initializing
a range of destination such as memory to zeros. This is quite useful to
help accelerating the performance in scrubbing memory when ECC is enabled.
Signed-off-by: Tien Fong Chee
---
drivers/dma/dma
From: Tien Fong Chee
Factor out the dma_get_device from DMA class function so caller can
set some configuration and changes on the DMA device structure which
is return by calling dma_get_device before device instance is processed by
DMA class functions.
Signed-off-by: Tien Fong Chee
From: Tien Fong Chee
Update pdma properties for Stratix 10
Signed-off-by: Tien Fong Chee
---
arch/arm/dts/socfpga_stratix10.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi
b/arch/arm/dts/socfpga_stratix10.dtsi
index ccd3f32
From: Tien Fong Chee
Update the dma_memcpy description on return argument for DMA330 driver.
Signed-off-by: Tien Fong Chee
---
include/dma.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/dma.h b/include/dma.h
index 0a0c9dd..b825c1e 100644
--- a/include/dma.h
From: Tien Fong Chee
In ARM 64-bits, memory size can be supported is more than 4GB,
hence increasing save array is needed to cope with testing larger memory.
Signed-off-by: Tien Fong Chee
---
common/memsize.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/common
From: Tien Fong Chee
In ARM 64-bits, memory size can be supported is more than 4GB,
hence increasing save array is needed to cope with testing larger memory.
Signed-off-by: Tien Fong Chee
---
Changes in v2:
- Change save array size to save[BITS_PER_LONG - 1]
---
common/memsize.c | 2 +-
1
From: Tien Fong Chee
Provide information about
- overview of file system firmware loader driver model
- describe storage device and partition in device tree source
- describe fie system firmware loader API
Signed-off-by: Tien Fong Chee
---
doc/driver-model/fs_firmware_loader.txt | 129
From: Tien Fong Chee
This patchset contains generic file system loader DM which is very close to
Linux firmware loader but for U-Boot framework. Generic file system firmware
loader can be used load whatever into target location, and then consumer driver
would use it to program whatever, ie. the
From: Tien Fong Chee
This is file system generic loader which can be used to load
the file image from the storage into target such as memory.
The consumer driver would then use this loader to program whatever,
ie. the FPGA device.
Signed-off-by: Tien Fong Chee
---
drivers/misc/Kconfig
From: Tien Fong Chee
Add a document to describe file system firmware loader binding
information.
Signed-off-by: Tien Fong Chee
---
doc/device-tree-bindings/chosen.txt | 22
doc/device-tree-bindings/misc/fs_loader.txt | 52 +
2 files changed, 74
From: Tien Fong Chee
This patchset contains generic file system loader DM which is very close to
Linux firmware loader but for U-Boot framework. Generic file system firmware
loader can be used load whatever into target location, and then consumer driver
would use it to program whatever, ie. the
From: Tien Fong Chee
cmd_ubifs_umount() function would be called directly instead of involving
whole command machinery in generic firmware loader, so checking on
ubifs_initialized status need to be done in cmd_ubifs_umount() without
breaking original functionality design.
Signed-off-by: Tien
From: Tien Fong Chee
cmd_ubifs_mount() function would be called directly instead of
involving whole command machinery for mounting ubifs in
generic firmware loader, so some checking codes need to be factored out
into cmd_ubifs_mount() without breaking original functionality design.
Signed-off
From: Tien Fong Chee
Add a function to find the block device descriptor of the parent
device.
Signed-off-by: Tien Fong Chee
---
drivers/block/blk-uclass.c | 23 +++
include/blk.h | 9 +
2 files changed, 32 insertions(+)
diff --git a/drivers/block/blk
From: Tien Fong Chee
Provide information about
- overview of file system firmware loader driver model
- describe storage device and partition in device tree source
- describe fie system firmware loader API
Signed-off-by: Tien Fong Chee
---
doc/driver-model/fs_firmware_loader.txt | 133
From: Tien Fong Chee
Add a document to describe file system firmware loader binding
information.
Signed-off-by: Tien Fong Chee
---
doc/device-tree-bindings/chosen.txt | 21 +
doc/device-tree-bindings/misc/fs_loader.txt | 48 +
2 files changed
From: Tien Fong Chee
This is file system generic loader which can be used to load
the file image from the storage into target such as memory.
The consumer driver would then use this loader to program whatever,
ie. the FPGA device.
Signed-off-by: Tien Fong Chee
---
drivers/misc/Kconfig
From: Tien Fong Chee
The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches
From: Tien Fong Chee
The purpose of this patchset provides example of using the generic FS loader
which is currently under review at
/data/tfchee/a10_upstreaming/mainstream/17_1_18/patches/firmware_loader_usage .
Basically, the whole machanism is working in two ways:
1. SPL -> spl_board_i
From: Tien Fong Chee
Add FPGA drivers to support FPGA loadfs to program FPGA.
The drivers are designed based on generic firmware loader framework,
specific firmware loader handling is defined in fpga_manager_arria10.c.
These drivers can handle FPGA program operation from
loading RBF image in
From: Tien Fong Chee
Add code necessary into the FPGA driver framework in U-Boot
so it can be used via the 'fpga' command for programing Arria 10
SoCFPGA.
Signed-off-by: Tien Fong Chee
---
cmd/fpga.c|2 +-
drivers/fpga/alter
From: Tien Fong Chee
Signed-off-by: Tien Fong Chee
---
arch/arm/dts/socfpga_arria10.dtsi| 12
arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts |6 ++
configs/socfpga_arria10_defconfig| 12
3 files changed, 30 insertions(+), 0 deletions
From: Tien Fong Chee
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so
obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both
SPL and U-Boot.
Signed-off-by: Tien Fong Chee
---
arch/arm/cpu/armv8/zynqmp/Kconfig| 2 +-
arch/arm/mach-imx/spl.c
From: Tien Fong Chee
Most of the time SPL only needs very simple FAT reading, so having
CONFIG_IS_ENABLED(FAT_WRITE) to exclude it from SPL build would help
to save 64KiB default max clustersize from memory.
Signed-off-by: Tien Fong Chee
---
Changes in v2:
- Changed to CONFIG_IS_ENABLED
From: Tien Fong Chee
Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPLY_FS_EXT4 so both
obj-$(CONFIG_$(SPL_)FS_EXT4) and CONFIG_IS_ENABLED(FS_EXT4) can be
used to control the build in both SPL and U-Boot.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-k3/am6_init.c| 2 +-
arch/arm
From: Tien Fong Chee
CONFIG_SPL_FS_EXT4 can be used to include/exclude the FS EXT4 from
SPL build. Excluding the FS EXT4 from SPL build can help to save 20KiB
memory.
Signed-off-by: Tien Fong Chee
---
changes in v2:
- Changed both config checking SPL_BUILD and FS_EXT4 to
CONFIG_IS_ENABLED
From: Tien Fong Chee
Firmware loader would encounter problem if the block device is accessed
before initializing it. This patch would adding the support of probing
block device and initializing block before the block device is accessed by
firmware loader.
Signed-off-by: Tien Fong Chee
From: Tien Fong Chee
Firmware loader would encounter problem if the block device is accessed
before initializing it. This patch would adding the support of probing
block device and initializing block before the block device is accessed by
firmware loader.
Signed-off-by: Tien Fong Chee
From: Tien Fong Chee
Release cluster block immediately when no longer use would help to reduce
64KiB memory allocated to the memory pool.
Signed-off-by: Tien Fong Chee
---
changes for v2
- Assigned NULL to itr after free.
- Added NULL checking to itr, avoid freeing twice.
---
fs/fat/fat.c
From: Tien Fong Chee
Drop the statically allocated get_contents_vfatname_block and
dynamically allocate a buffer only if required. This saves
64KiB of memory.
Signed-off-by: Stefan Agner
Signed-off-by: Tien Fong Chee
---
changes for v2
- Removed the change for debug message.
- Set
From: Tien Fong Chee
Add default fitImage file bundling FPGA bitstreams for Arria10.
Signed-off-by: Tien Fong Chee
---
board/altera/arria10-socdk/fit_spl_fpga.its | 31 +
1 file changed, 31 insertions(+)
create mode 100644 board/altera/arria10-socdk
From: Tien Fong Chee
Update the default configuration file to enable the necessary functionality
the get the kit working.
Signed-off-by: Tien Fong Chee
---
changes for v7
- Keep minimal configs
---
configs/socfpga_arria10_defconfig | 17 +++--
1 file changed, 11 insertions(+), 6
From: Tien Fong Chee
These series of patches enable peripheral bitstream being programmed into FPGA
to get the DDR up running. This's also called early IO release, because the
peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and DDR.
Once DDR is up running, core bitstream fro
From: Tien Fong Chee
This patch adds description on properties about file name used for both
peripheral bitstream and core bitstream.
Signed-off-by: Tien Fong Chee
---
changes for v7
- Provided example of setting FPGA FIT image for both early IO release
and full release FPGA configuration
From: Tien Fong Chee
After some series of patches to maximise reusable of memory pool, here come
to result of reasonable size required for whole SDMMC boot working on A10
SoCDK. Size required come from default max cluster(0x10) +
others(0x2000) + additional memory for headroom(0x3000
From: Tien Fong Chee
Update the default configuration file to enable the necessary functionality
to get the SoCFPGA loadfs driver support. This would enable the
implementation of programming bitstream into FPGA from MMC.
Signed-off-by: Tien Fong Chee
---
changes for v7
- Removed limit set
From: Tien Fong Chee
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA
From: Tien Fong Chee
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.
Signed-off-by: Tien Fong Chee
---
changes for v7
From: Tien Fong Chee
Drop the statically allocated get_contents_vfatname_block and
dynamically allocate a buffer only if required. This saves
64KiB of memory.
Signed-off-by: Stefan Agner
Signed-off-by: Tien Fong Chee
---
changes for v3
- Removed the cast on actsize
---
fs/fat/fat.c | 18
From: Tien Fong Chee
Release cluster block immediately when no longer use would help to reduce
64KiB memory allocated to the memory pool.
Signed-off-by: Tien Fong Chee
---
changes for v3
- Dropped the if conditional because free(NULL) is valid.
---
fs/fat/fat.c | 10 +-
1 file
From: Tien Fong Chee
Firmware loader would encounter problem if the MMC is accessed before
initializing it. This patch would adding the support of probing block
device and initializing MMC before the MMC is accessed by firmware loader.
Signed-off-by: Tien Fong Chee
---
Changes in v2
From: Tien Fong Chee
Firmware loader would encounter problem if the MMC is accessed before
initializing it. This patch would adding the support of probing block
device and initializing MMC before the MMC is accessed by firmware loader.
Signed-off-by: Tien Fong Chee
---
Changes in v2
From: Tien Fong Chee
These series of patches enable peripheral bitstream being programmed into FPGA
to get the DDR up running. This's also called early IO release, because the
peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and DDR.
Once DDR is up running, core bitstream fro
From: Tien Fong Chee
This patch adds description on properties about file name used for both
peripheral bitstream and core bitstream.
Signed-off-by: Tien Fong Chee
---
.../fpga/altera-socfpga-a10-fpga-mgr.txt | 21
1 files changed, 21 insertions(+), 0
From: Tien Fong Chee
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA
From: Tien Fong Chee
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga
From: Tien Fong Chee
The SDMMC reset is missing from DT, so the reset manager cannot unreset
the SDMMC. Add the missing DT reset entry.
Signed-off-by: Tien Fong Chee
---
arch/arm/dts/socfpga_arria10.dtsi |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/dts
From: Marek Vasut
Update the default configuration file to enable the necessary functionality
the get the kit working. That includes SPL SD/MMC support, USB, and I2C.
Signed-off-by: Marek Vasut
Signed-off-by: Tien Fong Chee
---
configs/socfpga_arria10_defconfig | 38
From: Tien Fong Chee
Update the default configuration file to enable the necessary functionality
to get the SoCFPGA loadfs driver support. This would enable the
implementation of programming bitstream into FPGA from MMC.
Signed-off-by: Tien Fong Chee
---
configs/socfpga_arria10_defconfig
From: Stefan Agner
Drop the statically allocated get_contents_vfatname_block and
dynamically allocate a buffer only if required. This saves
64KiB of memory.
Signed-off-by: Stefan Agner
Signed-off-by: Tien Fong Chee
---
fs/fat/fat.c | 19 +--
1 files changed, 13 insertions
From: Tien Fong Chee
Release cluster block immediately when no longer use would help to reduce
64KiB memory allocated to the memory pool.
Signed-off-by: Tien Fong Chee
---
fs/fat/fat.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/fs/fat/fat.c b/fs/fat
From: Tien Fong Chee
This is minimum memory pool size required to get SPL booting to U-Boot,
such as FPGA program and loading U-Boot image from FAT.
Signed-off-by: Tien Fong Chee
---
include/configs/socfpga_common.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a
From: Tien Fong Chee
CONFIG_SPL_EXT_SUPPORT can be used to include/exclude the FS EXT4 from
SPL build. Excluding the FS EXT4 from SPL build can help to save 20KiB
memory.
Signed-off-by: Tien Fong Chee
---
fs/fs.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/fs
From: Tien Fong Chee
Most of the time SPL only needs very simple FAT reading, so having
CONFIG_SPL_FAT_WRITE to exclude or undefined would help to save 64KiB
default max clustersize from memory.
Signed-off-by: Tien Fong Chee
---
common/spl/Kconfig |7 +++
fs/fat/Makefile|7
From: Tien Fong Chee
These series of patches enable peripheral bitstream being programmed into FPGA
to get the DDR up running. This's also called early IO release, because the
peripheral bitstream is only initializing FPGA IOs, PLL, IO48 and DDR.
Once DDR is up running, core bitstream fro
From: Tien Fong Chee
This patch adds description on properties about file name used for both
peripheral bitstream and core bitstream.
Signed-off-by: Tien Fong Chee
---
.../fpga/altera-socfpga-a10-fpga-mgr.txt |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff
From: Tien Fong Chee
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA
From: Tien Fong Chee
Bundle U-Boot fitImage containing U-Boot and FPGA bitstream into the
u-boot-with-spl.sfp on Arria10. This lets U-Boot operate in a very
similar fashion to Gen5, where the U-Boot binary got loaded by the
SPL from a uImage concatenated at the end of the SPL SFP image. On
Gen10
From: Tien Fong Chee
Add support for loading FPGA bitstream to get DDR up running before
U-Boot is loaded into DDR. Boot device initialization, generic firmware
loader and SPL FAT support are required for this whole mechanism to work.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga
From: Tien Fong Chee
Add default fitImage file bundling U-Boot and FPGA bitstream for Arria10.
Signed-off-by: Marek Vasut
Signed-off-by: Tien Fong Chee
---
board/altera/arria10-socdk/fit_spl_fpga.its | 54 +++
1 files changed, 54 insertions(+), 0 deletions
From: Tien Fong Chee
Set default DT blob address on A10 SoCDK, since this SoC uses OF
separate configuration. The 0xf address is just below the text
base and still leaves enough room for the DT to grow.
Signed-off-by: Marek Vasut
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga
From: Tien Fong Chee
Update the default configuration file to enable the necessary functionality
the get the kit working. That includes fitImage loading in SPL, SPL SD/MMC
support, USB, I2C.
Signed-off-by: Marek Vasut
Signed-off-by: Tien Fong Chee
---
configs/socfpga_arria10_defconfig | 42
From: Tien Fong Chee
Add empty SPL fitImage configuration match. This can be extended
if there is ever need to support multiple boards with single SFP
image.
Signed-off-by: Marek Vasut
---
arch/arm/mach-socfpga/spl_a10.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions
From: Tien Fong Chee
Allocate buffers from OCRAM heap for the image headers in SPL on
Arria10, since DRAM is not available at that point. This allows
U-Boot to load the fitImage header, parse it, extract the FPGA
bitstream section from it, program the FPGA and make DRAM available.
Signed-off-by
file name entry,
each entry use 32 bytes, one entry can store up to 13 characters.
The maximum number of entry possible is 20. So, total size is
32*20=640bytes.
Signed-off-by: Genevieve Chan
Signed-off-by: Tien Fong Chee
Cc: Dinh Nguyen
Cc: Dinh Nguyen
Cc: ChinLiang
Cc: Vagrant Cascadian
Cc
Single 64KB get_contents_vfatname_block global variable would be used for
all FAT implementation instead of allocating additional two global variables
which are get_denfromdir_block and do_fat_read_at_block. This implementation
can help in saving up 128KB memory space.
Signed-off-by: Tien Fong
file name entry,
each entry use 32 bytes, one entry can store up to 13 characters.
The maximum number of entry possible is 20. So, total size is
32*20=640bytes.
Signed-off-by: Genevieve Chan
Signed-off-by: Tien Fong Chee
Cc: Dinh Nguyen
Cc: Dinh Nguyen
Cc: ChinLiang
Cc: Vagrant Cascadian
Cc
Dear Benoît,
On Wed, 2016-07-13 at 12:56 +0200, Benoît Thébaudeau wrote:
> Dear Tien Fong Chee,
>
> On Jul 13, 2016 at 11:01 AM, Tien Fong Chee wrote:
> > Single 64KB get_contents_vfatname_block global variable would be
> > used for
> > all FAT implementation instead o
On Fri, 2016-07-15 at 01:37 +0200, Benoît Thébaudeau wrote:
> Dear Tien Fong,
>
> On Thu, Jul 14, 2016 at 12:48 PM, Tien Fong Chee
> wrote:
> > Dear Benoît,
> >
> > On Wed, 2016-07-13 at 12:56 +0200, Benoît Thébaudeau wrote:
> > > Dear Tien Fong Chee,
> &
On Thu, 2016-07-14 at 15:00 -0600, Stephen Warren wrote:
> On 07/13/2016 03:01 AM, Tien Fong Chee wrote:
> > fill_dir_slot use get_contents_vfatname_block as a temporary buffer
> > for
> > constructing a list of dir_slot entries. To save the memory and
> > providing
>
This is initial version of device tree for the Intel socfpga arria10
development kit with sdmmc.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Stefan Roese
Cc: Dinh Nguyen
Cc: Chin Liang See
Cc: Tien Fong
---
arch/arm/dts/socfpga_arria10.dtsi | 866
This is initial version of device tree for the Intel socfpga arria10
development kit with sdmmc.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Stefan Roese
Cc: Dinh Nguyen
Cc: Chin Liang See
Cc: Tien Fong
---
arch/arm/dts/socfpga_arria10.dtsi | 858
On Fri, 2016-09-30 at 19:29 +0200, Marek Vasut wrote:
> On 09/30/2016 10:12 AM, Tien Fong Chee wrote:
> > This is initial version of device tree for the Intel socfpga
> > arria10
> > development kit with sdmmc.
> >
> > Signed-off-by: Tien Fong Chee
> >
On Fri, 2016-09-30 at 10:28 -0500, Dinh Nguyen wrote:
>
> On 09/30/2016 03:12 AM, Tien Fong Chee wrote:
> > This is initial version of device tree for the Intel socfpga
> > arria10
>
> I would think that it's still an Altera SOCFPGA.
>
Okay.
> > development
This patch would do checking on device tree to ensure the UART exist
in the system and ready for console before setting have_console to true.
This is required to avoid unexpected behavior such as hang during UART
initialization.
Signed-off-by: Tien Fong Chee
Cc: Dinh Nguyen
Cc: Dinh Nguyen
Cc
On Tue, 2016-07-26 at 15:20 +0200, Marek Vasut wrote:
> On 07/26/2016 12:55 PM, Tien Fong Chee wrote:
> > This patch would do checking on device tree to ensure the UART
> > exist
> > in the system and ready for console before setting have_console to
> > true.
&g
file name entry,
each entry use 32 bytes, one entry can store up to 13 characters.
The maximum number of entry possible is 20. So, total size is
32*20=640bytes.
Signed-off-by: Genevieve Chan
Signed-off-by: Tien Fong Chee
---
Changes for V2
- Removed extra space
Cc: Dinh Nguyen
Cc: Dinh Nguyen
Single 64KB get_contents_vfatname_block global variable would be used for
all FAT implementation instead of allocating additional two global variables
which are get_denfromdir_block and do_fat_read_at_block. This implementation
can help in saving up 128KB memory space.
Signed-off-by: Tien Fong
From: "Chee, Tien Fong"
Fixing the broken implementation caused by the patch
commit:ce62e57fc57177352a02b76dace0173bd13404b6, ARM: boot0 hook:
remove macro, include whole header file. This patch also enhances
boot header to contain more special data.
Signed-off-by: Chee, Tien Fong
---
arch/arm
From: "Chee, Tien Fong"
Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file") miss out cleaning macro in this header file, and this
has broken implementation of a boot header capability in socfpga
SPL. Remove the macro in this file, and recovering it back
to proper func
From: "Chee, Tien Fong"
Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file") miss out cleaning macro in this header file, and this
has broken implementation of a boot header capability in socfpga
SPL. Remove the macro in this file, and recovering it back
to proper func
From: Tien Fong Chee
This is the 11th version of patchset to adds support for Intel Arria 10 SoC FPGA
driver. This version mainly resolved comments from Dinh in [v10]. This series is
working on top of u-boot-socfpga.git - http://git.denx.de/u-boot-socfpga.git
[v10]: https://www.mail-archive.com
From: Tien Fong Chee
This is the 11th version of patchset to adds support for Intel Arria 10 SoC FPGA
driver. This version mainly resolved comments from Dinh in [v10]. This series is
working on top of u-boot-socfpga.git - http://git.denx.de/u-boot-socfpga.git
[v10]: https://www.mail-archive.com
From: Tien Fong Chee
Remove parameter from socfpga_bridges_reset(), and keeping this function
for single purpose which is just triggering reset on bridges.
socfpga_reset_deassert_bridges_handoff() can be called for releasing reset
on any bridges based on the bridge setting defined in fdt
From: Tien Fong Chee
Add FPGA driver support for Arria 10.
Signed-off-by: Tien Fong Chee
Reviewed-by: Ley Foon Tan
Reviewed-by: Dinh Nguyen
---
arch/arm/mach-socfpga/include/mach/fpga_manager.h | 2 +
.../include/mach/fpga_manager_arria10.h| 100 +
configs
From: Tien Fong Chee
Move FPGA driver which is Gen5 specific code into Gen5 driver file
and keeping common FPGA driver intact. All the changes are still keeping
in driver/fpga/ and no functional change. Subsequent patch would move
FPGA manager driver from arch/arm into driver/fpga/.
Signed-off
From: Tien Fong Chee
This converts the following to Kconfig:
CONFIG_FPGA_SOCFPGA
Signed-off-by: Tien Fong Chee
Reviewed-by: Ley Foon Tan
Reviewed-by: Dinh Nguyen
---
configs/socfpga_arria5_defconfig | 1 +
configs/socfpga_cyclone5_defconfig | 1 +
configs
From: Tien Fong Chee
This converts the following to Kconfig:
CONFIG_FPGA
CONFIG_FPGA_ALTERA
Signed-off-by: Tien Fong Chee
Reviewed-by: Ley Foon Tan
Reviewed-by: Dinh Nguyen
---
configs/astro_mcf5373l_defconfig| 1 +
configs/theadorable_debug_defconfig | 1 +
configs
From: Tien Fong Chee
Enable FPGA driver build for SPL because FPGA driver is needed for SPL
to configure and getting DDR up before loading U-boot into DDR and
booting from there.
Signed-off-by: Tien Fong Chee
Reviewed-by: Ley Foon Tan
Reviewed-by: Dinh Nguyen
---
drivers/Makefile | 1 +
1
1 - 100 of 494 matches
Mail list logo
