From: Tien Fong Chee <tien.fong.c...@intel.com> Add support for loading FPGA bitstream to get DDR up running before U-Boot is loaded into DDR. Boot device initialization, generic firmware loader and SPL FAT support are required for this whole mechanism to work.
Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com> --- arch/arm/mach-socfpga/spl_a10.c | 49 ++++++++++++++++++++++++++++++++++++++- common/spl/spl_mmc.c | 2 +- include/mmc.h | 1 + 3 files changed, 50 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index 3ea64f7..67a4fac 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2012 Altera Corporation <www.altera.com> + * Copyright (C) 2012-2018 Altera Corporation <www.altera.com> */ #include <common.h> @@ -23,6 +23,10 @@ #include <fdtdec.h> #include <watchdog.h> #include <asm/arch/pinmux.h> +#include <asm/arch/fpga_manager.h> +#include <mmc.h> + +#define RBF 0 DECLARE_GLOBAL_DATA_PTR; @@ -73,6 +77,49 @@ void spl_board_init(void) WATCHDOG_RESET(); arch_early_init_r(); + + /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */ + if (is_fpgamgr_user_mode()) { + config_pins(gd->fdt_blob, "shared"); + config_pins(gd->fdt_blob, "fpga"); + } else if (!is_fpgamgr_early_user_mode()) { + /* Program IOSSM(early IO release) or full FPGA */ + fpga_fs_info fpga_fsinfo; + char buf[16 * 1024] __aligned(ARCH_DMA_MINALIGN); + struct spl_boot_device bootdev; + int len = 0; + + bootdev.boot_device = spl_boot_device(); + + /* Init MMC driver before reading FPGA bitstream from flash */ + if (bootdev.boot_device == BOOT_DEVICE_MMC1) { + struct mmc *mmc = NULL; + int err = 0; + + err = spl_mmc_find_device(&mmc, bootdev.boot_device); + if (err) + return; + + err = mmc_init(mmc); + + if (err) { + debug("spl: mmc init failed with error: %d\n", + err); + + return; + } + } + + fpga_fsinfo.filename = (char *)get_fpga_filename(gd->fdt_blob, + &len, + RBF); + + socfpga_loadfs(&fpga_fsinfo, buf, sizeof(buf), 0); + } + + /* If the IOSSM/full FPGA is already loaded, start DDR */ + if (is_fpgamgr_early_user_mode() || is_fpgamgr_user_mode()) + ddr_calibration_sequence(); } void board_init_f(ulong dummy) diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index 4d55dcc..b85e146 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -111,7 +111,7 @@ static int spl_mmc_get_device_index(u32 boot_device) return -ENODEV; } -static int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device) +int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device) { #if CONFIG_IS_ENABLED(DM_MMC) struct udevice *dev; diff --git a/include/mmc.h b/include/mmc.h index 95548e9..de92909 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -829,6 +829,7 @@ int board_mmc_init(bd_t *bis); int cpu_mmc_init(bd_t *bis); int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); int mmc_get_env_dev(void); +int spl_mmc_find_device(struct mmc **mmcp, u32 boot_device); /* Set block count limit because of 16 bit register limit on some hardware*/ #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT -- 1.7.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot