From: Tien Fong Chee <tien.fong.c...@intel.com>
This is minimum memory pool size required to get SPL booting to U-Boot,
such as FPGA program and loading U-Boot image from FAT.
Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com>
---
include/configs/socfpga_common.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index bd8f5c8..93273a8 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -258,7 +258,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
/* SPL memory allocation configuration, this is for FAT implementation */
#ifndef CONFIG_SYS_SPL_MALLOC_START
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00012000
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \
CONFIG_SYS_SPL_MALLOC_SIZE + \
CONFIG_SYS_INIT_RAM_ADDR)
--
1.7.7.4
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