From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-im
From: Peng Fan
Convert all i.MX93 boards to OF_UPSTREAM.
Add lpi2c2 nodes for imx93-11x11-evk-u-boot.dtsi.
Add usbotg1 nodes in imx93-u-boot.dtsi and board u-boot.dtsi.
The nodes could be removed after upstream linux supports them.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile
A few nodes were added to soc and board u-boot.dtsi(lpi2c, usbotg), those nodes
could be dropped after upstream linux supports them.
To support OF_UPSTREAM, a few driver changes are included.
For TMU, still use U-Boot node, I will prepare a kernel update,
then back to U-Boot support.
Mathieu: pl
From: Peng Fan
The i.MX8ULP/93 gpio dt-schema have been updated to only have one
address entry, update the driver to support it.
Signed-off-by: Peng Fan
---
drivers/gpio/imx_rgpio2p.c | 42 ++
1 file changed, 38 insertions(+), 4 deletions(-)
diff --git
From: Peng Fan
To i.MX7ULP compatible lpuart, there is only ipg clk, no per clk.
So add a devtype check for i.MX7ULP.
Signed-off-by: Peng Fan
---
drivers/serial/serial_lpuart.c | 42 ++
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/driv
From: Peng Fan
This was wrongly committed, no user, remove it.
Signed-off-by: Peng Fan
---
drivers/cpu/imx9_cpu.c | 224 -
1 file changed, 224 deletions(-)
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
ind
From: Peng Fan
The PLL clk needs use anatop base, otherwise wrong PLL address will
be used.
Fixes: 9c153e46661b ("clk: imx: add i.MX93 CCF driver")
Signed-off-by: Peng Fan
---
drivers/clk/imx/clk-imx93.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-im
From: Peng Fan
Convert all i.MX93 boards to OF_UPSTREAM.
Add lpi2c2 nodes for imx93-11x11-evk-u-boot.dtsi.
Add usbotg1 nodes in imx93-u-boot.dtsi and board u-boot.dtsi.
The nodes could be removed after upstream linux supports them.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile
From: Peng Fan
patch 1 is to avoid build break when using upstream dts
Patch 2 is moving to OF_UPSTREAM
This is a resend of V3 imx93: Conver to OF_UPSTREAM patch 5,6
Peng Fan (2):
dt-bindings: imx93: sync clock header
imx: imx93-11x11-evk: convert to OF_UPSTREAM
arch/arm/dts/Makefile
From: Peng Fan
Sync clock header with kernel 6.8
Signed-off-by: Peng Fan
---
include/dt-bindings/clock/imx93-clock.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/imx93-clock.h
b/include/dt-bindings/clock/imx93-clock.h
index 35a1f62053a..787c9
From: Peng Fan
Convert to OF_UPSTREAM for i.MX93 11x11 EVK.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile| 1 -
arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 118 +
arch/arm/dts/imx93-11x11-evk.dts | 322 ---
arch/arm/dts/imx93-u-boot.
From: Peng Fan
obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += xyzModem.o is there,
no need obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
Signed-off-by: Peng Fan
---
common/Makefile | 1 -
1 file changed, 1 deletion(-)
diff --git a/common/Makefile b/common/Makefile
index bcf352d016..daeea67cf2 10
From: Peng Fan
No need to build nvedit.c when CONFIG_$(SPL_)ENV_SUPPORT is n
Signed-off-by: Peng Fan
---
cmd/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/Makefile b/cmd/Makefile
index dd86675bf2..2b2a0c26a6 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -20
From: Peng Fan
If no need cache support, not build the cache files, such as in SPL.
Signed-off-by: Peng Fan
---
arch/arm/cpu/armv8/Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 93d26f9856..0f49969
From: Ye Li
Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10us
Signed-off-by: Ye Li
Reviewed-by: Fugang Duan
Signed-off-by: Peng Fan
---
drivers/net/dwc_eth_qos.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Peng Fan
Add board code to configure the network interface
Add net defconfig
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 +
board/freescale/imx8mp_evk/imx8mp_evk.c| 81 ++
configs/imx8mp_evk_defconfig | 11 +++
include
From: Peng Fan
use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board, we will use
CONFIG_TARGET_IMX8MN_EVK for LPDDR4 EVK board.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig| 2 +-
board/freescale/imx8mn_evk/Kconfig | 2 +-
configs/imx8mn_ddr4_evk_defconfig | 2 +-
3 files c
From: Ye Li
Enable print to show the DRAM rate of current setting and training
result.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
drivers/ddr/imx/imx8m/ddr_init.c | 7 ---
drivers/ddr/imx/imx8m/ddrphy_utils.c | 2 +-
2 files changed, 5 insertions(+), 4 del
From: Ye Li
When doing DDR scrub, the DDR may enter into self refresh if the
selfref_en is enabled before DDR scrub. This will cause scrub
can't complete that SBRSTAT.scrub_done won't be set.
Since the selfref_en can be programmed during the course of
normal operation, move it after DDR scrub
S
From: Peng Fan
Move SP to end of OCRAM space. Drop MALLOC_F to make it alloc from
stack space.
Signed-off-by: Peng Fan
---
drivers/power/power_i2c.c| 8
include/configs/imx8mn_evk.h | 9 +++--
2 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/drivers/power/power_
From: Peng Fan
Add type of set_clk_eqos to make it could be used by other files.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/clock.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-imx8m/clock.h
b/arch/arm/include/asm/arch-imx8m/clock.h
index 87cc
From: Peng Fan
i.MX8MN LPDDR4 EVK reuses most code of i.MX8MN DDR4 EVK code,
with adding a new ddr script.
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile |1 +
arch/arm/dts/imx8mn-evk-u-boot.dtsi |6 +
arch/arm/dts/imx8mn-evk.dts |
From: Peng Fan
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mm-evk.dts | 534 ---
arch/arm/dts/imx8mm-evk.dtsi | 489 +
ar
From: Peng Fan
The minimum alignment is 16 bytes, so use align 4 is enough.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/lowlevel_init.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx8m/lowlevel_init.S
b/arch/arm/mach-imx/imx8m/lowlevel_init.S
From: Peng Fan
move CONFIG_SPL_SYS_[I,D]CACHE_OFF to defconfig
Signed-off-by: Peng Fan
---
configs/imx8mn_ddr4_evk_defconfig | 2 ++
configs/imx8mn_evk_defconfig | 2 ++
configs/imx8mp_evk_defconfig | 2 ++
include/configs/imx8mn_evk.h | 2 --
include/configs/imx8mp_evk.h |
From: Peng Fan
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mp-evk.dts | 117 +++-
arch/arm/dts/imx8mp-pinfunc.h| 360 +++
arch/arm/dts/im
From: Peng Fan
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-evk.dts | 186 +--
arch/arm/dts/imx8mq-pinfunc.h| 623 +++
arch/arm/dts/imx
From: Peng Fan
Add board code to configure the network interface
Add net defconfig
Signed-off-by: Peng Fan
---
V2:
Use phy-reset-gpios
Use void for setup_fec
Drop empty lines
arch/arm/dts/imx8mp-evk-u-boot.dtsi| 4 ++
arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 +
board/frees
From: Peng Fan
use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board, we will use
CONFIG_TARGET_IMX8MN_EVK for LPDDR4 EVK board.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig| 2 +-
board/freescale/imx8mn_evk/Kconfig | 2 +-
configs/imx8mn_ddr4_evk_defconfig | 2 +-
3 files c
From: Ye Li
When doing DDR scrub, the DDR may enter into self refresh if the
selfref_en is enabled before DDR scrub. This will cause scrub
can't complete that SBRSTAT.scrub_done won't be set.
Since the selfref_en can be programmed during the course of
normal operation, move it after DDR scrub
S
From: Peng Fan
Move SP to end of OCRAM space. Drop MALLOC_F to make it alloc from
stack space.
Signed-off-by: Peng Fan
---
V2:
Typo fixes
drivers/power/power_i2c.c| 8
include/configs/imx8mn_evk.h | 7 ++-
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drive
From: Peng Fan
Add type of set_clk_eqos to make it could be used by other files.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/clock.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-imx8m/clock.h
b/arch/arm/include/asm/arch-imx8m/clock.h
index 87cc
From: Peng Fan
i.MX8MN LPDDR4 EVK reuses most code of i.MX8MN DDR4 EVK code,
with adding a new ddr script.
Signed-off-by: Peng Fan
---
V2:
Update doc
arch/arm/dts/Makefile |1 +
arch/arm/dts/imx8mn-evk-u-boot.dtsi |6 +
arch/arm/dts/imx8mn-evk.dts
From: Peng Fan
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mm-evk.dts | 534 ---
arch/arm/dts/imx8mm-evk.dtsi | 489 +
ar
From: Peng Fan
The minimum alignment is 16 bytes, so use align 4 is enough.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/lowlevel_init.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx8m/lowlevel_init.S
b/arch/arm/mach-imx/imx8m/lowlevel_init.S
From: Peng Fan
move CONFIG_SPL_SYS_[I,D]CACHE_OFF to defconfig
Signed-off-by: Peng Fan
---
configs/imx8mn_ddr4_evk_defconfig | 2 ++
configs/imx8mn_evk_defconfig | 2 ++
configs/imx8mp_evk_defconfig | 2 ++
include/configs/imx8mn_evk.h | 2 --
include/configs/imx8mp_evk.h |
From: Peng Fan
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-evk.dts | 186 +--
arch/arm/dts/imx8mq-pinfunc.h| 623 +++
arch/arm/dts/imx
From: Peng Fan
Sync dts from Linux Kernel
commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc")
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mp-evk.dts | 117 +++-
arch/arm/dts/imx8mp-pinfunc.h| 360 +++
arch/arm/dts/im
From: Peng Fan
Drop CONFIG_SYS_[I,D]CACHE_OFF in SPL stage
Signed-off-by: Peng Fan
---
This is to replace
https://patchwork.ozlabs.org/project/uboot/patch/20210103101144.4375-12-peng@oss.nxp.com/
include/configs/imx8mn_evk.h | 2 --
include/configs/imx8mp_evk.h | 2 --
2 files changed, 4
From: Peng Fan
Drop CONFIG_SYS_[I,D]CACHE_OFF, it is safe to run with caches enabled on
these platforms.
Signed-off-by: Peng Fan
---
V2:
Update subject/commit Per Fabio's comments
include/configs/imx8mn_evk.h | 2 --
include/configs/imx8mp_evk.h | 2 --
2 files changed, 4 deletions(-)
diff
From: Peng Fan
Implement armv8_el2_to_aarch32 for aarch64 U-Boot booting aarch32 SMP
linux. It will trap to ATF to let ATF handle the mode switching.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/lowlevel.S | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/m
From: Ye Li
Fix Coverity Issue 9006655. In write_fcb, leak of memory to resource
"fcb_raw_page". Since we have initialized the "ret" to 0, should return
the value of ret.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_nandbcb.c | 2 --
1 file cha
From: Ye Li
Fix Coverity Issue 9006654. In write_fcb, use of an uninitialized
variable "ret".
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_nandbcb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/cmd_nandb
From: Ye Li
Fix Coverity Issue 9006657. In read_fcb, leak of memory to system
resource "fcb_raw_page". Adjust the sequence to check the mtd bad
block prior than allocation of "fcb_raw_page", also check the NULL
return of allocation.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Pen
From: Ye Li
Fix Coverity Issue 9006658. In fill_dbbt_data, an integer overflow occurs,
with the result converted to a wider integer type
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_nandbcb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
From: Ye Li
Fix Coverity Issue 9006656. In nandbcb_set_boot_config, an integer overflow
occurs, with the result converted to a wider integer type.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_nandbcb.c | 3 ++-
1 file changed, 2 insertions(+),
From: Han Xu
Add NAND boot support for i.MX8MP by adding i.MX8MP in nandbcb support
list, reading boot_search_count from fuse.
i.MX8MN NAND boot is same as i.MX8MP, fix some issues as well.
Signed-off-by: Han Xu
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_nandbcb.c
From: Ye Li
iMX8MP has shifted market segment fuse one bit from 0x440 [7:6] to [6:5],
correct it in imx common codes.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cpu.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch
From: Ye Li
Since we remove SATA device before boot OS, when AHCI is enabled, update
the codes to remove AHCI device.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cpu.c | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/a
From: Peng Fan
When boot type could not be detected from rom sw info,
read sbmr1 to detect, here we only use it to detect FLEXSPI
boot, because ROM not update it in rom sw info.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cpu.c | 6 --
arch/arm/mach-imx/spl.c | 2 ++
2 files changed, 6 i
From: Ye Li
Since we enabled MMC alias, the USDHC index in u-boot is the usdhc port.
So we don't need to convert them for kernel and u-boot env device.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8/cpu.c| 2 +-
arch/arm/mach-imx/mmc_env.c
From: Frank Li
uuu can change emmc device number for fastboot
Signed-off-by: Frank Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/mmc_env.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/mmc_env.c b/arch/arm/mach-imx/mmc_env.c
index 9c1d3cdfcb..22d8daa
From: Ye Li
Modify the GPT common platform driver for mx7 which only use 24Mhz
OSC as clock source.
Note: at default, the mx7d will use system counter as timer. The GPT
is disabled.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/timer.c | 16 +---
1 file chang
From: Peng Fan
This patchset is to upstream NXP downstream patches targeting
next release: 2021.07.
- Enviorment cleanup
- ddr script update for ddr4/lpddr4 boards
- update fuse path
- Support i.MX8MQ B2
- Add i.MX8MN 11*11 variant
- Change pca9450 API accepting address
Jacky Bai (1):
i
From: Peng Fan
Fix the warning by set the variable zero to uint64_t
"warning: ‘write’ reading 5 bytes from a region of size 4"
Signed-off-by: Peng Fan
---
tools/imx8image.c | 2 +-
tools/imx8mimage.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/imx8image.c b/to
From: Ye Li
Update LPDDR4 script to sync with v2020.04 u-boot
Signed-off-by: Ye Li
---
board/freescale/imx8mm_evk/lpddr4_timing.c | 692 +
1 file changed, 280 insertions(+), 412 deletions(-)
diff --git a/board/freescale/imx8mm_evk/lpddr4_timing.c
b/board/freescale/imx8mm_
From: Ye Li
Update PMIC to use PCA9540, the legacy board not supported by NXP
Signed-off-by: Ye Li
---
arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 +-
arch/arm/dts/imx8mm-evk.dtsi| 127 +++-
board/freescale/imx8mm_evk/spl.c| 33
configs/imx8mm_evk_de
From: Peng Fan
These files should not be in U-Boot repo
Signed-off-by: Peng Fan
---
board/freescale/imx8mm_evk/boot.cmd | 35 -
board/freescale/imx8mp_evk/boot.cmd | 25 -
2 files changed, 60 deletions(-)
delete mode 100644 board/freescale/imx8m
From: Peng Fan
Add fdt_addr_r fdtfile which used by distro boot
Clean up environment
Signed-off-by: Peng Fan
---
include/configs/imx8mm_evk.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index fd9a6cbb8c
From: Peng Fan
Add fdt_addr_r fdtfile which used by distro boot
Clean up environment
Signed-off-by: Peng Fan
---
include/configs/imx8mp_evk.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index 61a5c6fb79
From: Ye Li
After switching to new LPDDR4 firmware 202006 version, have to
update the LPDDR4 timing accordingly from RPA tool.
Signed-off-by: Ye Li
Tested-by: Sherry Sun
Tested-by: Jacky Bai
Reviewed-by: Jacky Bai
Signed-off-by: Peng Fan
---
board/freescale/imx8mp_evk/lpddr4_timing.c | 189
From: Sherry Sun
Add inline ECC support for lpddr4 on imx8mp-evk. And add a config which
can enable/disable inline ECC feature for lpddr4 on imx8mp-evk board.
Signed-off-by: Sherry Sun
Signed-off-by: Peng Fan
---
board/freescale/imx8mp_evk/lpddr4_timing.c | 27 ++
1 file c
From: Ye Li
Use more safer refresh time value for 6GB LPDDR4 on this EVK board.
Update the parameters for every frequency point.
Signed-off-by: Ye Li
Reviewed-by: Jacky Bai
Signed-off-by: Peng Fan
---
board/freescale/imx8mp_evk/lpddr4_timing.c | 12 ++--
1 file changed, 6 insertions(
From: Peng Fan
There is a frequency/timing limitation for SOC and ARM, if SOC is OD
voltage/OD freq, then ARM can't run at ND voltage/1.2Ghz, it may have
timing risk from SOC to ARM.
Current VDD_SOC is set to 0.95v OD voltage in SPL, and kernel will
increase bus clocks to OD frequency before it
From: Peng Fan
Clean up the including headers
Signed-off-by: Peng Fan
---
board/freescale/imx8mp_evk/spl.c | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index 3f043c2b2e..ef14cfc227 100
From: "haidong.zheng"
VDD SOC normal run changed to 0.85V
LPDDR4 freq0 change from 4000MTS to 2400MTS
Signed-off-by: haidong.zheng
Signed-off-by: Peng Fan
---
board/freescale/imx8mp_evk/lpddr4_timing.c | 166 +
board/freescale/imx8mp_evk/spl.c | 5 +
drivers/dd
From: Peng Fan
Currently PCA9450 might have address 0x25 or 0x35, so let user
choose the address.
Signed-off-by: Peng Fan
---
board/freescale/imx8mp_evk/spl.c | 2 +-
board/phytec/phycore_imx8mp/spl.c | 2 +-
drivers/power/pmic/pmic_pca9450.c | 4 ++--
include/power/pca9450.h | 2 +-
From: Peng Fan
uart clk has been enabled, no need enable again.
Signed-off-by: Peng Fan
---
board/freescale/imx8mn_evk/spl.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
index 6d5c7a5b46..80f79ce888 100644
--- a/board/
From: Jacky Bai
On i.MX8MN, we can only support DLL-ON mode only, so update the timing
to support 2400mts & 1066mts setpoint.
Signed-off-by: Jacky Bai
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
board/freescale/imx8mn_evk/ddr4_timing.c | 1057 +-
1 file changed, 449 in
From: Peng Fan
Add support for iMX8MN LPDDR4 EVK board which uses 2GB LPDDR4 and
PCA9450B PMIC.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/dts/Makefile |1 +
arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi |3 +
arch/arm/dts/imx8mn-evk-u-boot.dtsi
From: Peng Fan
Use NXP logo. The vendor and board dir not changed,
only replace the content of freescale.bmp.
Signed-off-by: Peng Fan
---
tools/logos/freescale.bmp | Bin 46738 -> 47670 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
diff --git a/tools/logos/freescale.bmp b/tools/logos/
From: Ye Li
There are 3 part numbers for 11x11 i.MX8MNano with different core number
configuration: UltraLite Quad/Dual/Solo
Comparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So
checking the MIPI DSI disable fuse to recognize these parts.
Signed-off-by: Ye Li
Reviewed-by: Peng Fa
From: Ye Li
For dual core and single core iMX8M parts, the thermal node and PMU node
in kernel DTB also needs update to remove the refers to deleted core nodes.
Otherwise both driver will fail to work.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/i
From: Peng Fan
Update fuse path to disable modules correctly.
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 6
From: Ye Li
Add dedicated defconfigs for iMX8MN low drive mode which set the VDD_SOC
and VDD_DRAM to 0.8v, DDR at 1600MTS (800Mhz clock) and GPU at 200Mhz.
Signed-off-by: Ye Li
Acked-by: Peng Fan
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 45 +
board/freesc
From: Ye Li
Users reported LPDDR4 MR12 value is set to 0 during PHY training,
not the value from FSP timing structure, which cause compliance test failed.
The root cause is the CATrainOpt[0] is set to 1 in 2D FSP timing
but not set in 1D. According to PHY training application node,
to enable the
From: Ye Li
i.MX8MQ B2 is using same value in OCOTP_READ_FUSE_DATA like B1, so
we have to check the ROM verision to distinguish the revision.
As we have checked the B1 rev for sticky bits work around in
secure boot. So it won't apply on B2.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-of
From: Peng Fan
The value of Unique ID in uboot and kernel is different for iMX8MP:
serial#=02e1444a0002aaff
root@imx8mpevk:/sys/devices/soc0# cat soc_uid
D69932E1444A
The reason is that Fuse Addresses of Unique ID of iMX8MP are 0x420 and
0x430.
Reviewed-by: Ye Li
Signed-off-by: Alice Guo
From: Ye Li
Both i.MX8MQ B1 and B2 should use default LPDDR4 script, while B0
has another dedicated script.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
board/freescale/imx8mq_evk/spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freesc
From: Ye Li
i.MX8MQ B2 also has fixed value in OCOTP_READ_FUSE_DATA register,
so it does not support "fuse sense" command like B1.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
Signed-off-by: Peng Fan
---
drivers/misc/mxc_ocotp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
> Subject: Re: [PATCH 02/26] imx8mm_evk: Update to latest LPDDR4 script
>
> On Fri, Mar 19, 2021 at 12:26 AM Peng Fan (OSS)
> wrote:
> >
> > From: Ye Li
> >
> > Update LPDDR4 script to sync with v2020.04 u-boot
> >
> > Signed-off-by: Ye Li
>
On 2021/3/25 16:14, Stefano Babic wrote:
Hi Tim,
On 24.03.21 22:25, Tim Harvey wrote:
On Fri, Mar 19, 2021 at 12:31 AM Peng Fan (OSS)
wrote:
From: Ye Li
Users reported LPDDR4 MR12 value is set to 0 during PHY training,
not the value from FSP timing structure, which cause compliance
From: Peng
This patchset is to upstream NXP downstream caam, hab features
One more patch is to update maintainer for imx8mn_evk board.
Aymen Sghaier (6):
crypto: caam: Add CAAM support to i.MX8M platforms
crypto: caam: Fix build warnings pointer casting
crypto: Add blob command support for
From: Peng
Add imx8mn_evk_defconfig to be maintained
Typo fix
Signed-off-by: Peng
---
board/freescale/imx8mn_evk/MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/freescale/imx8mn_evk/MAINTAINERS
b/board/freescale/imx8mn_evk/MAINTAINERS
index 3b0653d3c8..
From: Peng Fan
Add regs used by CAAM
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h
b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 49bac8c1fa..b800da13a1 1006
From: Breno Lima
The CAAM output ring size register offset is currently defined in fsl_sec.h
as FSL_CAAM_ORSR_JRa_OFFSET, use this definition to avoid hardcoded value in
i.MX common code.
Signed-off-by: Breno Lima
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_dek.c
From: Breno Lima
This code was originally developed by Raul Cardenas
and modified to be applied in U-Boot imx_v2017.03.
More information about the initial submission can be seen
in the link below:
https://lists.denx.de/pipermail/u-boot/2016-February/245273.html
i.MX7D has an a protection featu
From: Ye Li
When loading kernel image, the image size is parsed from header, so it
does not include the CSF and IVT.
Add back the authenticate_image function to wrap the imx_hab_authenticate_image
with calculating IVT offset and full image size.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
--
From: Breno Lima
Prior instantiating RNG we have to ensure if the CAAM job rings are
available. Avoid hardcoded job ring max size and use the definition at
fsl_sec.h
Signed-off-by: Breno Lima
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_dek.c | 3 +--
arch/arm/mac
From: Breno Lima
Prior calling sec_in32() we have to ensure CAAM clock is enabled, the
function sec_in32() is reading CAAM registers and if CAAM clock is disabled
the system will hang.
Signed-off-by: Breno Lima
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cmd_dek.c |
From: Peng Fan
There are some changes to support ARM64 i.MX8M platform in this patches:
1. The hab_rvt base and function vectors are different as i.MX6/7
2. Need to bypass an workaround for i.MX6 to fix problem in MMU.
3. The x18 register needed save & restore before calling any HAB API. Accord
From: Ye Li
Modify to use hab_rvt_failsafe function for failsafe ROM API, not
directly call its ROM address. This function will wrap the sip call for iMX8M
platforms.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/hab.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a
From: Utkarsh Gupta
Calling csf_is_valid() with an un-signed image may lead to data abort
as the CSF pointer could be pointing to a garbage address when accessed
in HAB_HDR_LEN(*(const struct hab_hdr *)(ulong)ivt_initial->csf).
Authenticate image from DDR location 0x8080...
Check CSF for Wri
From: Breno Lima
Currently it's not possible to authenticate additional boot images in HAB
open configuration.
The hab.c code is checking if the SEC_CONFIG[1] fuse is programmed prior
to calling the hab_authenticate_image() API function. Users cannot check
if their additional boot images has bee
From: Utkarsh Gupta
Add ability for hab_status command to show All HAB events and not just
HAB failure events
Signed-off-by: Utkarsh Gupta
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/hab.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/m
From: Ye Li
The imx8mm has changed the address of rvt_hab, use new address for imx8mm.
The authentication procedure is same as imx8mq. In u-boot, the authentication
uses SIP call to trap ATF to run HAB authenticate.
Users need to add CONFIG_SECURE_BOOT=y to defconfig to enable the feature.
Sig
From: Breno Lima
The HABv4 implementation in ROM checks if HAB major version
in IVT header is 4.x.
The current implementation in hab.c code is only validating
HAB v4.0 and HAB v4.1 and may be incompatible with newer
HABv4 versions.
Modify verify_ivt_header() function to align with HABv4
impleme
From: Breno Lima
When building 32-bit targets with CONFIG_SECURE_BOOT and DEBUG enabled
the following warnings are displayed:
arch/arm/mach-imx/hab.c:840:41: warning: format '%lx' expects argument \
of type 'long unsigned int', but argument 3 has type 'uint32_t \
{aka unsigned int}' [-Wformat=]
From: Breno Lima
When booting in low power or dual boot modes the M4 binary is
authenticated by the M4 ROM code.
Add an option in hab_status command so users can retrieve M4 HAB
failure and warning events.
=> hab_status m4
Secure boot disabled
HAB Configuration: 0xf0, HAB State: 0x66
From: Breno Lima
The blob command is not working on i.MX7D, i.MX8MQ and i.MX8MM
devices.
Due to different cache management it's necessary to flush dcache
range for destination address so data can be available in memory.
Add necessary operations in blob_encap() and blob_decap() functions.
Signe
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