This patch adds Microchip MPFS Icicle board support.
For now, NS16550 serial driver is only enabled.
The Microchip MPFS Icicle defconfig by default builds
U-Boot for M-Mode with SMP support.
Signed-off-by: Padmarao Begari
Reviewed-by: Bin Meng
---
Changes in V4
- Remove CONFIG_DISTRO_DEFAULTS
Reviewed-by: Padmarao Begari
Tested-by: Padmarao Begari
Regards
Padmarao
On Tue, Jul 9, 2019 at 5:56 PM Sagar Shrikant Kadam
wrote:
> In y-modem transfer mode, tstc/getc fail to check if there is any
> data available / received in RX FIFO, and so y-modem transfer never
> succee
instead of UART0, UART0 is reserved for Hart
Software Services, common device node for eMMC/SD, add Microchip
I2C driver and default build for SBI_V02.
Padmarao Begari (5):
riscv: dts: Split Microchip device tree
riscv: Update Microchip MPFS Icicle Kit support
i2c: Add Microchip PolarFire SoC
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip I2C driver, set environment variables for
mac addesses and default build for SBI_V02.
Signed-off-by: Padmarao Begari
---
board/microchip/mpfs_icicle/Kconfig | 5 +
board/microchip/mpfs_icicle/mpfs_icicle.c
UART1 uses for U-BOOT and Linux console instead of UART0 and
UART0 is reserved for Hart Software Services(HSS).
Signed-off-by: Padmarao Begari
---
doc/board/microchip/mpfs_icicle.rst | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/doc/board/microchip
The device tree split into .dtsi and .dts files, common
device node for eMMC/SD, enable I2C1, UART1 for console
instead of UART0, enable the DDR 2GB memory and in
that 288MB memory is reserved for fabric buffer.
Signed-off-by: Padmarao Begari
---
arch/riscv/dts/microchip-mpfs-icicle-kit.dts
Add I2C driver code for the Microchip PolarFire SoC.
This driver supports I2C data transfer and probe for I2C
slave addresses.
Signed-off-by: Padmarao Begari
---
drivers/i2c/Kconfig | 6 +
drivers/i2c/Makefile| 1 +
drivers/i2c/i2c-microchip.c | 482
Update compatible as per Microchip PolarFire SoC ethernet
device node.
Signed-off-by: Padmarao Begari
---
drivers/net/macb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 8c6461e717..1b867bd5c2 100644
--- a/drivers/net/macb.c
Hi Bin,
On Mon, Nov 1, 2021 at 2:11 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Fri, Oct 22, 2021 at 4:58 PM Padmarao Begari
> wrote:
> >
> > The device tree split into .dtsi and .dts files, common
> > device node for eMMC/SD, enable I2C1, UART1 for console
> &
On Mon, Nov 1, 2021 at 2:13 PM Bin Meng wrote:
> On Fri, Oct 22, 2021 at 4:58 PM Padmarao Begari
> wrote:
> >
> > This patch updates Microchip MPFS Icicle Kit support. For now,
> > add Microchip I2C driver, set environment variables for
> > mac addesses
Hi Bin,
On Mon, Nov 1, 2021 at 2:15 PM Bin Meng wrote:
> On Fri, Oct 22, 2021 at 4:58 PM Padmarao Begari
> wrote:
> >
> > Update compatible as per Microchip PolarFire SoC ethernet
> > device node.
> >
> > Signed-off-by: Padmarao Begari
> > ---
Hi Bin,
On Mon, Nov 1, 2021 at 2:16 PM Bin Meng wrote:
> On Fri, Oct 22, 2021 at 4:58 PM Padmarao Begari
> wrote:
> >
> > UART1 uses for U-BOOT and Linux console instead of UART0 and
>
> nits: s/U-BOOT/U-Boot
>
>
ok
> > UART0 is reserved for Hart Software
Hi Bin,
On Tue, Nov 2, 2021 at 6:16 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Tue, Nov 2, 2021 at 7:03 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Mon, Nov 1, 2021 at 2:15 PM Bin Meng wrote:
> >>
> >> On Fri, Oct 22, 2021 at 4:5
Hi Bin,
On Wed, Nov 3, 2021 at 5:17 PM Padmarao Begari wrote:
> Hi Bin,
>
> On Tue, Nov 2, 2021 at 6:16 PM Bin Meng wrote:
>
>> Hi Padmarao,
>>
>> On Tue, Nov 2, 2021 at 7:03 PM Padmarao Begari
>> wrote:
>> >
>> > Hi Bin,
&g
Hi Bin,
On Thu, Nov 11, 2021 at 1:37 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Nov 11, 2021 at 2:11 PM wrote:
> >
> > Hi Bin,
> >
> >
> >
> > Do we need to upstream Linux kernel bindings for Microchip MACB
> compatible if there is no change in Linux MACB driver?
> >
> > Are the Linux mainta
Hi Bin,
On Fri, Nov 12, 2021 at 6:58 AM Bin Meng wrote:
> On Thu, Nov 11, 2021 at 9:17 PM wrote:
> >
> > > I agree with Bin here. You shouldn't introduce a new compatible just
> for
> > > u-boot. If you need one, please to it first in linux and get an ACK
> there.
> > > Or at least there should
Hi Anup,
On Sat, Oct 17, 2020 at 3:01 PM Anup Patel wrote:
> On Fri, Oct 16, 2020 at 7:54 PM wrote:
> >
> > From: Padmarao Begari
> >
> > This patch set adds Microchip PolarFire SoC Icicle Kit support
> > to RISC-V U-Boot.
> >
> > The patches
Hi Anup,
On Sat, Oct 17, 2020 at 3:17 PM Anup Patel wrote:
> On Fri, Oct 16, 2020 at 7:55 PM wrote:
> >
> > From: Padmarao Begari
> >
> > This doc describes the procedure to build, flash and
> > boot Linux using U-boot on Microchip MPFS Icicle Kit.
>
On Sun, Oct 18, 2020 at 6:37 AM Sean Anderson wrote:
> On 10/16/20 10:23 AM, padmarao.beg...@microchip.com wrote:
> > From: Padmarao Begari
> >
> > This patch adds Microchip MPFS Icicle Kit support. For now, only
> > NS16550 Serial, Microchip clock, Cadence eMMC an
Hi anup,
On Sat, Oct 17, 2020 at 3:10 PM Anup Patel wrote:
> On Fri, Oct 16, 2020 at 7:54 PM wrote:
> >
> > From: Padmarao Begari
> >
> > Add device tree for Microchip PolarFire SoC Icicle Kit.
> >
> > Signed-off-by: Padmarao Begar
On Sun, Oct 18, 2020 at 7:12 AM Sean Anderson wrote:
> On 10/16/20 10:23 AM, padmarao.beg...@microchip.com wrote:
> > From: Padmarao Begari
> >
> > Add device tree for Microchip PolarFire SoC Icicle Kit.
> >
> > Signed-off-by: Padmarao Begari
>
On Sat, Oct 17, 2020 at 3:11 PM Anup Patel wrote:
> On Fri, Oct 16, 2020 at 7:54 PM wrote:
> >
> > From: Padmarao Begari
> >
> > Add indexes for reset and clock control signals within the system
> register
> > module of the Microchip PolarFire SoC.
>
&g
Enable 64-bit DMA support in the macb driver when CONFIG_DMA_ADDR_T_64BIT
is enabled. 32-bit DMA is enabled by default.
Signed-off-by: Padmarao Begari
---
drivers/net/macb.c | 46 ++
drivers/net/macb.h | 6 ++
2 files changed, 44 insertions(+), 8
- Update doc for the U-Boot logs are on UART0
- Move clock and reset index source into patch4
- Remove "dma_addr_r" type in the macb driver
- Add lower_32_bits() for 32-bit address in the macb driver
- Add set_rate() returns the new clock rate in the clock driver
Padmarao Begari (7):
riscv:
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari
---
drivers/net/macb.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari
---
arch/riscv/dts/Makefile | 1 +
arch/riscv/dts/microchip-icicle-kit-a000.dts | 426 +++
2 files changed, 427 insertions(+)
create mode 100644 arch/riscv/dts
+ OpenSBI.
Signed-off-by: Padmarao Begari
---
board/microchip/mpfs_icicle/Kconfig | 25 ++
board/microchip/mpfs_icicle/mpfs_icicle.c | 96 ++-
configs/microchip_mpfs_icicle_defconfig | 9 ++-
include/configs/microchip_mpfs_icicle.h | 60 +-
4 files
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari
---
doc/board/index.rst | 1 +
doc/board/microchip/index.rst | 9 +
doc/board/microchip/mpfs_icicle.rst | 605
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari
---
arch/riscv/Kconfig | 5 +
arch/riscv/include/asm/types.h | 4
2 files changed, 9 insertions(+)
diff --git a
Hi Anup,
On Sun, Oct 25, 2020 at 11:13 AM Anup Patel wrote:
> On Thu, Oct 22, 2020 at 1:23 PM Padmarao Begari
> wrote:
> >
> > dma_addr_t holds any valid DMA address. If the DMA API only uses
> 32/64-bit
> > addresses, dma_addr_t need only be 32/64 bits wide.
>
Hi Anup,
On Sun, Oct 25, 2020 at 11:37 AM Anup Patel wrote:
> On Thu, Oct 22, 2020 at 12:52 PM Padmarao Begari
> wrote:
> >
> > Enable 64-bit DMA support in the macb driver when CONFIG_DMA_ADDR_T_64BIT
> > is enabled. 32-bit DMA is enabled by default.
> >
>
Hi Anup,
On Sun, Oct 25, 2020 at 11:50 AM Anup Patel wrote:
> On Thu, Oct 22, 2020 at 12:52 PM Padmarao Begari
> wrote:
> >
> > Read phy address from device tree and use it to find the phy device
> > if not found then search in the range of 0 to 31.
> >
>
Hi Anup,
On Sun, Oct 25, 2020 at 11:25 AM Anup Patel wrote:
> On Thu, Oct 22, 2020 at 1:11 PM Padmarao Begari
> wrote:
> >
> > Add clock driver code for the Microchip PolarFire SoC. This driver
> > handles reset and clock control of the Microchip PolarFire SoC devic
Hi Anup,
On Sun, Oct 25, 2020 at 11:20 AM Anup Patel wrote:
> On Thu, Oct 22, 2020 at 12:53 PM Padmarao Begari
> wrote:
> >
> > Add device tree for Microchip PolarFire SoC Icicle Kit.
> >
> > Signed-off-by: Padmarao Begari
> > ---
> > arch/ris
Hi Bin,
On Mon, Oct 26, 2020 at 6:44 PM Bin Meng wrote:
> On Thu, Oct 22, 2020 at 3:23 PM Padmarao Begari
> wrote:
> >
> > Add device tree for Microchip PolarFire SoC Icicle Kit.
> >
> > Signed-off-by: Padmarao Begari
> > ---
> > arch/riscv/dts/Makef
Hi Atish,
On Tue, Oct 27, 2020 at 6:27 AM Atish Patra wrote:
> On Mon, Oct 26, 2020 at 6:14 AM Bin Meng wrote:
> >
> > On Thu, Oct 22, 2020 at 3:23 PM Padmarao Begari
> > wrote:
> > >
> > > Add device tree for Microchip PolarFire SoC Icicle Kit.
>
Hi Anup,
On Sun, Oct 25, 2020 at 11:57 AM Anup Patel wrote:
> On Thu, Oct 22, 2020 at 12:53 PM Padmarao Begari
> wrote:
> >
> > This patch adds Microchip MPFS Icicle Kit support. For now, only
> > NS16550 Serial, Microchip clock, Cadence eMMC and MACB drivers a
Hi Bin,
On Mon, Oct 26, 2020 at 6:48 PM Bin Meng wrote:
> On Thu, Oct 22, 2020 at 3:23 PM Padmarao Begari
> wrote:
> >
> > This patch adds Microchip MPFS Icicle Kit support. For now, only
> > NS16550 Serial, Microchip clock, Cadence eMMC and MACB drivers are
> &g
On Sat, Oct 24, 2020 at 9:07 PM Jagan Teki
wrote:
> On Thu, Oct 22, 2020 at 1:22 PM Padmarao Begari
> wrote:
> >
> > This doc describes the procedure to build, flash and
> > boot Linux using U-boot on Microchip MPFS Icicle Kit.
> >
> > Signed-off-by: Pad
On Sun, Oct 25, 2020 at 12:24 PM Anup Patel wrote:
> On Thu, Oct 22, 2020 at 1:22 PM Padmarao Begari
> wrote:
> >
> > This doc describes the procedure to build, flash and
> > boot Linux using U-boot on Microchip MPFS Icicle Kit.
> >
> > Signed-off-by: Pad
dma_addr_t holds any valid DMA address. If the DMA API only uses 32/64-bit
addresses, dma_addr_t need only be 32/64 bits wide.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
arch/riscv/Kconfig | 4
arch/riscv/include/asm/types.h | 4
2 files changed, 8
he macb driver
- Add set_rate() returns the new clock rate in the clock driver
Padmarao Begari (7):
riscv: Add DMA 64-bit address support
net: macb: Add DMA 64-bit address support for macb
net: macb: Add phy address to read it from device tree
clk: Add Microchip PolarFire SoC clock driv
This doc describes the procedure to build, flash and
boot Linux using U-boot on Microchip MPFS Icicle Kit.
Signed-off-by: Padmarao Begari
---
doc/board/index.rst | 1 +
doc/board/microchip/index.rst | 9 +
doc/board/microchip/mpfs_icicle.rst | 827
Add device tree for Microchip PolarFire SoC Icicle Kit.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
arch/riscv/dts/Makefile | 1 +
.../dts/microchip-mpfs-icicle-kit-u-boot.dtsi | 15 +
arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 421
Enable 32-bit or 64-bit DMA in the macb driver based on the design
config debug6 register of MACB hardware which supports 32-bit or
64-bit DMA.
Signed-off-by: Padmarao Begari
---
drivers/net/macb.c | 121 +++--
drivers/net/macb.h | 6 +++
2 files
+ OpenSBI.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
board/microchip/mpfs_icicle/Kconfig | 24 ++
board/microchip/mpfs_icicle/mpfs_icicle.c | 97 ++-
configs/microchip_mpfs_icicle_defconfig | 9 ++-
include/configs/microchip_mpfs_icicle.h | 60
Read phy address from device tree and use it to find the phy device
if not found then search in the range of 0 to 31.
Signed-off-by: Padmarao Begari
---
drivers/net/macb.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/net/macb.c b/drivers/net
Add clock driver code for the Microchip PolarFire SoC. This driver
handles reset and clock control of the Microchip PolarFire SoC device.
Signed-off-by: Padmarao Begari
Reviewed-by: Anup Patel
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile
There are lot of device_is_compatible() present in the driver.
Remove them and replace with a variables "SDHCI_COMPATIBLE_SDHCI_89A"
and "SDHCI_COMPATIBLE_VERSAL_NET_EMMC" with match data.
This change saves the space and reduce the execution time.
Signed-off-by: Padmarao Bega
evice tree.
Signed-off-by: Padmarao Begari
---
board/xilinx/common/board.c | 39 +
1 file changed, 18 insertions(+), 21 deletions(-)
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 0b43407b9e..a217b39df6 100644
--- a/board/xilinx/comm
u-boot to initialize
the tcm.
Signed-off-by: Padmarao Begari
---
arch/arm/mach-zynqmp/cpu.c| 7 +--
arch/arm/mach-zynqmp/include/mach/sys_proto.h | 2 +-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/c
ns the error code and the initialize_tcm() function is not
updating the global control register of the RPU instead it prints
the error message. When cpu is disabled, the check_tcm_mode()
function returns the success code for switch split to lockstep mode.
Signed-off-by: Padmarao Begari
---
arch/arm/m
t;lockstep", "0" or "split", "1".
Changes in v2:
- Update commit message of patch2
Padmarao Begari (2):
arm64: zynqmp: Print an error for split to lock mode switch
arm64: zynqmp: Fix tcminit mode value based on argv
arch/arm/mach-zynqmp/cpu.c
returns 0. For
backward compatibility zynqmp tcminit 0/1 can be still used but
it is recommended to use strings instead.
Signed-off-by: Padmarao Begari
---
arch/arm/mach-zynqmp/zynqmp.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-zynqmp/zynq
Update e-mail address.
Signed-off-by: Padmarao Begari
---
.mailmap | 1 +
1 file changed, 1 insertion(+)
diff --git a/.mailmap b/.mailmap
index 4d48349f0e..005e965b84 100644
--- a/.mailmap
+++ b/.mailmap
@@ -89,6 +89,7 @@ Neil Armstrong
Nicolas Saenz Julienne
This contributor prefers
Update spi negative test case to prevent SF command
from overwriting relocation memory area.
Signed-off-by: Padmarao Begari
---
test/py/tests/test_spi.py | 12
1 file changed, 12 insertions(+)
diff --git a/test/py/tests/test_spi.py b/test/py/tests/test_spi.py
index 3160d58540
. Use the strcmp()
instead of strncmp() to make uniform the r5 mode (lockstep/split
or 0/1) for the zynqmp tcminit and cpu release command.
Signed-off-by: Padmarao Begari
---
arch/arm/mach-zynqmp/mp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-zynqmp
ns the error code and the initialize_tcm() function is not
updating the global control register of the RPU instead it prints
the error message. When cpu is disabled, the check_tcm_mode()
function returns the success code for switch split to lockstep mode.
Signed-off-by: Padmarao Begari
---
arch/arm/m
returns 0. For
backward compatibility zynqmp tcminit 0/1 can be still used but
it is recommended to use strings instead.
Signed-off-by: Padmarao Begari
---
arch/arm/mach-zynqmp/zynqmp.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-zynqmp/zynq
When cpu is enabled, the zynqmp tcminit throws an error message
when switching from r5-mode "split" to "lockstep". When cpu is
disabled, the zynqmp tcminit switch from r5-mode "split" to
"lockstep". The mode value is assigned based on string compare
for &q
e,
then it is calculated based on offset and ram base address for
Microblaze in board_late_init_xilinx() function.
Signed-off-by: Padmarao Begari
---
board/xilinx/microblaze-generic/microblaze-generic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/xilinx/microblaze-generic/microblaze
pt
address and ram base address for Microblaze and i.e exceeding
DDR memory. To fix this, the script address is assigned
initially with offset instead of address. Later it is added
with ram base address and gets the physical address.
Signed-off-by: Padmarao Begari
---
Changes in v2:
- Update comm
If the least significant bit of the address is set to one when
using the DDR protocol for data transfer then the results are
indeterminate for few flash devices. To fix this the least
significant bit of the address is set to zero.
Signed-off-by: Padmarao Begari
---
drivers/spi
address to near the top of memory. The new stack
pointer address is assigned before calling the relocate
of u-boot based on the stack relocate calculation and
this new stack pointer is used while executing u-boot
from the relocated memory.
Signed-off-by: Padmarao Begari
---
configs
Read an eeprom after relocation if multi dtb's are disabled.
Padmarao Begari (2):
arm64: versal2: Remove dtb reselect and multi dtb
board: amd: Read an eeprom after relocation
board/amd/versal2/board.c | 3 +++
configs/amd_versal2_virt_defconfig | 2 --
2 files chang
board_info is valid or not. To fix, move the board_info
into the data section and also check whether it is valid or not.
Signed-off-by: Padmarao Begari
---
board/xilinx/common/board.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/xilinx/common/board.c b/board
Presently the multi dtb's are not using on versal Gen 2
platform, so remove CONFIG_DTB_RESELECT and CONFIG_MULTI_DTB_FIT
from defconfig.
Signed-off-by: Padmarao Begari
---
configs/amd_versal2_virt_defconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/configs/amd_versal2_virt_defc
Read an eeprom after relocation which also shows information from
eeprom wired via nvmem aliases.
When DTB reselection is enabled eeprom is read before relocation
too but information is not showed. The issue about two i2c reads
in this case will be address separately.
Signed-off-by: Padmarao
exception.
To fix, change an initial stack pointer address from near the
top of memory to near the relocation memory.
Fixes: 685874939a5e ("configs: versal: update initial stack pointer")
Signed-off-by: Padmarao Begari
---
configs/xilinx_versal_mini_ospi_defconfig | 2 +-
1 file changed, 1
w the quickest
temporary solution. The correct way to do it is to move
all global variables to private data to avoid it.
Signed-off-by: Padmarao Begari
---
drivers/clk/clk_versal.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_ver
The zynqmp gem driver support max MTU size 1536, so remove tftp
block size 4096 from defconfig and use default tftp block size.
Signed-off-by: Padmarao Begari
---
configs/xilinx_versal_net_virt_defconfig | 1 -
configs/xilinx_versal_virt_defconfig | 1 -
2 files changed, 2 deletions
The zynqmp gem driver support max MTU size 1536, so remove tftp
block size 4096 from defconfig and use default tftp block size.
Fixes: a33b4b96b3cf ("xilinx: Enable MBEDTLS/LWIP/WGET and WGET_HTTPS")
Signed-off-by: Padmarao Begari
---
Changes in v2:
- Add fixes in commit message
- R
source is set
to DPLL, the DPLL-to-LPD cross divisor is used.
Signed-off-by: Padmarao Begari
---
drivers/clk/clk_zynqmp.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c
index a8239e228cf..4f67c958d0f 100644
--- a
processing with platform-specific operations.
Signed-off-by: Padmarao Begari
---
drivers/fwu-mdata/fwu-mdata-uclass.c | 17 +++
drivers/fwu-mdata/raw_mtd.c | 6 ++
include/fwu.h| 32
lib/fwu_updates/fwu.c
Introducing the fwu platform hook function from fwu
initialization to process fwu metadata information with
platform specific operation, and use image uuid(GUID)
from fwu metadata structure for fwu multi bank update.
Padmarao Begari (2):
FWU: Add platform hook support for fwu metadata
board
The generated GUID applies to all Xilinx platforms but is not
specific to any individual board. For FWU multi bank update,
use the image UUID (GUID) from the FWU metadata structure
rather than embedding a generated GUID into the U-Boot build.
Signed-off-by: Padmarao Begari
---
board/xilinx
Add a driver for the PCA9541 i2c bus arbitrator based
on the Linux driver for the same device.
Co-developed-by: Jonathan Stroud
Signed-off-by: Jonathan Stroud
Signed-off-by: Padmarao Begari
---
drivers/i2c/muxes/Kconfig | 7 +
drivers/i2c/muxes/Makefile | 1 +
drivers/i2c/muxes/pca9541
Enable xilinx ethernet phy on ZynqMP by default.
Signed-off-by: Padmarao Begari
---
configs/xilinx_zynqmp_virt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/xilinx_zynqmp_virt_defconfig
b/configs/xilinx_zynqmp_virt_defconfig
index 7807f6240e3..a6afcd00b5d 100644
--- a
driver, add weak and actual platform hook function
Padmarao Begari (2):
FWU: Add platform hook support for fwu metata
board: xilinx: update guid based on metadata
board/xilinx/common/board.c | 13 +
include/fwu.h | 11 +++
lib/fwu_updates/fwu.c | 18
processing with platform-specific operations.
Signed-off-by: Padmarao Begari
---
include/fwu.h | 11 +++
lib/fwu_updates/fwu.c | 18 ++
2 files changed, 29 insertions(+)
diff --git a/include/fwu.h b/include/fwu.h
index 6441de370c9..8d0b856cc81 100644
--- a/include
mismatches, still need to consider the fact that
the FWU mdata is not a secure piece of data.
And this is a not real problem with Xilinx platforms because
actually it is only providing reference stack.
Signed-off-by: Padmarao Begari
---
board/xilinx/common/board.c | 13 +
1 file changed
processing with platform-specific operations.
Signed-off-by: Padmarao Begari
---
include/fwu.h | 11 +++
lib/fwu_updates/fwu.c | 18 ++
2 files changed, 29 insertions(+)
diff --git a/include/fwu.h b/include/fwu.h
index 77e60167fc7..e7bd1d492af 100644
--- a/include
The generated GUID applies to all Xilinx platforms but is not
specific to any individual board. For FWU multi bank update,
use the image UUID (GUID) from the FWU metadata structure
rather than embedding a generated GUID into the U-Boot build.
Signed-off-by: Padmarao Begari
---
board/xilinx
ENOSYS
Change in v2:
-Update commit message for FWU mdata
-Remove platform_hook() from driver, add weak and actual platform hook function
Padmarao Begari (2):
FWU: Add platform hook support for fwu metata
board: xilinx: update guid based on metadata
board/xilinx/common/board.c | 26
101 - 185 of 185 matches
Mail list logo
