Line 171 in README is describing that before relocation no code should use global variable because global variables are placed to BSS section which is initialized to 0 after relocation.
In the case of ZynqMP, where DTB reselection is enabled, the EEPROM is read again after relocation. This prevents the issue from being observed. However, in Versal Gen 2, where DTB reselection is also enabled, the EEPROM is not read after relocation because it is not yet wired in board_init(). This leads to a situation where the code accesses an incorrect memory location, because none is really checking the board_info is valid or not. To fix, move the board_info into the data section and also check whether it is valid or not. Signed-off-by: Padmarao Begari <padmarao.beg...@amd.com> --- board/xilinx/common/board.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index deea6c71103..8ffe7429901 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -80,7 +80,7 @@ struct xilinx_board_description { }; static int highest_id = -1; -static struct xilinx_board_description *board_info; +static struct xilinx_board_description *board_info __section(".data"); #define XILINX_I2C_DETECTION_BITS sizeof(struct fru_common_hdr) @@ -468,6 +468,9 @@ int board_late_init_xilinx(void) ret |= env_set_addr("bootm_size", (void *)bootm_size); for (id = 0; id <= highest_id; id++) { + if (!board_info) + break; + desc = &board_info[id]; if (desc && desc->header == EEPROM_HEADER_MAGIC) { if (desc->manufacturer[0]) -- 2.44.1