On 9/19/23 17:27, Gatien Chevallier wrote:
> STM32 RNG configuration should best fit the requirements of the
> platform. Therefore, put a platform-specific RNG configuration
> field in the platform data. Default RNG configuration for STM32MP13
> is the NIST certified configuration [1].
>
> Whil
On 9/19/23 17:27, Gatien Chevallier wrote:
> Add RNG node for STM32MP13x platforms.
>
> Signed-off-by: Gatien Chevallier
> Reviewed-by: Patrick Delaunay
> ---
> Changes in V2:
> - Added Patrick's tag
>
> arch/arm/dts/stm32mp131.dtsi | 8
> 1 file changed, 8 insertions(+)
>
>
On 9/27/23 08:52, Patrice CHOTARD wrote:
>
>
> On 9/19/23 17:27, Gatien Chevallier wrote:
>> Rename the RNG driver as it is usable by other STM32 platforms
>> than the STM32MP1x ones. Rename CONFIG_RNG_STM32MP1 to
>> CONFIG_RNG_STM32
>>
>> Signed-off-by: Gatien Chevallier
>> Reviewed-by: Grze
On 9/27/23 08:53, Patrice CHOTARD wrote:
>
>
> On 9/19/23 17:27, Gatien Chevallier wrote:
>> Default embed this configuration. If OP-TEE PTA RNG is exposed, it means
>> that the RNG is managed by the secure world. Therefore, the RNG node
>> should be disabled in the device tree as an access wo
On 9/27/23 08:56, Patrice CHOTARD wrote:
>
>
> On 9/19/23 17:27, Gatien Chevallier wrote:
>> RNG clock error detection is now enabled if the "clock-error-detect"
>> property is set in the device tree.
>>
>> Signed-off-by: Gatien Chevallier
>> Reviewed-by: Patrick Delaunay
>> ---
>> Changes i
On 9/27/23 08:56, Patrice CHOTARD wrote:
>
>
> On 9/19/23 17:27, Gatien Chevallier wrote:
>> In order to ensure a good RNG quality and compatibility with
>> certified RNG configuration, add RNG clock frequency restraint.
>>
>> Signed-off-by: Gatien Chevallier
>> Reviewed-by: Patrick Delaunay
On 9/27/23 08:57, Patrice CHOTARD wrote:
>
>
> On 9/19/23 17:27, Gatien Chevallier wrote:
>> Seed errors can occur when using the hardware RNG. Implement the
>> sequences to handle them. This avoids irrecoverable RNG state.
>>
>> Try to conceal seed errors when possible. If, despite the error
The Andes PLMT driver directly accesses the mtime MMIO region,
indicating its intended use in the M-mode boot stage. However,
since U-Boot proper (S-mode) also uses the PLMT driver, we need
to specifically mark the region as readable through PMPCFGx (or
S/U-mode read-only shared data region for Sme
On 9/27/23 09:11, Patrice CHOTARD wrote:
>
>
> On 9/19/23 17:27, Gatien Chevallier wrote:
>> STM32 RNG configuration should best fit the requirements of the
>> platform. Therefore, put a platform-specific RNG configuration
>> field in the platform data. Default RNG configuration for STM32MP13
On 9/27/23 09:11, Patrice CHOTARD wrote:
>
>
> On 9/19/23 17:27, Gatien Chevallier wrote:
>> Add RNG node for STM32MP13x platforms.
>>
>> Signed-off-by: Gatien Chevallier
>> Reviewed-by: Patrick Delaunay
>> ---
>> Changes in V2:
>> - Added Patrick's tag
>>
>> arch/arm/dts/stm32mp131.dt
This series adds support of AM62x LP SK. The AM62x LP SK board
is similar to AM62x SK but has some significant changes that
requires different set of device tree at each stage of bootloader.
Also refactors to have common nodes at k3-am62x-r5-sk-common.dtsi
and k3-am62x-sk-common-u-boot.dtsi for all
Add k3-am62x-r5-sk-common to include nodes common for R5
SPL from k3-am625-r5-sk for AM62x SoC based boards. Add
k3-am62x-sk-common-u-boot to move common nodes of A53 SPL
stage from k3-am625-sk-u-boot.
Signed-off-by: Nitin Yadav
---
arch/arm/dts/k3-am625-r5-sk.dts | 94 +
Switch to binman for building bootloader images. Reuse
k3-am625-sk-binman and override the dtb names to that
of AM62 LP SK board.
Signed-off-by: Nitin Yadav
---
arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 29 ++
1 file changed, 29 insertions(+)
create mode 100644 arch/arm/d
The AM62x LP SK board is similar to the AM62x SK board,
but has some significant changes that requires different
device tree.
The differences are mainly:
- AM62x SoC in the AMC package that meets AECQ100 automotive standard.
- LPDDR4 versus DDR4 on the AM62x SK.
- TPS65219 PMIC instead of discrete
Add defconfig fragments for AM62x LP SK and corresponding
customized environment file for AM62x LP SK.
Signed-off-by: Nitin Yadav
---
board/ti/am62x/am62x_lpsk_a53.config | 5 +
board/ti/am62x/am62x_lpsk_r5.config | 5 +
board/ti/am62x/am62xlpsk.env | 21 +
This series adds the EFI HTTP boot support.
User can add the URI device path with "efidebug boot add" command.
efibootmgr handles the URI device path, download the
specified file using wget, mount the downloaded image with
blkmap, then boot with the default file(e.g. EFI/BOOT/BOOTAA64.EFI).
This v
This introduces the valid range check to store the received
blocks using lmb. The same logic is implemented in tftp.
Signed-off-by: Masahisa Kojima
Acked-by: Ilias Apalodimas
Reviewed-by: Simon Glass
---
net/wget.c | 80 +-
1 file changed, 73
Current wget takes the target uri in this format:
":" e.g.) 192.168.1.1:/bar
The http server ip address must be resolved before
calling wget.
This commit adds the utility function runs wget with dhs.
User can call wget with the uri like "http://foo/bar";.
Signed-off-by: Masahisa Kojima
Reviewe
User needs to call several functions to create the ramdisk
with blkmap.
This adds the utility function to create blkmap device and
mount the ramdisk.
Signed-off-by: Masahisa Kojima
Reviewed-by: Simon Glass
Reviewed-by: Ilias Apalodimas
---
drivers/block/Makefile| 1 +
drivers/block/bl
This supports to boot from the URI device path.
When user selects the URI device path, bootmgr downloads
the file using wget into the address specified by loadaddr
env variable.
If the file is .iso or .img file, mount the image with blkmap
then try to boot with the default file(e.g. EFI/BOOT/BOOTAA
This adds the URI device path option for 'boot add' subcommand.
User can add the URI load option for downloading ISO image file
or EFI application through network. Currently HTTP is only supported.
Signed-off-by: Masahisa Kojima
---
cmd/efidebug.c | 50 +++
includ
This adds the description about HTTP Boot.
Signed-off-by: Masahisa Kojima
Reviewed-by: Ilias Apalodimas
---
doc/develop/uefi/uefi.rst | 30 ++
1 file changed, 30 insertions(+)
diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst
index a7a41f2fac..23b3d
Current efibootmgr automatically creates the boot options
of all the disks and partitions installing
SIMPLE_FILE_SYSTEM_PROTOCOL. These boot options are created
to load and start the default file(e.g. EFI/BOOT/BOOTAA64.EFI).
Now efibootmgr can scan the BlockIo device and try to boot
with the defau
When NCAT2 generation model's introduced for t113,
the modification in drivers/mmc/sunxi_mmc.c
> + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) && (sdc_no == 2))
in struct mmc *sunxi_mmc_init(int sdc_no) seems to have
some negative side effects, meaning enabling 8-bit mode for MMC2.
Paticularly, IS_ENABLED
Hi,
I am sending series of zynqmp boards mostly related to system controller.
System controller is small ZynqMP board sitting on Versal/Versal NET board
doing board management. There is a internal spec about connection outside
but pretty much DT description describe all connected IPs.
The only thi
Add support for KD240 Kria SOM CC. It is pretty much subset of KR260 board
from PS perspective.
Signed-off-by: Michal Simek
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 353 +
2 files changed, 354 insertions(+)
create mode
xlnx,fclk nodes are not described in dtschema that's why remove them.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-clk-ccf.dtsi | 18 --
1 file changed, 18 deletions(-)
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 4044b62d27a2..5
There are some changes between revA and revB boards. u39 8T49N240 was
removed and also three ina226 at 42/43/44 addresses (u178/u180/u182).
Signed-off-by: Michal Simek
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynqmp-e-a2197-00-revB.dts | 34 +
con
Add i2c accessible devices with description.
There is versal specific eeprom and i2c-gpio controller.
SE3 has also clock chip present.
Also remove x-prc description from SC dts.
Signed-off-by: Michal Simek
---
arch/arm/dts/Makefile | 5 ++
.../zynqmp-p-a2197-00-revA-x
Board contains two systems. The primary is Versal VP1202 ACAP device and
the secondary is ZynqMP zu4 which acts as system controller. The patch is
describing only ZynqMP system controller part.
Signed-off-by: Michal Simek
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynqmp-vpk1
System controllers are pretty much the same on the all boards that's why
use autodetection based on i2c eeprom. This should end up with having only
one BSP for all SCs with only DT overlays to cover different i2c
structures.
All MIOs are fixed by the spec that's why not a problem to description
pi
System controller revC is using ADI ethernet phy instead of TI because of
supply chain issues.
Describe reset assert and de-assert times to 10us and 5ms respectively
according to the datasheet. Also setup RGMII RX and TX delay values to
2400ps as per board bring up observations.
Signed-off-by: Mic
VPXA2785(vp-x-a2785-00) is evaluation board which contains two PCIe-Edge
fingers, one for PCIe-B(gen5x8) and one for CPM(dual gen5x8, gen5x16).
Each of the ports can operate in endpoint or root port mode. This allows
the single card to be used for both root port, endpoint, and switch modes.
The bo
Generic system controller (SC) covers connection defined by specification
but different boards have different i2c devices. That's why describe i2c
devices available on multiple boards.
Signed-off-by: Michal Simek
---
arch/arm/dts/Makefile | 7 +
arch/arm/dts/zynqmp-sc-
The board is sharing a lot of components with zcu208 but it contains
differet silicon and also several components are done differently.
The board has 4GB memory connected to PS and additional 4GB connected to
PL. Compare to zcu208 sata support has been dropped and only USB3.0 is
using GTR (lane2).
RevB has different SD level shifter compare to revA. There are couple of
changes between revisions but none of them requires SW alignment.
Signed-off-by: Michal Simek
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynqmp-zcu670-revB.dts | 672
2 files
Xilinx was using in past is-dual property for QSPIs to reflect their
configurations. But handling for them never reached upstream code that's
why better to remove them.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynq-cc108.dts | 1 -
arch/arm/dts/zynq-dlc20-rev1.0.dt
Using '_' is not recommended for node names. Use '-' instead.
Pretty much run seds below for node names.
s/heartbeat_led/heartbeat-led/
s/gtr_sel/gtr-sel/
s/zynqmp_ipi/zynqmp-ipi/
s/nvmem_firmware/nvmem-firmware/
s/soc_revision/soc-revision/
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-m
On Wed, 27 Sep 2023 12:42:52 +0300
Okhunjon Sobirjonov wrote:
Hi,
> When NCAT2 generation model's introduced for t113,
> the modification in drivers/mmc/sunxi_mmc.c
> > + IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) && (sdc_no == 2))
> in struct mmc *sunxi_mmc_init(int sdc_no) seems to have
> some nega
This partially reverts commit ff33227819f579ffb963e0dac6bc6a6566b89563.
Versal NET clock node should use "xlnx,versal-net-clk", "xlnx,versal-clk"
compatible string that's why it is not necessary to define Versal NET
specific compatible string if there is no any other change needed. It can
be get b
Character '_' not recommended in node name. Use '-' instead.
Pretty much run sed below for node names.
s/si5335_/si5335-/
Signed-off-by: Michal Simek
---
Till now I didn't heard back that different style should be used that's why
also sending this patch and separately from other similar change r
Hi Johan,
On 2023/9/19 23:28, Johan Jonker wrote:
Keep track of the re-entries with help of the lr register.
This binary can be re-used and called from various BROM functions.
Only when it's called from the part that handles SPI, NAND or EMMC
hardware it needs to early return to BROM ones.
In do
On 9/27/23 01:15, Sean Anderson wrote:
Hi Eugen,
I noticed that several AT91 boards are quite close to their SPL size
limit. For example, sama5d27_wlsom1_ek_mmc is just 173 bytes short of
its limit and doesn't even git with older GCCs. I looked at the
datasheet for that processor, and noticed th
On 25.09.23 10:09, Rasmus Villemoes wrote:
> Distinguish more clearly between source files meant for producing .dtb
> from those meant for producing .dtbo. No functional change, as we
> currently have rules for producing a foo.dtbo from either foo.dts or
> foo.dtso.
>
> Note that in the linux tree
On 13:51-20230927, Nitin Yadav wrote:
> The AM62x LP SK board is similar to the AM62x SK board,
> but has some significant changes that requires different
> device tree.
>
> The differences are mainly:
> - AM62x SoC in the AMC package that meets AECQ100 automotive standard.
>
On 13:51-20230927, Nitin Yadav wrote:
> Switch to binman for building bootloader images. Reuse
> k3-am625-sk-binman and override the dtb names to that
> of AM62 LP SK board.
>
> Signed-off-by: Nitin Yadav
> ---
> arch/arm/dts/k3-am62-lp-sk-binman.dtsi | 29 +++
On 13:51-20230927, Nitin Yadav wrote:
> Add defconfig fragments for AM62x LP SK and corresponding
> customized environment file for AM62x LP SK.
>
> Signed-off-by: Nitin Yadav
> ---
> board/ti/am62x/am62x_lpsk_a53.config | 5 +
> board/ti/am62x/am62x_lpsk_r5.config |
On 13:51-20230927, Nitin Yadav wrote:
> Add k3-am62x-r5-sk-common to include nodes common for R5
> SPL from k3-am625-r5-sk for AM62x SoC based boards. Add
> k3-am62x-sk-common-u-boot to move common nodes of A53 SPL
> stage from k3-am625-sk-u-boot.
>
> Signed-o
On 13:51-20230927, Nitin Yadav wrote:
> This series adds support of AM62x LP SK. The AM62x LP SK board
> is similar to AM62x SK but has some significant changes that
> requires different set of device tree at each stage of bootloader.
> Also refactors to have common nodes at k3
Hi,
This series aligns the dts files for AM64 platform from Linux v6.6-rc1.
cheers,
-roger
Roger Quadros (2):
Revert "ARM: dts: k3-am642-sk-u-boot: add PMIC node"
arm: dts: k3-am64: Bump dts from Linux v6.6-rc1
arch/arm/dts/k3-am64-main.dtsi| 209 ++
arch/ar
This reverts commit 28a4c3113445d4400639f357fae0def007a41093.
The PMIC should come from the k3-am642-sk.dts file.
There are 2 variants of the AM642-SK board and each has a different PMIC.
i.e. SK-AM64 [1] has TPS6521855 and SK-AM64B [2] has TPS6522053.
[1] - https://www.ti.com/tool/SK-AM64
[2] -
Update the am64 and am642 device-trees from linux v6.6-rc1.
This needed the following tweaks to the u-boot specific dtsi as well:
- Switch tick-timer to the main_timer as it's now defined in the main dtsi
- Secure proxies are defined in SoC dtsi
- Drop duplicate nodes - u-boot.dtsi is included in
On 15:01-20230927, Roger Quadros wrote:
> Hi,
>
> This series aligns the dts files for AM64 platform from Linux v6.6-rc1.
>
> cheers,
> -roger
>
> Roger Quadros (2):
> Revert "ARM: dts: k3-am642-sk-u-boot: add PMIC node"
> arm: dts: k3-am64: Bump dt
Execute "time ", and validate that it gives the approximately
the correct amount of command execution time.
Signed-off-by: Love Kumar
---
Changes in v2:
- Used @pytest.mark.buildconfigspec('')
---
test/py/tests/test_sleep.py | 18 ++
1 file changed, 18 insertions(+)
diff --git
Yocto build can involve very long filenames. These two patches protect
the Yocto build from failing without a sensible error message and
increase the path length for the cipher key for the kernel from 128 to
256 characters.
---
tools/image-host.c | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/tools/image-host.c b/tools/image-host.c
index a6b0a94420..0c92a2ddeb 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -363,6 +363,7 @@ static int fit_image_setup_cipher
---
tools/image-host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/image-host.c b/tools/image-host.c
index 0c92a2ddeb..9afcc02192 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -361,7 +361,7 @@ static int fit_image_setup_cipher(struct image_cipher_info
*
Ensure that the RAM configuration line is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.
Signed-off-by: Harald Seiler
---
drivers/ram/stm32mp1/stm32mp1_ram.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c
b/drivers/ram/stm32mp1/stm3
Ensure that the SoM and board code information is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.
Signed-off-by: Harald Seiler
---
board/dhelectronics/dh_stm32mp1/board.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/dhelectronics/dh_stm32mp1/board.c
b/board/
On 27/09/2023 12:59, Hugo Cornelis wrote:
> Yocto build can involve very long filenames. These two patches protect
> the Yocto build from failing without a sensible error message and
> increase the path length for the cipher key for the kernel from 128 to
> 256 characters.
>
>
For both patches:
This series aims to sync kernel.org v6.6-rc1 DTS with that of U-Boot. It
also includes cleanups where necessary along with certain changes to
ensure boot is unaffected.
Same as with other board series that have taken up this effort, cleanup
of mcu_ringacc and mcu_udmap are dependent on MCU DMA [1]
U-Boot uses mcu_timer0 as the tick-timer, so add it to device list.
Signed-off-by: Neha Malcom Francis
Reviewed-by: Manorit Chawdhry
Reviewed-by: Nishanth Menon
---
arch/arm/mach-k3/j721e/dev-data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-k3/j721e/dev-data.c
b/arch/a
When setting boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which eventually calls
dm_timer_init() to grab the tick-timer, which is mcu_timer0. Since we
need to set up the clocks before using the timer, move clk_k3 driver
probe before k3_sysfw_load
When setting up boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which calls dm_timer_init()
which then gets the tick-timer: mcu_timer0. mcu_timer0 uses k3_clks
(clock controller) and k3_pds (power controller) from the dmsc node that
forces probe of
Kernel commit d93036b47f35 ("arm64: dts: ti: k3-j721e-mcu_wakeup: Add
HyperBus node") was merged to kernel without its dependent patch [1].
Similar fix is needed in U-Boot, and hbmc currently breaks boot. Till
this gets fixed in U-Boot, disable the config by default so that the
hbmc probe that happ
Get rid of k3-j721e-r5-*-u-boot.dtsi as it is not
necessary. Change the inclusion hierarchy to be as follows:
k3-j721e-.dts---
-
-->k3-j721e-r5-.dts
-
k3-j721e--u-boot.dtsi---
Reason for explicit
- The dev_read_addr_name*() family of functions has no "index" argument,
doc comments should refer to "name"
- Specify the error return for several devfdt_get_addr*() functions
Signed-off-by: Matthias Schiffer
---
include/dm/fdtaddr.h | 12 ++--
include/dm/read.h| 6 +++---
2 file
Checking for the error cast to fdt_addr_t is rather awkward - IS_ERR()
can be used, but it's not really made to be used on fdt_addr_t, which
may not even be the same size as a native pointer.
Most places in U-Boot only check for FDT_ADDR_T_NONE; let's adjust the
error return to match the expectati
Same as dev_read_addr_name[_size](), but returns a pointer, cast
through map_sysmem().
Signed-off-by: Matthias Schiffer
---
drivers/core/fdtaddr.c | 21 +
drivers/core/read.c| 21 +
include/dm/fdtaddr.h | 31 +++
include/d
A follow-up to commit 842fb5de424e
("drivers: use devfdt_get_addr_size_index_ptr when cast to pointer")
and commit 320a1938b6f7
("drivers: use devfdt_get_addr_index_ptr when cast to pointer").
In addition to using the *_ptr variants of these functions where the
address is cast to a pointer, this a
pinctrl-single uses fdt_addr_t and phys_addr_t inconsistently, but both
are wrong to be passed to readb() etc., which expect a pointer or
pointer-sized integer. Change the driver to use
dev_read_addr_size_index_ptr(), so we consistently deal with void*
(except for the sandbox case and single_get_pi
Use uintptr_t instead of phys_addr_t where appropriate, so passing the
addresses to writel() doesn't result in compile warnings when PHYS_64BIT
is set for 32bit builds (which is actually a useful configuration, as
the K3 SoC family boots from an R5 SPL, which may pass bank information
based on gd->
Hi Marek,
miquel.ray...@bootlin.com wrote on Fri, 22 Sep 2023 12:00:12 +0200:
> Hi Marek,
>
> I'm answering here as there is no cover letter. Just to let you know
> I'm still concerned by the series and want to test it but did not had
> the time to do so recently. Hopefully next week.
The serie
Hi Rasmus,
On Tue, 26 Sept 2023 at 00:25, Rasmus Villemoes
wrote:
>
> On 25/09/2023 17.14, Jonas Karlman wrote:
>
> >> fit,align
> >> -Indicates what alignment to use for the FIT and its external data,
> >> -and provides the alignment to use. This is passed to mkimage via
> >
Hi Christophe,
On Tue, 26 Sept 2023 at 00:46, Christophe Leroy
wrote:
>
>
>
> Le 24/09/2023 à 21:24, Simon Glass a écrit :
> > It doesn't make sense to have some boards do this differently. Drop the
> > condition in the hope that the maintainers can figure out any run-time
> > problems.
>
> This
This uses ARRAY_SIZE() but does not include the header file which declares
it. Fix this, so that command.h can be included without common.h
Signed-off-by: Simon Glass
---
Changes in v5:
- Adjust so this builds on azure
boot/bootm.c | 2 +-
include/command.h | 4
2 files changed, 5 in
Add support for declaring in device tree the reserved memory ranges
required for MC. Since the MC firmware acts as any DMA master present
in the SoC, the reserved memory ranges need also be identity mapped
in the SMMU, so create the required 'iommu-addresses' property in
the reserved memory nodes.
Some functions are not used outside this file, so make them static.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
b/arch/arm/cpu/armv8/fsl-laye
Add support for declaring in device tree the reserved memory ranges
required for MC. Since the MC firmware acts as any DMA master present
in the SoC, the reserved memory ranges need also be identity mapped
in the SMMU, so create the required 'iommu-addresses' property in
the reserved memory nodes.
Populate the device tree with the MC reserved memory regions.
Signed-off-by: Laurentiu Tudor
---
board/freescale/ls2080aqds/ls2080aqds.c | 1 +
board/freescale/ls2080ardb/ls2080ardb.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale
Populate the device tree with the MC reserved memory regions.
Signed-off-by: Laurentiu Tudor
---
board/freescale/ls1088a/ls1088a.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/freescale/ls1088a/ls1088a.c
b/board/freescale/ls1088a/ls1088a.c
index 65593f10a3f5..7674e31a268a 100644
--
From: Jan Kiszka
When building in-tree, there is no source link.
Signed-off-by: Jan Kiszka
---
tools/iot2050-sign-fw.sh | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/tools/iot2050-sign-fw.sh b/tools/iot2050-sign-fw.sh
index 6b426c854c2..75ffd560823 100755
--- a
On Wed, 16 Aug 2023 10:34:19 -0700
Sam Edwards wrote:
Hi Sam,
> This patch adds the necessary code to make nonsec booting and PSCI
> secondary core management functional on the R528/T113.
>
> Signed-off-by: Sam Edwards
> Tested-by: Maksim Kiselev
> ---
> arch/arm/cpu/armv7/sunxi/psci.c | 48
On Wed, 16 Aug 2023 10:34:20 -0700
Sam Edwards wrote:
Hi Sam,
> This is a hack for reviewer QoL. It is not being submitted for mainline
> inclusion.
> ---
> arch/arm/cpu/armv7/sunxi/psci.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/
On Fri, 18 Aug 2023 14:17:07 -0700
Sam Edwards wrote:
> On 8/18/23 10:40, Sam Edwards wrote:
> > On 8/18/23 07:11, Andre Przywara wrote:
> >
> > Hi Andre,
> >
> >> The resulting object file is different (8 byte larger,
> >> even), so it's hard to prove
> >
> > I'm no stranger to reading ob
Hi Rob,
On Tue, 26 Sept 2023 at 11:29, Rob Herring wrote:
>
> On Tue, Sep 26, 2023 at 2:48 AM Miquel Raynal
> wrote:
> >
> > Hello,
> >
> > > > > > > These are firmware bindings, as indicated, but I
> > > > > > > took them out of the /firmware node since that is for a different
> > > > > > > pu
Sometimes the contents of a partition are compressed. Add a property to
express this and define the algorithm used.
Signed-off-by: Simon Glass
---
Changes in v3:
- Just add a compression property for now
Changes in v2:
- Use "binman" for compatible instead of "u-boot,binman"
- Significantly rew
From: Jan Kiszka
We only have serial as console option, and leaving this on turns on
SYS_CONSOLE_IS_IN_ENV which is also not true for these devices, leaving
an ugly
In:No input devices available!
Out: No output devices available!
Err: No error devices available!
behind.
Signed-off-by:
Sometimes the contents of a partition are compressed. Add a property to
express this and define the algorithm used.
Signed-off-by: Simon Glass
---
Changes in v4:
- Add an example
Changes in v3:
- Just add a compression property for now
Changes in v2:
- Use "binman" for compatible instead of "u
On Mon, Jun 19, 2023 at 4:07 PM Troy Kisky
wrote:
> Add script usage_of_is_enabled_check to print any configs that
> use CONFIG_IS_ENABLED instead of IS_ENABLED and vice versa.
>
> Add usage_of_is_enabled_commit.sh to generate commits to fix the above
> issues.
>
> You can remove entries from tes
On Wed, Sep 27, 2023 at 11:14 AM Troy Kisky
wrote:
>
>
> On Mon, Jun 19, 2023 at 4:07 PM Troy Kisky
> wrote:
>
>> Add script usage_of_is_enabled_check to print any configs that
>> use CONFIG_IS_ENABLED instead of IS_ENABLED and vice versa.
>>
>> Add usage_of_is_enabled_commit.sh to generate comm
On 9/19/23 07:37, Rasmus Villemoes wrote:
In some cases, using the "external data" feature is impossible or
undesirable, but one may still want (or need) the FIT image to have a
certain alignment. Also, given the current 'mkimage -h' output,
-B => align size in hex for FIT structure and heade
Add a compatible string for binman, so we can extend fixed-partitions
in various ways.
Signed-off-by: Simon Glass
---
.../bindings/mtd/partitions/binman.yaml | 49 +++
.../mtd/partitions/fixed-partitions.yaml | 6 +++
.../bindings/mtd/partitions/partitions.yaml |
Add two labels for binman entries, as a starting point for the schema.
Signed-off-by: Simon Glass
---
.../mtd/partitions/binman-partition.yaml | 48 +++
1 file changed, 48 insertions(+)
create mode 100644
Documentation/devicetree/bindings/mtd/partitions/binman-partition.y
Add three properties for controlling alignment of partitions, aka
'entries' in binman.
For now there is no explicit mention of hierarchy, so a 'section' is
just the 'fixed-partitions' node.
These new properties are inputs to the packaging process, but are also
needed if the firmware is repacked,
On 9/25/23 22:31, Artur Rojek wrote:
Hey Eugen,
thanks for the review.
Hello,
Thank you for your patch,
On 9/21/23 18:37, Artur Rojek wrote:
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer.
Co-developed-by: Jakub Klama
Signed-off-by: Jakub Klama
Co-developed-by: Marci
On 9/27/23 02:25, Yu Chien Peter Lin wrote:
> The Andes PLMT driver directly accesses the mtime MMIO region,
> indicating its intended use in the M-mode boot stage. However,
> since U-Boot proper (S-mode) also uses the PLMT driver, we need
> to specifically mark the region as readable through PMPCF
On 9/27/23 10:32, Andre Przywara wrote:
On Wed, 16 Aug 2023 10:34:20 -0700
Sam Edwards wrote:
Hi Sam,
Hi Andre,
Mmh, I didn't find a better solution than keeping this in.
I'll keep it if your R528 v2 doesn't find some other way to address it.
+#endif
+#if defined(SUNXI_CPUX_BASE) && def
On 9/27/23 10:34, Andre Przywara wrote:
In the majority of cases, there are no changes to the text section
introduced by this patch. In the R40 case, there's a small change where
the compiler adds a NULL check onto the result of the `(void *)cpucfg +
SUN8I_R40_PWR_CLAMP(cpu)` computation, which w
On 9/27/23 10:31, Andre Przywara wrote:
On Wed, 16 Aug 2023 10:34:19 -0700
Sam Edwards wrote:
Hi Sam,
Hi Andre,
@@ -103,10 +116,13 @@ static void __secure clamp_set(u32 *clamp)
static void __secure sunxi_cpu_set_entry(int __always_unused cpu, void *entry)
{
- /* secondary core
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