On Wed, 16 Aug 2023 10:34:20 -0700
Sam Edwards <cfswo...@gmail.com> wrote:
Hi Sam,
> This is a hack for reviewer QoL. It is not being submitted for mainline
> inclusion.
> ---
> arch/arm/cpu/armv7/sunxi/psci.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
> index b4ce4f6def..27bac291d5 100644
> --- a/arch/arm/cpu/armv7/sunxi/psci.c
> +++ b/arch/arm/cpu/armv7/sunxi/psci.c
> @@ -60,6 +60,18 @@
>
> #define SUN8I_R528_C0_STATUS_STANDBYWFI (16)
>
> +/* 3 hacks for compatibility across v1/v2 of Andre's R528 support series */
> +#ifndef SUNXI_R_CPUCFG_BASE
> +#define SUNXI_R_CPUCFG_BASE 0
> +#endif
Mmh, I didn't find a better solution than keeping this in.
> +#ifndef SUNXI_PRCM_BASE
> +#define SUNXI_PRCM_BASE 0
So this is now handled. As Samuel pointed out, the R329 (another member of
the "NCAT2" family), actually documents a PRCM block, and arguably the
T113s/D1 have that as well, it's just not very useful (at least for
U-Boot), so we didn't need it so far. I just put the address documented in
the R329 manual into cpu_sunxi_ncat2.h, so the symbol expands properly.
> +#endif
> +#if defined(SUNXI_CPUX_BASE) && defined(SUNXI_CPUCFG_BASE)
> +#undef SUNXI_CPUCFG_BASE
> +#define SUNXI_CPUCFG_BASE SUNXI_CPUX_BASE
So what's the story with this? Do we name this differently
(SUNXI_CPUX_BASE) because the IP block is different from the other SoCs?
Or is there another SUNXI_CPUCFG IP block on the R528/T113s SoCs?
If not, I think we should use the SUNXI_CPUCFG_BASE name directly in
cpu_sunxi_ncat2.h, as we never claimed that same names for some MMIO
address blocks means they are compatible.
Please let me know if I miss something.
Cheers,
Andre
> +#endif
> +
> static void __secure cp15_write_cntp_tval(u32 tval)
> {
> asm volatile ("mcr p15, 0, %0, c14, c2, 0" : : "r" (tval));
