Hi Marek
On 11/13/21 3:23 AM, Marek Vasut wrote:
> Enable DWC IP clock in driver probe, so the MII access is possible even
> outside of active network transfers. This is particularly useful when
> using 'mii' or 'mdio' commands to explore PHY state, neither of which
> works with DWMAC currently du
Hi Marek
On 11/13/21 3:25 AM, Marek Vasut wrote:
> Add script to read U-Boot from SD card and write it to matching
> locations in the SPI NOR, thus making the SPI NOR bootable. The
> script erases the entire SPI NOR, including U-Boot environment,
> to make sure the installation is clean. To retain
Hi Marek
On 11/13/21 3:24 AM, Marek Vasut wrote:
> The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
> the USB Vbus is stable. Increase the USB power-good delay to 1 s.
>
> This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
> stm32mp15_common.h to reduce duplica
Hi Marek
On 11/13/21 3:26 AM, Marek Vasut wrote:
> The Micrel PHYs on known DHSOM based boards take a while to come out
> of reset, increase the auto-negotiation timeout to prevent it from
> timing out in case the ethernet is used right after the board was
> reset.
>
> Signed-off-by: Marek Vasut
Hi Marek
On 11/13/21 3:26 AM, Marek Vasut wrote:
> The variables retaining the strap values have to be initialized, always,
> make it so. Moreover, free the requested GPIO list at the end to avoid
> wasting memory.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> -
Hi Marek
On 11/13/21 3:27 AM, Marek Vasut wrote:
> The ethernet PHY must be reset on AV96, however DWMAC currently does
> not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
> PHY reset property is going away on next DT sync. Add PHY specific
> reset bindings to trigger the PHY r
Hi Marek
On 11/13/21 3:28 AM, Marek Vasut wrote:
> Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
> AV96 board has this PHY populated on the PCB.
>
> Signed-off-by: Marek Vasut
> Cc: Patrice Chotard
> Cc: Patrick Delaunay
> ---
> configs/stm32mp15_dhcor_basic_defconfig | 2
Hi Patrick
On 11/10/21 6:14 PM, Patrick Delaunay wrote:
> Define LOG_CATEGORY to allow filtering with log command.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/pinctrl/pinctrl-stmfx.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drive
Done. The v4 is sent.
On Mon, Nov 15, 2021, 09:59 Michal Simek wrote:
>
>
> On 11/5/21 22:16, Oleksandr Suvorov wrote:
> > Hello Michal,
> >
> > On Wed, Nov 3, 2021 at 1:45 PM Michal Simek
> wrote:
> >>
> >>
> >>
> >> On 11/2/21 14:49, Oleksandr Suvorov wrote:
> >>>
> >>> This patchset introduc
On 11/12/21 11:10 PM, Quentin Schulz wrote:
> Allow the dm driver be omitted by SPL.
>
> Cc: Quentin Schulz
> Signed-off-by: Quentin Schulz
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/power/pmic/Kconfig | 14 ++
> drivers/power/pmic/Makefile | 2 +-
>
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit 41dec2fe99512e941261594f522b2e7d485c314b ]
>
> U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
> support it, so let's force to use it.
>
> - Drop non-BLK support for DM_MMC introduced by below patch.
> 66fa035 mmc:
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit 2913926f3b3dec282f8773e3c02377c9600d8267 ]
>
> Remove redundant DM_MMC checking which is already in DM_MMC conditional
> compile block.
>
> Signed-off-by: Yangbo Lu
> Signed-off-by: Sean Anderson
Reviewed-by: Jaehoon Chung
Best R
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit 5b05fc0310cd933acf76ee661577c6b07a95e684 ]
>
> Voltage validation should be done by CMD8. Current comparison between
> mmc_cfg voltages and host voltage capabilities is meaningless.
> So drop current comparison and let voltage validati
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit 07bae1de382723b94244096953b05225572728cd ]
>
> This patch is to clean up bus width setting code.
>
> - For DM_MMC, remove getting "bus-width" from device tree.
> This has been done in mmc_of_parse().
>
> - For non-DM_MMC, move bus
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit commit 08197cb8dff7cd097ab07a325093043c39d19bbd ]
>
> Drop redundant code for non-removable feature. "non-removable" property
> has been read in mmc_of_parse().
>
> Signed-off-by: Yangbo Lu
> Signed-off-by: Sean Anderson
Reviewed-b
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit 30f6444d024a74ee48aa6969c1531aecd3c59deb ]
>
> Fix mmc->clock with actual clock which is divided by the
> controller, and record it with priv->clock.
>
> Signed-off-by: Yangbo Lu
> Signed-off-by: Sean Anderson
Reviewed-by: Jaehoon
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit da86e8cfcb03ed5c1d8e0718bc8bc8583e60ced8 ]
>
> SDMA can only do DMA with 32 bit addresses. This is true for all
> architectures (just doesn't apply to 32 bit ones). Simplify the code and
> remove unnecessary CONFIG_FSL_LAYERSCAPE.
>
>
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit b1ba1460a445bcc67972a617625d0349e4f22b31 ]
>
> Use the dma_{map,unmap}_single() calls. These will take care of the
> flushing and invalidation of caches.
>
> Signed-off-by: Michael Walle
> Signed-off-by: Sean Anderson
Reviewed-by:
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit 7e48a028a42c111ba38a90b86e5f57dace980fa0 ]
>
> First, we need the waterlevel setting for PIO mode only. Secondy, both DMA
> setup code is identical for both directions, except for the data pointer.
> Thus, unify them.
>
> Signed-off-b
On 11/13/21 4:15 AM, Sean Anderson wrote:
> [ fsl_esdhc commit 52faec31827ec1a1837977e29c067424426634c5 ]
>
> Make the code cleaner and drop the old-style #ifdef constructs where it is
> possible.
>
> Signed-off-by: Michael Walle
> Signed-off-by: Sean Anderson
> ---
>
> (no changes since v1)
>
On 11/11/21 16:59, Marek Behún wrote:
From: Pali Rohár
There are certain restrictions for kwbimage offset and blocksize.
Validate them.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
Some nitpicking comments below...
Other than this:
Reviewed-by: Stefan Roese
---
arch/arm/mach
On 11/11/21 16:59, Marek Behún wrote:
From: Pali Rohár
Add parameter spl_boot_device to spl_parse_board_header(), which allows
the implementations to see from which device we are booting and do
boot-device-specific checks of the image header.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Beh
On 11/11/21 16:59, Marek Behún wrote:
From: Pali Rohár
Each boot mode has its own kwbimage specified by blockid. So check that
kwbimage is valid by blockid.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
Again, some minor comments below...
Other than this:
Reviewed-by: Stefan Roese
On 11/11/21 16:59, Marek Behún wrote:
From: Pali Rohár
Commit 9baab60b8054 ("SPL: Add support for parsing board / BootROM specific
image types") added support for loading board specific image types.
This commit adds support for a new weak function spl_parse_board_header()
which is called after
On 11/11/21 16:59, Marek Behún wrote:
From: Pali Rohár
Last 4 bytes of kwbimage boot image is checksum. Verify it via the new
spl_check_board_image() function which is called by U-Boot SPL after
loading kwbimage.
Signed-off-by: Pali Rohár
Signed-off-by: Marek Behún
---
arch/arm/mach-mvebu/
On 13/11/2021 16:49, Tom Rini wrote:
> On Sat, Nov 13, 2021 at 07:07:15AM -0700, Simon Glass wrote:
>
>> This should use the provided U_BOOT_DRIVER() macro so that the driver gets
>> added to the appropriate linker list. Fix it.
>>
>> Signed-off-by: Simon Glass
>> Fixes: 7c9dcfed50f ("pinctrl: me
From: "Ying-Chun Liu (PaulLiu)"
Previously these two options are called CONFIG_SPL_MMC_SUPPORT
and CONFIG_SPL_SERIAL_SUPPORT. During the transition they are
removed by accident. Thus adding them back.
This patch is a re-work of previously posted on mailing list.
[PATCH] imx8mm-cl-iot-gate-optee:
From: "Ying-Chun Liu (PaulLiu)"
Previously these two options are called CONFIG_SPL_MMC_SUPPORT
and CONFIG_SPL_SERIAL_SUPPORT. During the transition they are
removed by accident. Thus adding them back.
Signed-off-by: Ying-Chun Liu (PaulLiu)
Cc: uboot-imx
---
configs/imx8mm-cl-iot-gate-optee_de
Hi,
On 11/9/21 5:08 PM, Etienne Carriere wrote:
This change implements an SCMI transport for agent interfacing the
OP-TEE SCMI service. OP-TEE provides an SCMI PTA (Pseudo-TA) for
non-secure world to send SCMI messages over an identified channel.
The driver implemented here uses a SMT shared mem
Provide a QEMU helper script to launch swtpm and add extra parameters to
conf.qemu_arm64_na and conf.qemu_arm_na to provide an emulated TPMv2.
Signed-off-by: Heinrich Schuchardt
---
bin/qemu.swtpm | 19 +++
bin/travis-ci/conf.qemu_arm64_na | 3 ++-
bin/travis-c
> -Original Message-
> From: Dylan Hung
> Sent: Tuesday, November 2, 2021 1:42 PM
> To: u-boot@lists.denx.de; joe.hershber...@ni.com; rfried@gmail.com;
> Ryan Chen ; ChiaWei Wang
>
> Cc: BMC-SW
> Subject: [PATCH] drivers: net: add Aspeed MDIO driver
>
> Add a driver for the MDIO int
Replace upper-case hex with lower-case hex for address in STM32 device tree
Patrice Chotard (8):
ARM: dts: stm32: Use lower-case hex for address for
stm32mp15-u-boot.dtsi
ARM: dts: stm32: Use lower-case hex for address for
stm32f769-disco-u-boot.dtsi
ARM: dts: stm32: Use lower-case
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp15-u-boot.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi
b/arch/arm/dts/stm32mp15-u-boot.dtsi
index db23d80eef..e2
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f769-disco-u-boot.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
inde
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f469-disco-u-boot.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
inde
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index 4f34
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
index 297c
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f7-u-boot.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/stm32f7-u-boot.dtsi b/arch/arm/dts/stm32f7-u-boot.dtsi
index 46bd1102df..c1b2ac25c3 10
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32746g-eval-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32746g-eval-u-boot.dtsi
b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
index f2195a6
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32429i-eval-u-boot.dtsi
b/arch/arm/dts/stm32429i-eval-u-boot.dtsi
index 09d9d9
Hi,
On 11/10/21 6:42 AM, Joakim Zhang wrote:
For EQOS ethernet, it will do phy_connect() and phy_config() when start
the ethernet (eqos_srart()), users need wait seconds for PHY auto negotiation
s/eqos_srart()/eqos_start()/
to complete when do tftp boot.
phy_config()
-> bo
Hi All
For information
Another patch from Marek will collide with this one =>
https://patchwork.ozlabs.org/project/uboot/patch/2023022352.231762-1-ma...@denx.de/
Patrice
On 11/15/21 11:41 AM, Patrick DELAUNAY wrote:
> Hi,
>
> On 11/10/21 6:42 AM, Joakim Zhang wrote:
>> For EQOS ethernet,
On Sat, Nov 13, 2021 at 11:15:54AM -0700, Simon Glass wrote:
> On Tue, 9 Nov 2021 at 00:02, Ilias Apalodimas
> wrote:
> >
> > There's a lot of code duplication in U-Boot right now. All the TPM TIS
> > compatible drivers we have at the moment have their own copy of a TIS
> > implementation.
> >
>
Hi Simon,
On Sat, Nov 13, 2021 at 11:14:27AM -0700, Simon Glass wrote:
> Hi Ilias,
>
> On Tue, 9 Nov 2021 at 00:02, Ilias Apalodimas
> wrote:
> >
> > A previous patch added support for an mmio based TPM.
> > Add an example in QEMU on it's usage
> >
> > Reviewed-by: Simon Glass
> > Signed-off-by
Hi Marek,
On 11/13/21 3:24 AM, Marek Vasut wrote:
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.
This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in
Hi,
On 11/13/21 3:26 AM, Marek Vasut wrote:
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.
Signed-off-by: Marek Vasut
Cc: Patrice Ch
Hi Marek,
On 11/13/21 3:25 AM, Marek Vasut wrote:
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain envi
Hi Marek,
On 11/13/21 3:26 AM, Marek Vasut wrote:
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.
Signed-off-by: Marek Vasut
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
board/dh
Hi Marek,
On 11/13/21 3:27 AM, Marek Vasut wrote:
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset
Hi Marek,
On 11/13/21 3:28 AM, Marek Vasut wrote:
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.
Signed-off-by: Marek Vasut
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
configs/stm32mp15_dhcor_basic_defconfig | 2 ++
1 file
Hi,
On 11/15/21 11:39 AM, Patrice Chotard wrote:
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp15-u-boot.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi,
On 11/15/21 11:39 AM, Patrice Chotard wrote:
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f769-disco-u-boot.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patric
Hi,
On 11/15/21 11:39 AM, Patrice Chotard wrote:
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi,
On 11/15/21 11:39 AM, Patrice Chotard wrote:
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f7-u-boot.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi,
On 11/15/21 11:39 AM, Patrice Chotard wrote:
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f469-disco-u-boot.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patric
Hi,
On 11/15/21 11:39 AM, Patrice Chotard wrote:
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi,
On 11/15/21 11:39 AM, Patrice Chotard wrote:
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32746g-eval-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Hi,
On 11/15/21 11:39 AM, Patrice Chotard wrote:
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32429i-eval-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Don't get the MAC address by the environment, but by the platform data
of the udevice. This will fix "net list" if the MAC address is randomly
generated and won't change behavior when linux is booted.
Signed-off-by: Michael Walle
---
Hi,
this is a proposal to fix the "net list" in a way that li
On 11/15/21 1:11 PM, Michael Walle wrote:
Don't get the MAC address by the environment, but by the platform data
of the udevice. This will fix "net list" if the MAC address is randomly
generated and won't change behavior when linux is booted.
Signed-off-by: Michael Walle
---
Hi,
this is a pro
Am 2021-11-15 13:15, schrieb Marek Vasut:
On 11/15/21 1:11 PM, Michael Walle wrote:
Don't get the MAC address by the environment, but by the platform data
of the udevice. This will fix "net list" if the MAC address is
randomly
generated and won't change behavior when linux is booted.
Signed-o
On 11/13/21 3:29 AM, Marek Vasut wrote:
Add support for testing whether bus voltage level translator is present
and operational. This is useful on systems where the bus voltage level
translator is optional, as the translator can be auto-detected by the
driver and the feedback clock functionality
Sometimes UART stops transmitting characters after UART clock is changed
back to XTAL. In this state UART fifo is always full. Kernel during early
boot wants to print output on UART and is waiting for non-empty UART fifo.
Which leads to CPU hangup without any (debug) output on UART.
Marvell Armada
On 11/15/21 12:18 PM, Patrick DELAUNAY wrote:
Hi,
[...]
diff --git a/include/configs/stm32mp15_common.h
b/include/configs/stm32mp15_common.h
index 4e2cabff2e7..be22d3ea7f1 100644
--- a/include/configs/stm32mp15_common.h
+++ b/include/configs/stm32mp15_common.h
@@ -169,7 +169,8 @@
STM32M
On 11/7/21 10:04 PM, qianfangui...@qq.com wrote:
From: qianfan Zhao
Fix fastboot flash bug.
If the downloading file size is equal to the partition size, "fastboot
flash" can't work, at least in sunxi platform, because used an
uninitalized point: ep->desc.
Reproduce: fastboot flash loader1 spl
On 11/15/21 1:24 PM, Michael Walle wrote:
Am 2021-11-15 13:15, schrieb Marek Vasut:
On 11/15/21 1:11 PM, Michael Walle wrote:
Don't get the MAC address by the environment, but by the platform data
of the udevice. This will fix "net list" if the MAC address is randomly
generated and won't change
Am 2021-11-15 14:17, schrieb Marek Vasut:
On 11/15/21 1:24 PM, Michael Walle wrote:
Am 2021-11-15 13:15, schrieb Marek Vasut:
On 11/15/21 1:11 PM, Michael Walle wrote:
Don't get the MAC address by the environment, but by the platform
data
of the udevice. This will fix "net list" if the MAC add
On 2021/11/15 13:57, tudor.amba...@microchip.com wrote:
Hi,
+ Michael
On 11/15/21 4:37 AM,chaochao2021...@163.com wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
From: chao zeng
When operating the write-protection flash,spi_flash_std_write
Hello,
I am trying to develop a new Arria 10 SOC board, with SFP networking and SGMII
interface.
When I set the phy-mode = "sgmii"; on the file socfpga_arria10_socdk.dtsi,
I receive the following message coming from dwmac_socfpga.c : "Unsupported PHY
mode"
This is because PHY_INTERFACE_MODE_S
On Mon, Nov 15, 2021 at 01:24:34PM +0100, Michael Walle wrote:
> Am 2021-11-15 13:15, schrieb Marek Vasut:
> > On 11/15/21 1:11 PM, Michael Walle wrote:
> > > Don't get the MAC address by the environment, but by the platform data
> > > of the udevice. This will fix "net list" if the MAC address is
On Mon, Nov 15, 2021 at 6:51 PM chaochao2021...@163.com
wrote:
>
> On 2021/11/15 13:57, tudor.amba...@microchip.com wrote:
>
> Hi,
>
> + Michael
>
> On 11/15/21 4:37 AM, chaochao2021...@163.com wrote:
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
Hi, +Ashok
On 11/9/21 18:10, Igor Opaniuk wrote:
Hi Michal,
I'm currently observing QSPI NOR access issues, for instance both
read/write operations
return invalid data (even using sf read for the images flashed from
Linux using mtd-utils/flashcp). I was able to reproduce this issue on
both Xili
Before we can start measuring the TPM must be cleared. Do this in the
post_probe() method of the uclass.
Signed-off-by: Heinrich Schuchardt
---
drivers/tpm/tpm-uclass.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c
On Mon, Nov 15, 2021 at 07:32:29PM +0530, Jagan Teki wrote:
> On Mon, Nov 15, 2021 at 6:51 PM chaochao2021...@163.com
> wrote:
> >
> > On 2021/11/15 13:57, tudor.amba...@microchip.com wrote:
> >
> > Hi,
> >
> > + Michael
> >
> > On 11/15/21 4:37 AM, chaochao2021...@163.com wrote:
> >
> > EXTERNAL
Dear Michael,
In message you wrote:
>
> And again you're masking the error and possible fixes by linux itself.
> Seems like this isn't an argument.
Respecting the explicit will of the user (i. e using what he
configured in U-Boot and passed to the kernel) is not an error. it
is intended and doc
Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.
This training is supported on the PUBL integrated in the STM32MP15x
DDR subsystem and it is not required for DDR3.
Signed-off-by: Patrick Delaunay
-
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.
The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by
Remove the DDR interactive command tuning, as the support of a predefined
DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A
and the result of this tuning will be never used.
Moreover this SW tuning procedure can failed on some hardware
configuration (to many BIST errors and no conve
Hi Heinrich,
On Mon, Nov 15, 2021 at 03:15:45PM +0100, Heinrich Schuchardt wrote:
> Before we can start measuring the TPM must be cleared. Do this in the
> post_probe() method of the uclass.
>
This looks reasonable to me. We need to note that this will make the
startup command with 'SU_STATE' a
On Mon, Nov 15, 2021 at 7:48 PM Tom Rini wrote:
>
> On Mon, Nov 15, 2021 at 07:32:29PM +0530, Jagan Teki wrote:
> > On Mon, Nov 15, 2021 at 6:51 PM chaochao2021...@163.com
> > wrote:
> > >
> > > On 2021/11/15 13:57, tudor.amba...@microchip.com wrote:
> > >
> > > Hi,
> > >
> > > + Michael
> > >
>
Hi,
Am 2021-11-15 15:31, schrieb Wolfgang Denk:
In message you wrote:
And again you're masking the error and possible fixes by linux itself.
Seems like this isn't an argument.
Respecting the explicit will of the user (i. e using what he
configured in U-Boot and passed to the kernel) is not
On 11/15/21 13:11, Michael Walle wrote:
Don't get the MAC address by the environment, but by the platform data
of the udevice. This will fix "net list" if the MAC address is randomly
generated and won't change behavior when linux is booted.
Signed-off-by: Michael Walle
thanks for looking a
Am 2021-11-15 14:57, schrieb Tom Rini:
On Mon, Nov 15, 2021 at 01:24:34PM +0100, Michael Walle wrote:
Am 2021-11-15 13:15, schrieb Marek Vasut:
> On 11/15/21 1:11 PM, Michael Walle wrote:
> > Don't get the MAC address by the environment, but by the platform data
> > of the udevice. This will fix
On 11/15/21 15:52, Michael Walle wrote:
Hi,
Am 2021-11-15 15:31, schrieb Wolfgang Denk:
In message you wrote:
And again you're masking the error and possible fixes by linux itself.
Seems like this isn't an argument.
Respecting the explicit will of the user (i. e using what he
configured
On 11/4/21 20:28, Ricardo Salveti wrote:
Config check should be done without the SPL_ prefix.
Signed-off-by: Ricardo Salveti
---
board/xilinx/zynqmp/zynqmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
ind
(This should be [PATCH v3] for those following along at home)
On 11/15/21 12:43 AM, qianfangui...@qq.com wrote:
From: qianfan Zhao
CHUNK_TYPE_RAW buffer is not aligned, and flash sparse images by
fastboot will report "Misaligned operation" if DCACHE is enabled.
Flashing Sparse Image
CACHE: Mi
On Mon, Nov 15, 2021 at 03:57:51PM +0100, Michal Simek wrote:
>
>
> On 11/15/21 15:52, Michael Walle wrote:
> > Hi,
> >
> > Am 2021-11-15 15:31, schrieb Wolfgang Denk:
> > > In message you wrote:
> > > >
> > > > And again you're masking the error and possible fixes by linux itself.
> > > > See
On Mon, Nov 15, 2021 at 03:52:51PM +0100, Michael Walle wrote:
> Hi,
>
> Am 2021-11-15 15:31, schrieb Wolfgang Denk:
> > In message you wrote:
> > >
> > > And again you're masking the error and possible fixes by linux itself.
> > > Seems like this isn't an argument.
> >
> > Respecting the expli
On 11/15/21 3:39 AM, Jaehoon Chung wrote:
On 11/13/21 4:15 AM, Sean Anderson wrote:
[ fsl_esdhc commit da86e8cfcb03ed5c1d8e0718bc8bc8583e60ced8 ]
SDMA can only do DMA with 32 bit addresses. This is true for all
architectures (just doesn't apply to 32 bit ones). Simplify the code and
remove u
On 11/15/21 3:44 AM, Jaehoon Chung wrote:
On 11/13/21 4:15 AM, Sean Anderson wrote:
[ fsl_esdhc commit 52faec31827ec1a1837977e29c067424426634c5 ]
Make the code cleaner and drop the old-style #ifdef constructs where it is
possible.
Signed-off-by: Michael Walle
Signed-off-by: Sean Anderson
Dear Michael,
In message you wrote:
>
> What is the will of the user in this case?
In which case? When the user does not bother to set a specific MAC
address and let the system gernerate a random one? Well it is his
(maybe concious, maybe not) decision...
> It is the will of the
> developer t
Am 2021-11-15 16:12, schrieb Tom Rini:
On Mon, Nov 15, 2021 at 03:52:51PM +0100, Michael Walle wrote:
Hi,
Am 2021-11-15 15:31, schrieb Wolfgang Denk:
> In message you wrote:
> >
> > And again you're masking the error and possible fixes by linux itself.
> > Seems like this isn't an argument.
>
On Mon, Nov 15, 2021 at 04:15:31PM +0100, Michael Walle wrote:
> Am 2021-11-15 16:12, schrieb Tom Rini:
> > On Mon, Nov 15, 2021 at 03:52:51PM +0100, Michael Walle wrote:
> > > Hi,
> > >
> > > Am 2021-11-15 15:31, schrieb Wolfgang Denk:
> > > > In message you wrote:
> > > > >
> > > > > And again
Dear Michal,
In message <2a51974b-41cf-56e4-c9c9-e6b699f27...@xilinx.com> you wrote:
>
> As we discussed in previous thread. I think there shouldn't be a problem
> when u-boot passes random mac address (in whatever way) but if Linux
> driver know how to get correct one it should be tried first.
Hi,
Am 2021-11-15 16:15, schrieb Wolfgang Denk:
| And if you don't want to use this feature just don't enable it via
| CONFIG_NET_RANDOM_ETHADDR.
This say all, no patches needed.
Yes, I'm giving up. I'll just deactivate that option then and open code
it in my board.
-michael
Dear Tom,
In message <2025150753.GL24579@bill-the-cat> you wrote:
>
> It might also be the case that in U-Boot some systems that are using
> NET_RANDOM_ETHADDR that really probably shouldn't? A quick grep shows
> 253 platforms enabling it today, which feels high for the number of
> boards in
Dear Tom,
In message <2025151956.GN24579@bill-the-cat> you wrote:
>
> Well, what I mean is, where are the real MAC addresses? What is the
> rationale for setting NET_RANDOM_ETHADDR?
One practical use case is board provisioning in the factory, which
includes setting up valid produt data like
Rename the function named lcd_dt_simplefb* to fdt_simplefb* to be aligned
with the associated file name fdt_simplefb.h/fdt_simplefb.c
Signed-off-by: Patrick Delaunay
---
board/raspberrypi/rpi/rpi.c | 2 +-
common/fdt_simplefb.c | 10 +-
include/fdt_simplefb.h | 4 ++--
3 fi
Add the helper function video_is_active() to test if one video device
is active.
This function can be used in board code to execute operation
only when the display is probed / really used.
Signed-off-by: Patrick Delaunay
---
drivers/video/video-uclass.c | 14 ++
include/video.h
Add a new function to activate an existing simple frame buffer node
and add the associated reserved memory, with no-map properties.
This device tree update is only done when the video device is active
and the video buffer is used.
This patch uses '#if CONFIG_IS_ENABLED(DM_VIDEO)' because
gd->vide
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