Hi Marek

On 11/13/21 3:27 AM, Marek Vasut wrote:
> The ethernet PHY must be reset on AV96, however DWMAC currently does
> not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
> PHY reset property is going away on next DT sync. Add PHY specific
> reset bindings to trigger the PHY reset and fix sporadic ethernet
> malfunctions, until the next DT sync.
> 
> Signed-off-by: Marek Vasut <ma...@denx.de>
> Cc: Patrice Chotard <patrice.chot...@foss.st.com>
> Cc: Patrick Delaunay <patrick.delau...@foss.st.com>
> ---
>  arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi 
> b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
> index 8b275e4950e..4b1dbf08387 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
> @@ -19,6 +19,17 @@
>       };
>  };
>  
> +
> +&ethernet0 {
> +     mdio0 {
> +             ethernet-phy@7 {
> +                     reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
> +                     reset-assert-us = <11000>;
> +                     reset-deassert-us = <1000>;
> +             };
> +     };
> +};
> +
>  &sdmmc1 {
>       u-boot,dm-spl;
>  };
> 
Reviewed-by: Patrice Chotard <patrice.chot...@foss.st.com>
Thanks
Patrice

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