On 09/26/2017 07:40 AM, Jagan Teki wrote:
On Mon, Sep 25, 2017 at 4:10 PM, Lukasz Majewski wrote:
The content of Bank Address Register (BAR) is volatile. It is cleared
after power cycle or reset command (RESET F0h).
Some memories (like e.g. s25fl256s) use it to access memory larger than
0x1000
Hi Marek,
On 09/26/2017 01:47 AM, Marek Vasut wrote:
> On 09/15/2017 09:10 PM, Marek Vasut wrote:
>> Add initial support for setting the vqmmc regulator. Since we do not
>> support 1V8 modes, set the regulator to 3V3 and enable it.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Masahiro Yamada
>> Cc: J
Hi Jagan,
On 09/26/2017 07:40 AM, Jagan Teki wrote:
On Mon, Sep 25, 2017 at 4:10 PM, Lukasz Majewski wrote:
The content of Bank Address Register (BAR) is volatile. It is cleared
after power cycle or reset command (RESET F0h).
Some memories (like e.g. s25fl256s) use it to access memory larger
On Isn, 2017-09-25 at 11:19 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add DDR driver suppport for Arria 10.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > arch/arm/mach-socfpga/include/mach/sdram.h | 2
On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add function for both multiple DRAM bank and single DRAM bank size
> > initialization. This common functionality could be used by every
> > single
On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Current sdram driver is only applied to gen5 device, hence it is
> > better
> > to rename sdram driver to more specific name which is related to
>
On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > These drivers handle FPGA program operation from flash loading
> > RBF to memory and then to program FPGA.
> >
> > Signed-off-by: Tien Fong Chee
On Isn, 2017-09-25 at 11:01 +0200, Marek Vasut wrote:
> On 09/25/2017 10:39 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This patch adds description on properties about location of FPGA
> > RBFs are
> > stored, type and functionality of RBF used to configure FPGA.
> >
On 24.09.2017 14:50, Baruch Siach wrote:
Signed-off-by: Baruch Siach
---
board/solidrun/clearfog/README | 20
1 file changed, 20 insertions(+)
Applied to u-boot-marvell/master.
Thanks,
Stefan
___
U-Boot mailing list
U-Boot@li
On 24.09.2017 14:50, Baruch Siach wrote:
The ClearFog Base boot from UART when setting the DIP switches to 01001.
Unfortunately, the SPL code sometimes fails to detect the UART boot
method at run-time. Add an alternative SAR UART boot value to fix this.
Note that this alternative value is not do
On 05.09.2017 07:03, Chris Packham wrote:
The Armada-38x has 1.8GHz and 2.0GHz variants. Add entries for these
variants to the sar_freq_tab.
Signed-off-by: Chris Packham
Applied to u-boot-marvell/master.
Thanks,
Stefan
___
U-Boot mailing list
U-Boo
On 22.09.2017 18:50, Chris Packham wrote:
dram_ecc_scrubbing() had code to skip unused DRAM banks but it would not
work because mvebu_sdram_bs() returns 0 and the code was subtracting 1
before checking the size. Remove the -1 from the bank size and the +1
from the total which will skip unused ban
On 30.08.2017 09:55, Stefan Roese wrote:
Currently, we support 2 "theadorable" MVEBU build targets. One with a
stripped down configuration (theadorable) and one with a full blown
configuration (theadorable_debug), including PCI, ethernet etc. When
we introduced these configs, the plan was to remo
On 21.08.2017 10:17, Chris Packham wrote:
This converts the following to Kconfig:
CONFIG_MVNETA
Signed-off-by: Chris Packham
Applied to u-boot-marvell/master.
Thanks,
Stefan
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/lis
Hi Vikas
On 09/25/2017 09:51 AM, Patrice CHOTARD wrote:
> Hi Vikas
>
> On 09/20/2017 03:39 AM, Vikas Manocha wrote:
>> Hi Patrice,
>>
>> On 09/13/2017 09:00 AM, patrice.chot...@st.com wrote:
>>> From: Patrice Chotard
>>>
>>> This driver implements basic clock setup, only clock gating
>>> is impl
On 04.09.2017 07:38, Chris Packham wrote:
These SoCs are network packet processors (switch chips) with integrated
ARMv7 cores. They share a great deal of commonality with the Armada-XP
CPUs.
Signed-off-by: Chris Packham
---
There are actually a number of IDs for these chips, probably a dozen in
On 04.09.2017 07:38, Chris Packham wrote:
From: Joshua Scott
Display more information about the current RAM configuration. With these
changes the output on a 88F6820 board is
SoC: MV88F6820-A0 at 1600 MHz
DRAM: 2 GiB (800 MHz, 32-bit, ECC not enabled)
Signed-off-by: Joshua Scott
Sig
On Isn, 2017-09-25 at 11:00 +0200, Marek Vasut wrote:
> On 09/25/2017 10:39 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This patch adds description on properties about location of FPGA
> > RBFs are
> > stored, type and functionality of RBF used to configure FPGA.
> >
Hi Tom,
please pull the following MVEBU related patches.
Thanks,
Stefan
The following changes since commit 1f6049e2501b5c35c61435dbc05ba96743202674:
tools/mkimage: Make the path to the dtc binary that mkimage calls
configurable (2017-09-24 07:33:03 -0400)
are available in the git repositor
Hi Stephen,
On Tue, Sep 26, 2017 at 1:11 AM, Stephen Warren wrote:
> On 09/25/2017 10:40 AM, Marek Vasut wrote:
>>
>> On 09/25/2017 06:13 PM, Stephen Warren wrote:
>>>
>>> Marek,
>>
>>
>> +CC Bin
>>
>> I will drop the xhci patchset and hope to get a fixed one from him.
>
>
> The latest branch con
On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > These drivers handle FPGA program operation from flash loading
> > RBF to memory and then to program FPGA.
> >
> > Signed-off-by: Tien Fong Chee
On 09/26/2017 10:54 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:00 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:39 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> This patch adds description on properties about location of FPGA
>>> RBFs are
>>> stored, type and
On 09/26/2017 10:30 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> These drivers handle FPGA program operation from flash loading
>>> RBF to memory and then to progra
On 09/26/2017 06:42 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:23 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Enhance preloader header with both additional program length and
>>> program
>>> entry offset attri
On 09/26/2017 07:06 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:21 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Add support to memory allocation in SPL for preparation to enable
>>> FAT
>>> in SPL. Memory alloca
On 09/26/2017 10:20 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:19 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Add DDR driver suppport for Arria 10.
>>>
>>> Signed-off-by: Tien Fong Chee
>>> ---
>>> arch/arm/
On 09/26/2017 10:23 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Current sdram driver is only applied to gen5 device, hence it is
>>> better
>>> to rename sdram dri
On 09/26/2017 10:20 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:15 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Add function for both multiple DRAM bank and single DRAM bank size
>>> initialization. This common
On 09/26/2017 06:31 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:24 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Enable SPL loading U-boot from SDMMC to DDR and booting U-boot.
>> This patch seems to be doing mor
On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> These drivers handle FPGA program operation from flash loading
>>> RBF to memory and then to progra
Hi Stefano,
On Wed, Sep 20, 2017 at 8:17 PM, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Add support for the latest MX6QP wandboard variant.
>
> Based on Richard Hu's work from Technexion's U-Boot tree.
>
> Signed-off-by: Fabio Estevam
> ---
> Changes since v1:
> - None
Please disconsider t
Hi,
W dniu 25.09.2017 o 12:29, Heiko Stübner pisze:
Hi Andy,
Am Montag, 25. September 2017, 17:45:03 CEST schrieb Andy Yan:
On 2017年09月22日 13:56, Heiko Stuebner wrote:
Am Freitag, 22. September 2017, 08:50:49 CEST schrieb Andy Yan:
Hi Heiko:
On 2017年09月22日 08:24, Andy Yan wrote:
Hi Heiko:
On 26/09/2017 13:19, Fabio Estevam wrote:
> Hi Stefano,
>
> On Wed, Sep 20, 2017 at 8:17 PM, Fabio Estevam wrote:
>> From: Fabio Estevam
>>
>> Add support for the latest MX6QP wandboard variant.
>>
>> Based on Richard Hu's work from Technexion's U-Boot tree.
>>
>> Signed-off-by: Fabio Estevam
On Mon, Sep 25, 2017 at 01:21:35PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this PR.
>
> thanks!
> Jagan.
>
> The following changes since commit 1f6049e2501b5c35c61435dbc05ba96743202674:
>
> tools/mkimage: Make the path to the dtc binary that mkimage calls
> configurable (2017-09-
On Mon, Sep 25, 2017 at 02:31:03PM +0900, Jaehoon Chung wrote:
> Dear Tom,
>
> Could you pull these patches into u-boot/master?
> If there is a problem, let me know, plz.
>
> Other patches needs to check more, so i didn't apply them.
> If i need to send PR again, i will send the PR as "take v2"
The 'block' field of fat_itr needs to be properly aligned for DMA and
while it does have '__aligned(ARCH_DMA_MINALIGN)', the fat_itr structure
itself needs to be properly aligned as well.
While at it use malloc_cache_aligned() for other aligned allocations in
the file.
Fixes: 2460098cffacd1 ("fs/
On Mon, Sep 25, 2017 at 06:41:58PM +0200, Marek Vasut wrote:
> The following changes since commit 1f6049e2501b5c35c61435dbc05ba96743202674:
>
> tools/mkimage: Make the path to the dtc binary that mkimage calls
> configurable (2017-09-24 07:33:03 -0400)
>
> are available in the git repository a
Hi Vikas
On 09/26/2017 10:51 AM, Patrice CHOTARD wrote:
> Hi Vikas
>
> On 09/25/2017 09:51 AM, Patrice CHOTARD wrote:
>> Hi Vikas
>>
>> On 09/20/2017 03:39 AM, Vikas Manocha wrote:
>>> Hi Patrice,
>>>
>>> On 09/13/2017 09:00 AM, patrice.chot...@st.com wrote:
From: Patrice Chotard
As explained in arch/arm/mach-sunxi/clock_sun8i_a83t.c, clk for CPU
clusters is computed as clk = 24*n. However, the current formula is clk
= 24*(n-1).
This results in a clock set to a frequency that isn't specified as
possible for CPUs.
Let's use the correct formula.
Fixes: f542948b1e8c ("sunxi
On Tue, Sep 26, 2017 at 5:32 PM, Bin Meng wrote:
> Hi Stephen,
>
> On Tue, Sep 26, 2017 at 1:11 AM, Stephen Warren wrote:
>> On 09/25/2017 10:40 AM, Marek Vasut wrote:
>>>
>>> On 09/25/2017 06:13 PM, Stephen Warren wrote:
Marek,
>>>
>>>
>>> +CC Bin
>>>
>>> I will drop the xhci patchset
Hi,
I write a script on u-boot but i found 2 strange behaviors.
The first one is when I try to do a mask from a memory address and
store it to an env variable.
=> setexpr toto *{loadaddr} & 0xFF
syntax error
=> setexpr toto *{loadaddr} & 0x3F
syntax error
=> setexpr toto 0x3F & *{loadaddr}
synt
On Tue, Sep 26, 2017 at 02:02:47PM +, Quentin Schulz wrote:
> As explained in arch/arm/mach-sunxi/clock_sun8i_a83t.c, clk for CPU
> clusters is computed as clk = 24*n. However, the current formula is clk
> = 24*(n-1).
>
> This results in a clock set to a frequency that isn't specified as
> pos
Dear Clément Péron,
In message
you wrote:
>
> I write a script on u-boot but i found 2 strange behaviors.
I'm tempted to rephrase: you made some errors :-)
> The first one is when I try to do a mask from a memory address and
> store it to an env variable.
>
> => setexpr toto *{loadaddr} & 0x
From: Alison Chaiken
Create a common exit for most of the error handling code in
do_rename_gpt_parts. Delete the list elements in disk_partitions
before calling INIT_LIST_HEAD from get_gpt_info() a second time.
The SIZEOF_MISMATCH error is not addressed, since that problem was
already fixed by
Hi,
On Tue, Sep 26, 2017 at 10:39 PM, wrote:
> From: Alison Chaiken
>
> Create a common exit for most of the error handling code in
> do_rename_gpt_parts. Delete the list elements in disk_partitions
> before calling INIT_LIST_HEAD from get_gpt_info() a second time.
>
> The SIZEOF_MISMATCH err
From: Alison Chaiken
Create a common exit for most of the error handling code in
do_rename_gpt_parts. Delete the list elements in disk_partitions
before calling INIT_LIST_HEAD from get_gpt_info() a second time.
The SIZEOF_MISMATCH error is not addressed, since that problem was
already fixed by
On Tue, Sep 26, 2017 at 07:42:28AM -0700, ali...@peloton-tech.com wrote:
> From: Alison Chaiken
>
> Create a common exit for most of the error handling code in
> do_rename_gpt_parts. Delete the list elements in disk_partitions
> before calling INIT_LIST_HEAD from get_gpt_info() a second time.
>
On Tue, Sep 26, 2017 at 03:21:25PM +0300, Tuomas Tynkkynen wrote:
> The 'block' field of fat_itr needs to be properly aligned for DMA and
> while it does have '__aligned(ARCH_DMA_MINALIGN)', the fat_itr structure
> itself needs to be properly aligned as well.
>
> While at it use malloc_cache_alig
Dear Wolfgang Denk,
Thanks a lot for your explanations !
Clement
> I'm tempted to rephrase: you made some errors :-)
>> The first one is when I try to do a mask from a memory address and
>> store it to an env variable.
>>
>> => setexpr toto *{loadaddr} & 0xFF
>> syntax error
>> => setexpr toto
On Mon, Sep 25, 2017 at 10:06:31PM +0300, Tuomas Tynkkynen wrote:
> The current code doesn't compute the group descriptor checksum correctly
> for the filesystems that e2fsprogs 1.43.4 creates (they have
> 'Group descriptor size: 64' as reported by tune2fs). Extend the checksum
> calculation to be
On Mon, Sep 25, 2017 at 10:06:32PM +0300, Tuomas Tynkkynen wrote:
> Currently we can only test FAT32 which is the default FAT version that
> mkfs.vfat creates by default. Instead make it explicitly create either a
> FAT16 or a FAT32 volume. This allows us to exercise more code, for
> instance the
On Mon, Sep 25, 2017 at 10:06:34PM +0300, Tuomas Tynkkynen wrote:
> The previous commit fixed a problem in FAT code where going back to the
> root directory using '..' wouldn't work correctly on FAT12 or FAT16.
> Add a test to exercise this case (which was once fixed in commit
> 18a10d46f26 "fat:
+Simon,
On Tue, Sep 26, 2017 at 10:14 PM, Bin Meng wrote:
> On Tue, Sep 26, 2017 at 5:32 PM, Bin Meng wrote:
>> Hi Stephen,
>>
>> On Tue, Sep 26, 2017 at 1:11 AM, Stephen Warren
>> wrote:
>>> On 09/25/2017 10:40 AM, Marek Vasut wrote:
On 09/25/2017 06:13 PM, Stephen Warren wrote:
>>>
2017-09-22 22:54 GMT+09:00 Jaehoon Chung :
> On 08/21/2017 12:11 AM, Marek Vasut wrote:
>> This patch prepares the driver to support controller(s) with registers
>> at locations shifted by constant. Pull out the readl()/writel() from
>> the driver into separate functions, where the adjustment of th
On 12.09.2017 19:09, Marek Vasut wrote:
Embed the flash base into struct flash_info instead of having ad-hoc
static array in the code. This does not only remove static variable,
but also allows CFI-like controllers, ie. HyperFlash ones, to use most
of the CFI flash code by populating the flash_in
On 12.09.2017 19:09, Marek Vasut wrote:
The status register is optional in the AMD command sets, but it's
presence can be checked by reading out CFI table entry 0xc bit 0.
If the register is present, prefer using it's bit 7 to determine
if the flash is busy over reading the flash ; this is needed
Hi Tom,
please pull the following 2 patches from Marek for the CFI driver.
Thanks,
Stefan
The following changes since commit 1f6049e2501b5c35c61435dbc05ba96743202674:
tools/mkimage: Make the path to the dtc binary that mkimage calls
configurable (2017-09-24 07:33:03 -0400)
are available in
On 09/26/2017 06:25 PM, Tom Rini wrote:
On Mon, Sep 25, 2017 at 10:06:31PM +0300, Tuomas Tynkkynen wrote:
The current code doesn't compute the group descriptor checksum correctly
for the filesystems that e2fsprogs 1.43.4 creates (they have
'Group descriptor size: 64' as reported by tune2fs). Ext
On Tue, Sep 26, 2017 at 07:04:06PM +0300, Tuomas Tynkkynen wrote:
> On 09/26/2017 06:25 PM, Tom Rini wrote:
> >On Mon, Sep 25, 2017 at 10:06:31PM +0300, Tuomas Tynkkynen wrote:
> >>The current code doesn't compute the group descriptor checksum correctly
> >>for the filesystems that e2fsprogs 1.43.4
With the overlay tests now being built in sandbox Coverity has found a
number of issues in the tests. In short, if malloc ever failed we would
leak the previous mallocs, so we need to do the usual goto pattern to
free each in turn. Finally, we always looked at the free()d location to
see how many
Hi,
I'm currently testing USB on my x86 platform. And noticed, that
the "usb storage" command does not work as expected:
=> usb reset
resetting USB...
USB0: Register 7000820 NbrPorts 7
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 5 USB Device(s) found
scanning us
Thanks Patrice,
> -Original Message-
> From: Patrice CHOTARD
> Sent: Tuesday, September 26, 2017 5:27 AM
> To: Vikas MANOCHA ; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; s...@chromium.org
> Cc: Patrick DELAUNAY ; Christophe KERELLO
>
> Subject: Re: [PATCH v2 3/9] dm: clk: add cl
Hi Peter,
2017-09-25 16:00 GMT-03:00 Fabio Estevam :
> Hi Peter,
>
> On Mon, Sep 25, 2017 at 3:54 PM, Peter Robinson wrote:
>> Hi Fabio,
>>
>> I'm seeing some issues with some of the i.MX6 devices with the latest
>> stable release. It loads the SPL and then just seems to loop:
>>
>> U-Boot SPL 20
Hi Philipp,
On 13.9.2017 21:29, Philipp Tomsich wrote:
>
> A number of things about how we boot the RK3368 and RK3399 through ATF
> are less than ideal today, especially when considering future
> platforms that will follow a similar boot concept:
> - the auto-detection of images from the FIT imag
Hi Michal,
I wanted to check in and see if you've had a chance to review this patch
yet. Please let me know if you need me to make any changes or if it's good
to go.
Thanks,
-Tom
On Tue, Sep 12, 2017 at 11:05 AM, Tom McLeod
wrote:
> Add the Zynq-based SYZYGY Hub board from Opal Kelly. The boar
Resending with proper CC since the email came back.
On 24/09/17 09:36 PM, Liam Beguin wrote:
> Hi,
>
> I'm testing a new Xilinx zynqmp dev board and was not able to probe the
> qspi with the latest mainline U-Boot. I see that there is a 'zynqmp_qspi'
> driver in the Xilinx tree [1] but nothing i
Hi,
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: Tuesday, September 26, 2017 10:17 AM
> To: Liam Beguin
> Cc: u-boot@lists.denx.de; Michal Simek ; Siva Durga
> Prasad Paladugu
> Subject: Re: [U-Boot] ZynqMP qspi
>
> On Tue, Sep 26, 2017 at 9:07 AM, L
Add option to set spi controller clock frequency via device tree
using standard clock bindings.
Old way of setting spi controller clock frequency (via implementation
of 'cm_get_spi_controller_clk_hz' function in platform specific code)
remains supported.
Signed-off-by: Eugeniy Paltsev
---
Resend
Hi,
On 26/09/17 01:28 AM, Siva Durga Prasad Paladugu wrote:
> Hi,
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: Tuesday, September 26, 2017 10:17 AM
>> To: Liam Beguin
>> Cc: u-boot@lists.denx.de; Michal Simek ; Siva Durga
>> Prasad Paladugu
>> S
>>> I'm seeing some issues with some of the i.MX6 devices with the latest
>>> stable release. It loads the SPL and then just seems to loop:
>>>
>>> U-Boot SPL 2017.09 (Sep 25 2017 - 18:42:10)
>>> Trying to boot from MMC1
>>>
>>> U-Boot SPL 2017.09 (Sep 25 2017 - 18:42:10)
>>> Trying to boot from MM
The UniPhier SD driver handles the same Matsushita IP as is used
in the Renesas RCar SoCs, yet the driver is significantly better
than the SH SDHI one. Switch over to the Uniphier driver.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
configs/r8a7795_salvator-x_defconfig | 2 +-
configs/r
The R8A7796 EHCI USB nodes are missing from r8a7796 dtsi, add them.
These nodes don't come from mainline Linux, yet the DT binding is
similar enough to R8A7795 which already has those in mainline and
once the nodes hit mainline, this DT should be resynched.
Signed-off-by: Marek Vasut
Cc: Nobuhiro
Enable the EHCI generic driver, which is superior to ad-hoc SoC specific one.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
configs/r8a7795_ulcb_defconfig | 1 +
configs/r8a7796_ulcb_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/r8a7795_ulcb_defconfig b/configs/
Old version of the uniphier-sd 64bit IO support patchset V1 was
applied by the maintainer, update the uniphier-sd.c with the
changes from the V3 of the patchset.
Signed-off-by: Marek Vasut
Cc: Masahiro Yamada
Cc: Jaehoon Chung
---
drivers/mmc/uniphier-sd.c | 83
Enable the EHCI generic driver, which is superior to ad-hoc SoC specific one.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
configs/r8a7795_salvator-x_defconfig | 1 +
configs/r8a7796_salvator-x_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/r8a7795_salvator-x_de
Just move those config options from macros to configs.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
configs/r8a7795_salvator-x_defconfig | 4
configs/r8a7795_ulcb_defconfig | 5 +
configs/r8a7796_salvator-x_defconfig | 4
configs/r8a7796_ulcb_defconfig | 5
In order to use ehci-generic driver, move the configuration of HSUSB
block into the board file. This configuration should not have been in
the Gen3 EHCI USB driver in the first place, so move it to the board
file until there is a proper infrastructure and driver for the HSUSB
block.
Signed-off-by:
In order to use ehci-generic driver, move the configuration of HSUSB
block into the board file. This configuration should not have been in
the Gen3 EHCI USB driver in the first place, so move it to the board
file until there is a proper infrastructure and driver for the HSUSB
block.
Signed-off-by:
Since we use EHCI generic driver on RCar Gen3 , this driver is useless.
Remove it.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
drivers/usb/host/Kconfig | 8 ---
drivers/usb/host/Makefile | 1 -
drivers/usb/host/ehci-rcar_gen3.c | 106 ---
Coverity scan has identified potential buffer overruns in these tests.
Correct this by zeroing our buffer and using strncpy not strcpy.
Reported-by: Coverity (CID: 155462, 155463)
Cc: Joe Hershberger
Cc: Simon Glass
Cc: Bin Meng
Signed-off-by: Tom Rini
---
test/dm/eth.c | 8 +---
1 file c
Hello Tom,
I just read some days ago about the kernel Coding-Style:
Choose label names which say what the goto does or why the goto exists. An
example of a good name could be ``out_free_buffer:`` if the goto frees
``buffer``.
Avoid using GW-BASIC names like ``err1:`` and ``err2:``, as you woul
Hi Bin,
On 17 September 2017 at 23:45, Bin Meng wrote:
> On Sun, Sep 17, 2017 at 5:23 AM, Simon Glass wrote:
>> It is useful to display log messages on the console. Add a simple driver
>> to handle this.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> common/Kconfig | 20 ++
Hi Masahiro,
On 20 September 2017 at 11:19, Masahiro Yamada
wrote:
> Hi Simon,
>
>
> 2017-09-20 22:49 GMT+09:00 Simon Glass :
>> Hi Masahiro,
>>
>> On 19 September 2017 at 20:51, Masahiro Yamada
>> wrote:
>>> Hi Simon,
>>>
>>>
>>> 2017-09-17 6:23 GMT+09:00 Simon Glass :
>>>
+menu "Logg
On 26 September 2017 at 12:08, Tom Rini wrote:
> Coverity scan has identified potential buffer overruns in these tests.
> Correct this by zeroing our buffer and using strncpy not strcpy.
>
> Reported-by: Coverity (CID: 155462, 155463)
> Cc: Joe Hershberger
> Cc: Simon Glass
> Cc: Bin Meng
> Sig
On Tue, Sep 26, 2017 at 06:28:40PM +, Langer, Thomas wrote:
> Hello Tom,
>
> I just read some days ago about the kernel Coding-Style:
>
>
> Choose label names which say what the goto does or why the goto exists. An
> example of a good name could be ``out_free_buffer:`` if the goto frees
>
U-Boot currently has fairly rudimentary logging features. A basic printf()
provides console output and debug() provides debug output which is
activated if DEBUG is defined in the file containing the debug()
statements.
It would be useful to have a few more features:
- control of debug output at r
We cannot use sandbox memory at 0 since other things use memory at that
address. Move it up out of the way.
Note that the pre-console buffer is currently disabled with sandbox, but
this change will avoid confusion if it is manually enabled.
Signed-off-by: Simon Glass
---
Changes in v2:
- Split
Add the logging header file and implementation with some configuration
options to control it.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add a comment as to why CONFIG_LOG_MAX_LEVEL is not defined
- Drop MAINTAINERS entries for files not added by this patch
- Drop the use of 'continue' in t
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.
For ease of debugging it seems better to revert this change.
Thi
While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.
For ease of debugging it seems better to revert this change also.
Set up logging both before and after relocation.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
common/board_f.c | 5 -
common/board_r.c | 2 ++
common/log.c | 1 +
include/asm-generic/global_data.h | 1 +
4
Add a command for adjusting the log level.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
cmd/Kconfig | 7 +++
cmd/Makefile | 1 +
cmd/log.c| 55 +++
3 files changed, 63 insertions(+)
create mode 100644
The debug() macro now evaluates its expression so does not need #ifdef
protection. In fact the current code causes a warning with the new log
implementation. Adjust the code to fix this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
cmd/mtdparts.c | 3 ---
1 file ch
Add documentation for the log system.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Drop the special log() functions from the README
doc/README.log | 214 +
1 file changed, 214 insertions(+)
create mode 100644 do
Add a command which exercises the logging system.
Signed-off-by: Simon Glass
---
Changes in v2:
- Fix function called when test command is selected
- Fix help output for 'log test'
- Rename LOGL_WARN to LOGL_WARNING
MAINTAINERS | 1 +
cmd/Kconfig | 3 +-
cmd/log.c
It is useful to display log messages on the console. Add a simple driver
to handle this.
Note that this driver outputs to the console, which may be serial or
video. It does not specifically select serial output.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Update commi
This does not appear to be used by any boards. Before introducing a new
log system, remove this old one.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
cmd/Makefile | 1 -
cmd/log.c | 313
Before adding new features, move these definitions to a separate header
to avoid further cluttering common.h.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
include/common.h | 64 +
include/log.h| 79 +++
Enable all logging features on sandbox so that the tests can be run.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Change sandbox log level to 6
configs/sandbox_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox
Add a test which tries out various filters and options to make sure that
logging works as expected.
Signed-off-by: Simon Glass
---
Changes in v2:
- Change log levels to match new header
- Only execute log tests if CONFIG_LOG is enabled
- Rename LOGL_WARN to LOGL_WARNING
MAINTAINERS
1 - 100 of 130 matches
Mail list logo
