The i2c_eeprom isn't always necessary when building for SPL,
add the condition on build i2c_eeprom.
Signed-off-by: Wenyou Yang
---
drivers/misc/Makefile | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 10265c8fb4..ccc84c38fc 100644
--
Create board/$(VENDOR)/common folder to accommodate the common code
for the boards from atmel. Now put the code to set the ethernet mac
address here, using the function to set the ethernet mac address
on sama5d2 and sama5d4 Xplained boards.
Changes in v3:
- remove CONFIG_SPL_I2C_SUPPORT=y from th
Replace the code to set the ethernet mac address with the code from
the common folder.
Signed-off-by: Wenyou Yang
---
Changes in v3: None
Changes in v2: None
arch/arm/dts/at91-sama5d2_xplained.dts | 5 +++
board/atmel/sama5d2_xplained/sama5d2_xplained.c | 47 +++--
Create board/$(VENDOR)/common folder to accommodate the common code
shared by other atmel boards, now put the code to set ethernet mac
address from eeprom, which uses the i2c eeprom driver.
Signed-off-by: Wenyou Yang
---
Changes in v3: None
Changes in v2: None
arch/arm/mach-at91/include/mach/a
Add the code to set the ethernet mac address from eeprom by using
the common code from the common folder.
Signed-off-by: Wenyou Yang
configs: sama5d4_xplained: remove CONFIG_SPL_I2C_SUPPORT
---
Changes in v3:
- remove CONFIG_SPL_I2C_SUPPORT=y from the default configuration files.
- rebase on
Add Atmel PIT timer driver, which supports the driver model
and device tree.
Signed-off-by: Wenyou Yang
---
arch/arm/mach-at91/arm926ejs/Makefile | 2 +
arch/arm/mach-at91/armv7/Makefile | 2 +
drivers/timer/Kconfig | 8
drivers/timer/Makefile| 1 +
Kever,
We use a fork of the ATF repository and have the M3 firmware completely
factored out and have changed parts of the SRAM setup.
In other words: there will be two separate .bin files created that need to be
loaded to two separate locations.
Please refer to our board’s README for the steps t
Hi Anatolji,
On 01/08/2017 15:14, Anatolij Gustschin wrote:
> For ALT0 function mux mode should be 0, not 16.
>
> Signed-off-by: Anatolij Gustschin
> ---
> arch/arm/include/asm/arch-mx6/mx6q_pins.h | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/includ
On Tue, Aug 1, 2017 at 9:10 PM, Heinrich Schuchardt
wrote:
> On 08/01/2017 10:00 PM, Rob Clark wrote:
>> This avoids printf() spam about file reads (such as loading an image)
>> into unaligned buffers (and the associated memcpy()). And generally
>> seems like a good idea.
>>
>> Signed-off-by: Rob
On Tue, Aug 1, 2017 at 10:22 PM, Heinrich Schuchardt wrote:
> On 07/31/2017 02:42 PM, Rob Clark wrote:
>> This is convenient for efi_loader which deals a lot with utf16.
>>
>> Signed-off-by: Rob Clark
>> ---
>> lib/vsprintf.c | 39 +--
>> 1 file changed, 37 in
Hi anatolji,
On 01/08/2017 15:23, Anatolij Gustschin wrote:
> Boards may extend or re-define the boot list in their board_boot_order()
> function by modifying spl_boot_list. E.g. a board might boot SPL from a
> slow SPI NOR flash and then load the U-Boot from an eMMC or SD-card.
> Or it might use
Hello Sir,
May I know the review result for this patch set? Thank you.
BR
Ran
> -Original Message-
> From: Ran Wang [mailto:ran.wan...@nxp.com]
> Sent: Monday, July 10, 2017 10:24 AM
> To: Albert Aribaud ; York Sun ;
> Suresh Gupta
> Cc: Simon Glass ; Sriram Dash ;
> Rajesh Bhagat ; A
On 07/07/2017 12:40, Ben Whitten wrote:
> This board is based on the Atmel 9x5 eval board.
> Supporting the following features:
> - Boot from NAND Flash
> - Ethernet
> - FIT
> - SPL
>
Patch is assigned to me. However, this is Atmel, now orphaned. I haven't
work with AT-91 since a very long ti
Hi Philipp:
On 2017年07月29日 03:22, Philipp Tomsich wrote:
This adds a DRAM controller driver for the RK3368 and places it in
drivers/ram/rockchip (where the other DM-enabled DRAM controller
drivers for rockchip devices should also be moved eventually).
At this stage, only the following feature-
Return the correct value when the speed grade is 696MHz.
This makes U-Boot to print the correct value at boot:
U-Boot 2017.09-rc1-dirty (Aug 02 2017 - 12:02:26 +0200)
CPU: Freescale i.MX6ULL rev1.0 696 MHz (running at 396 MHz)
instead of
U-Boot 2017.09-rc1-dirty (Aug 02 2017 - 11:47:51 +0200)
On 02/08/2017 12:15, Sébastien Szymanski wrote:
> Return the correct value when the speed grade is 696MHz.
> This makes U-Boot to print the correct value at boot:
>
> U-Boot 2017.09-rc1-dirty (Aug 02 2017 - 12:02:26 +0200)
>
> CPU: Freescale i.MX6ULL rev1.0 696 MHz (running at 396 MHz)
>
> ins
On Isn, 2017-07-31 at 12:53 +0200, Marek Vasut wrote:
> On 07/31/2017 12:50 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Function for checking boot device type, which is required for
> > locating
> > flash where U-boot image, FPGA design are stored.
> >
> > Signed-of
On Isn, 2017-07-31 at 12:54 +0200, Marek Vasut wrote:
> On 07/31/2017 12:50 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This config enable the mechanism for loading RBF file from FAT fs
> > into
> > FPGA manager.
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > a
Hi Stefano,
On Wed, 2 Aug 2017 11:24:22 +0200
Stefano Babic sba...@denx.de wrote:
...
> > -MX6_PAD_DECL(SD2_CMD__SD2_CMD, 0x0740, 0x0358, 16, 0x, 0, 0)
> > +MX6_PAD_DECL(SD2_CMD__SD2_CMD, 0x0740, 0x0358, 0, 0x, 0, 0)
...
>
> The MUX mode is not changed, but 16 means that t
The Raspberry Pi Zero W extends the Pi Zero family and it's also
based on a BCM2835 SoC. Like the Pi Zero, it has 512MB RAM,
Mini HDMI and USB On-The-Go ports. Both Pi's hasn't got Ethernet,
but Pi Zero W has built in wireless LAN 802.11 b/g/n.
Signed-off-by: Dmitry Korunov
---
Changes for v2:
Andy,
The functionality of the new driver should be equivalent for the non-TPL case.
All the code from the original driver is still present in the new driver for
non-TPL
(see rk3368_dmc_probe).
Seeing that -19 is -ENODEV, I suspect that something went wrong in the DM
binding/probing: did you set
Kever,
This patchset does not force the use of the DM timer for any chipsets/boards.
It is essentially opt-in and (for now—i.e. until we enable it for the RK3399)
it is
enabled for the RK3368 only.
Note that this does not currently target any ARMv7 devices, as it is meant to
decouple the ARMv8 g
Hi Tom,
here are changes I have collected in my tree.
I have added also a patch which make reserve_mmu as weak function which
was reviewed by Simon. We need to for mini u-boot configurations which
will be sent later.
Travis is not showing any problem with this branch too.
Thanks,
Michal
The fo
> On 01 Aug 2017, at 11:48, Simon Glass wrote:
>
> On 28 July 2017 at 10:31, Philipp Tomsich
> wrote:
>> This adds a device-model driver for the timer block in the RK3368 (and
>> similar devices that share the same timer block, such as the RK3288) for
>> the down-counting (i.e. non-secure) time
Hi Philipp:
On 2017年08月02日 18:59, Dr. Philipp Tomsich wrote:
Andy,
The functionality of the new driver should be equivalent for the non-TPL case.
All the code from the original driver is still present in the new driver for
non-TPL
(see rk3368_dmc_probe).
Yes, it's so good that the new
Hi Philipp:
2017-07-29 3:22 GMT+08:00 Philipp Tomsich <
philipp.toms...@theobroma-systems.com>:
> With SPL and TPL support for the RK3368 in place, mark SPL and TPL as
> supported from Kconfig for the RK3368. As this is primarily tested on
> the RK3368-uQ7, we'll leave it to board's individual d
Looks like SPL_SEPARATE_BSS is special.
Guess, I’ll need to figure out how to best deal with that one (or fall back to
defining it via defconfig until we can enable TPL/SPL for all RK3368 board).
I wonder how an implies would behave here...
> On 02 Aug 2017, at 14:47, Andy Yan wrote:
>
> Hi Ph
Hi,
On 08/02/2017 12:11 PM, Stefano Babic wrote:
> On 02/08/2017 12:15, Sébastien Szymanski wrote:
>> Return the correct value when the speed grade is 696MHz.
>> This makes U-Boot to print the correct value at boot:
>>
>> U-Boot 2017.09-rc1-dirty (Aug 02 2017 - 12:02:26 +0200)
>>
>> CPU: Freesca
> On 30 Jul 2017, at 21:59, Heinrich Schuchardt wrote:
>
> Do not dereference bmp before the check if it is NULL.
>
> The problem was indicated by cppcheck.
>
> Signed-off-by: Heinrich Schuchardt
Reviewed-by: Philipp Tomsich
___
U-Boot mailing li
On 02/08/2017 15:09, Sébastien Szymanski wrote:
> Hi,
>
> On 08/02/2017 12:11 PM, Stefano Babic wrote:
>> On 02/08/2017 12:15, Sébastien Szymanski wrote:
>>> Return the correct value when the speed grade is 696MHz.
>>> This makes U-Boot to print the correct value at boot:
>>>
>>> U-Boot 2017.09-rc
Device drivers like debug serial, dmc should be enabled before
relocation, so add u-boot.dtsi files to contain devices that
should be marked as dm-pre-reloc.
Signed-off-by: Andy Yan
---
arch/arm/dts/rk3368-geekbox-u-boot.dtsi | 35 +
arch/arm/dts/rk3368-px5-evb-u
The default 1kb pre-reloc malloc pool is not enough for dm
core to enable the dm-pre-reloc device drivers.
Signed-off-by: Andy Yan
---
configs/evb-px5_defconfig | 1 +
configs/geekbox_defconfig | 1 +
configs/sheep-rk3368_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a
As the debug uart is marked as dm-pre-reloc, the pinctrl driver
will handle the correct iomux setting.
Signed-off-by: Andy Yan
---
board/rockchip/evb_px5/evb-px5.c | 24
1 file changed, 24 deletions(-)
diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_
> On 02 Aug 2017, at 15:10, Andy Yan wrote:
>
> The default 1kb pre-reloc malloc pool is not enough for dm
> core to enable the dm-pre-reloc device drivers.
>
> Signed-off-by: Andy Yan
> —
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
See comment below.
>
> configs/evb-px5_defco
> On 02 Aug 2017, at 15:10, Andy Yan wrote:
>
> As the debug uart is marked as dm-pre-reloc, the pinctrl driver
> will handle the correct iomux setting.
>
> Signed-off-by: Andy Yan
> —
Acked-by: Philipp Tomsich
Reviewed-by: Philipp Tomsich
___
U-B
Am 02.08.2017 um 15:25 schrieb Dr. Philipp Tomsich:
>
>> On 02 Aug 2017, at 15:10, Andy Yan wrote:
>>
>> The default 1kb pre-reloc malloc pool is not enough for dm
>> core to enable the dm-pre-reloc device drivers.
>>
>> Signed-off-by: Andy Yan
>> —
>
> Acked-by: Philipp Tomsich
> Reviewed-by:
On Tue, Aug 01, 2017 at 08:24:50PM +0800, Bin Meng wrote:
> Hi Tom,
>
> The following changes since commit 6364a5d4bd55beeedc11171419acd0bdff17a599:
>
> Prepare v2017.09-rc1 (2017-07-31 20:37:25 -0400)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boot-x86.git
>
> fo
On Tue, Aug 01, 2017 at 02:52:47PM +0900, Jaehoon Chung wrote:
> Dear Tom,
>
> Could you pull these patches into u-boot/master?
> (Have tested the buildman.)
>
> Changelog on V2:
> - Drop the Jean-Jacques's patches. After fixing it, will apply.
>
> The following changes since commit 6364a5d4bd5
Select SION by appropriate macro instead of constant.
Signed-off-by: Anatolij Gustschin
---
arch/arm/include/asm/arch-mx6/mx6q_pins.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6q_pins.h
b/arch/arm/include/asm/arch-mx6/mx6q_pins.h
On 02/08/2017 15:56, Anatolij Gustschin wrote:
> Select SION by appropriate macro instead of constant.
>
> Signed-off-by: Anatolij Gustschin
> ---
> arch/arm/include/asm/arch-mx6/mx6q_pins.h | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/include/asm/ar
This appear to be a copy-paste error, clean it up.
Signed-off-by: Anatolij Gustschin
---
arch/arm/mach-imx/mx6/clock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
index 1f2739e..0e019c4 100644
--- a/arch/arm/ma
On 02/08/2017 16:05, Anatolij Gustschin wrote:
> This appear to be a copy-paste error, clean it up.
>
> Signed-off-by: Anatolij Gustschin
> ---
> arch/arm/mach-imx/mx6/clock.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-
On Tue, Aug 1, 2017 at 7:19 PM, Alexandru Gagniuc wrote:
> Signed-off-by: Alexandru Gagniuc
Acked-by: Joe Hershberger
___
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U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
On Tue, Aug 1, 2017 at 7:20 PM, Alexandru Gagniuc wrote:
> Signed-off-by: Alexandru Gagniuc
Acked-by: Joe Hershberger
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
On Wed, Aug 02, 2017 at 11:58:42AM +0200, Stefano Babic wrote:
> On 07/07/2017 12:40, Ben Whitten wrote:
> > This board is based on the Atmel 9x5 eval board.
> > Supporting the following features:
> > - Boot from NAND Flash
> > - Ethernet
> > - FIT
> > - SPL
> >
>
> Patch is assigned to me. H
Return the correct value when the speed grade is 696MHz.
Signed-off-by: Sébastien Szymanski
---
Changes v1 -> v2:
- Only true on i.MX6UL so adapt the subject and commit log accordingly.
---
arch/arm/mach-imx/mx6/soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/
i.MX6ULL has different speed grades than i.MX6UL.
Signed-off-by: Sébastien Szymanski
---
Notice that the i.MX6ULL RM says:
2b'00: 800MHz; 2b'01: 850MHz; 2b'10: 1GHz; 2b'11: 1.2Ghz;
which seems incorrect. The commit [1] confirmed it, but I cannot find any
996MHz i.MX6ULL on the NXP website. Accord
On 08/02/2017 02:55 AM, Ran Wang wrote:
> Hello Sir,
> May I know the review result for this patch set? Thank you.
> BR
> Ran
Ran,
I have seen three versions from Suresh, one version from Yinbo, and one
version from you. Neither you or Yinbo updated the version number, or
included change l
On Mittwoch, 2. August 2017 11:28:37 CEST Rob Clark wrote:
> On Tue, Aug 1, 2017 at 9:10 PM, Heinrich Schuchardt
[...]
> >>
> >> @@ -356,7 +356,8 @@ efi_status_t efi_allocate_pool(int pool_type,
> >> unsigned long size,>>
> >> {
> >>
> >> efi_status_t r;
> >> efi_physical_addr_t t;
On Wed, Aug 02, 2017 at 03:47:58PM +0800, Wenyou Yang wrote:
> The i2c_eeprom isn't always necessary when building for SPL,
> add the condition on build i2c_eeprom.
>
> Signed-off-by: Wenyou Yang
> ---
>
> drivers/misc/Makefile | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/dr
Hi Stefano,
On Wed, 2 Aug 2017 11:54:24 +0200
Stefano Babic sba...@denx.de wrote:
...
> > +++ b/arch/arm/mach-imx/spl.c
> > @@ -84,7 +84,7 @@ u32 spl_boot_device(void)
> > /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
> > u32 spl_boot_mode(const u32 boot_device)
> >
On Wed, Aug 2, 2017 at 11:24 AM, Brüns, Stefan
wrote:
> On Mittwoch, 2. August 2017 11:28:37 CEST Rob Clark wrote:
>> On Tue, Aug 1, 2017 at 9:10 PM, Heinrich Schuchardt
> [...]
>> >>
>> >> @@ -356,7 +356,8 @@ efi_status_t efi_allocate_pool(int pool_type,
>> >> unsigned long size,>>
>> >> {
>> >>
The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as
commented in the code:
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F.
Signed-off-by: Breno Lima
---
board/freescale/mx6sabresd/mx6sabresd.c | 4 ++--
On 08/02/2017 11:38 AM, Rob Clark wrote:
> On Tue, Aug 1, 2017 at 10:22 PM, Heinrich Schuchardt
> wrote:
>> On 07/31/2017 02:42 PM, Rob Clark wrote:
>>> This is convenient for efi_loader which deals a lot with utf16.
>>>
>>> Signed-off-by: Rob Clark
>>> ---
>>> lib/vsprintf.c | 39 +
The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as
commented in the code:
/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F.
Signed-off-by: Breno Lima
---
board/freescale/mx6sabreauto/mx6sabreauto.c | 4 ++
Hi Bin,
On 22 July 2017 at 22:36, Bin Meng wrote:
> Hi Simon,
>
> On Sun, Jul 16, 2017 at 7:41 AM, Simon Glass wrote:
>> Once U-Boot relocates itself the existing driver-model timer (if any) is
>> no-longer valid until the device is reinitialised. Any use of the device
>> may cause a crash. To h
Hi Bin,
On 22 July 2017 at 22:36, Bin Meng wrote:
> Hi Simon,
>
> On Sun, Jul 16, 2017 at 7:41 AM, Simon Glass wrote:
>> With bootstage we need access to the timer before driver model is set up.
>> To handle this, put the required state in global_data and provide a new
>> function to set up the
We can use printf() to limit the string width. Adjust the code to do this
instead of using strlcpy() which is a bit clumbsy.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to drop use of strlcpy()
drivers/core/dump.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
d
It is often useful to see which driver was actually selected for each
device. Add a new 'Driver' column to provide this information. Sample
output:
Class Probed Driver Name
root[ + ]root_drive root_driver
keyboard[ + ]i804
On Wed, Aug 2, 2017 at 1:05 PM, Heinrich Schuchardt wrote:
> On 08/02/2017 11:38 AM, Rob Clark wrote:
>> On Tue, Aug 1, 2017 at 10:22 PM, Heinrich Schuchardt
>> wrote:
>>> On 07/31/2017 02:42 PM, Rob Clark wrote:
This is convenient for efi_loader which deals a lot with utf16.
Sign
On 04/18/2017 04:57 AM, B, Ravi wrote:
> In single stage bootmode or falcon boot mode,
> the SPL shall update the memory dt nodes
> spl_fixup_fdt() based on DDR configuration for
> specific platform.
>
> Signed-off-by: Ravi Babu
> ---
> common/spl/spl.c | 40
On Wed, Aug 02, 2017 at 07:10:51PM +, York Sun wrote:
> On 04/18/2017 04:57 AM, B, Ravi wrote:
> > In single stage bootmode or falcon boot mode,
> > the SPL shall update the memory dt nodes
> > spl_fixup_fdt() based on DDR configuration for
> > specific platform.
> >
> > Signed-off-by: Ravi Ba
The back-to-bootrom support for Rockchip is equivalent to an
(assembly) implementation of setjmp/longjmp (i.e. it saves the
stack-pointer, link-register and callee-saved registers). Up until
now, this had only been implemented for AArch32 (i.e. ARMv7 or older),
which puts the new ARMv8 devices (whi
Some devices (e.g. the RK3368) have only limited SRAM, but provide
support for loading the next boot stage after our SPL performs basic
setup (e.g. DRAM).
For target systems like these, we add a boot device BOOTROM that will
invoke a board-specific hook to return to the bootrom (if supported).
Si
The (upstream) changes to break up SYS_MALLOC_F_LEN for the full
U-Boot and the SPL stage, break TPL (if simple malloc is enabled in
TPL).
This adds support for a TPL-variant of SYS_MALLOC_F_LEN:
- adds TPL_SYS_MALLOC_F_LEN
- rewrites a test for CONFIG_SPL_SYS_MALLOC_F_LEN to access
CONFIG_VAL(S
On the RK3368, we want our TPL to use the 'return to bootrom' boot
method (to have the bootrom load up the SPL stage) and then continue
with different boot methods (MMC, SPI, etc.) from SPL.
This adds the config option needed to control the availabily of the
'return to bootrom' boot-method separat
With the finer-grained control over LIBGENERIC_SUPPORT for TPL/SPL (i.e.
with the newly introduced distinction between TPL_LIBGENERIC_SUPPORT and
SPL_LIBGENERIC_SUPPORT), we can simplify the #ifdef-check to simply use
CONFIG_IS_ENABELD.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
Re
The back-to-bootrom option is rather unfortunately named
CONFIG_ROCKCHIP_SPL_BACK_TO_BOOTROM
instead of
CONFIG_SPL_ROCKCHIP_BACK_TO_BOOTROM
To make is selectable through CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BOOTROM),
we need to rename it. At the same time, we introduce a TPL_ variant of
the opt
TPL_NAND_SUPPORT, TPL_SERIAL_SUPPORT, TPL_SPI_FLASH_SUPPORT and
TPL_SPI_SUPPORT refer to SPL in their help text. This fixes up
the description to correctly reference TPL.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Changes in v4: None
Changes in v3:
- (new patch) added fix-up
On 04/04/2017 04:44 AM, Madalin Bucur wrote:
> Signed-off-by: Madalin Bucur
> ---
> drivers/net/fm/ls1046.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/fm/ls1046.c b/drivers/net/fm/ls1046.c
> index bf4..6c91fb9 100644
> --- a/drivers/net/fm/ls10
I'm currently testing U-boot 2017.07 on Raspberry Pi, both on a Model
B+ and a Raspberry Pi 3. On both devices I'm seeing two issues with
u-boot:
* U-boot can't boot the Linux kernel, it just hangs at "Starting kernel ...".
* U-boot doesn't recognise any input via a USB keyboard.
These issues we
This change introduces TPL variants of the REGMAP and SYSCON config
options (i.e. TPL_REGMAP and TPL_SYSCON in analogy to SPL_REGMAP and
SPL_SYSCON) in preparation of a finer-grained feature selection for
building feature-rich TPL variants.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
SPL_REGMAP and SPL_SYSCON were marked as depending on DM, when a
stricter dependency of SPL_DM was possible. This commit makes the
prereq more specific.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
---
Changes in v4: None
Changes in v3: None
Changes in v2: No
Hi Daniel,
El 31/07/2017 a las 12:52, Daniel Schwierzeck escribió:
> 2017-07-30 18:04 GMT+02:00 Álvaro Fernández Rojas :
>>
>>
>> El 30/07/2017 a las 16:05, Daniel Schwierzeck escribió:
>>>
>>>
>>> Am 30.07.2017 um 14:27 schrieb Álvaro Fernández Rojas:
I've been a bit busy lately and I couldn
This update has everyone's comments included and even reworks for
Simon's request to retain the _SHIFT macros. I'll start applying this
together with the DM timer series (to get rid of the hardcoded address
needed for the secure timer init) to the Rockchip tree tomorrow, so it
can be included in t
This adds a device-model driver for the timer block in the RK3368 (and
similar devices that share the same timer block, such as the RK3288) for
the down-counting (i.e. non-secure) timers.
This allows us to configure U-Boot for the RK3368 in such a way that
we can run with the secure timer inaccess
To fully support DM timer in SPL and TPL, we need a few things cleaned
up and normalised:
- inclusion of the uclass and drivers should be an all-or-nothing
decision for each stage and under control of $(SPL_TPL_)TIMER
instead of having the two-level configuration with TIMER and
$(SPL_TPL_)TIM
There is no reasonably robust way (this will be needed so early that
diagnostics will be limited) to specify the base-address of the secure
timer through the DTS for TPL and SPL. In order to allow us a cleaner
way to structure our SPL and TPL stage, we now move to a DM timer
driver.
Signed-off-by
As include/malloc.h already checks for SYS_MALLOC_SIMPLE using the
CONFIG_IS_ENABLED macro, we need to move to having separate entries
as we switch to fully separate configuration for SPL and TPL.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
---
Changes in v4:
To allow finer grained selection of features for TPL, we introduce
TPL_RAM (in analogy to SPL_RAM).
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/ram/Kconfig | 9 +
1 file changed
When using DM timers w/ the timer0 block within the RK3368, we no
longer depend on the ARMv8 generic timer counting. This allows us to
drop the secure timer initialisation from the TPL and SPL stages.
The secure timer will later be set up by ATF, which starts the ARMv8
generic timer. Thus, there
We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the
whitelist (this time it's really happening!) and migrate the setting
(only used on the RK3368-uQ7 so far) into Kconfig.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Changes in v4:
- migrate to Kconfig, so we d
Even though there's now a TPL_DM configuration option, the spl logic
still checks for SPL_DM and thus does not pick up the proper config
option.
This introduces the use of CONFIG_IS_ENABLED(DM) in spl.c to always
pick up the desired configuration option instead of having a
hard-coded check for the
Hi Paul,
El 31/07/2017 a las 19:13, Paul Burton escribió:
> On Monday, 31 July 2017 03:52:57 PDT Daniel Schwierzeck wrote:
>> 2017-07-30 18:04 GMT+02:00 Álvaro Fernández Rojas :
>>> El 30/07/2017 a las 16:05, Daniel Schwierzeck escribió:
Am 30.07.2017 um 14:27 schrieb Álvaro Fernández Rojas:
The timer-uclass depends on full OF_CONTROL through its interrogation
of /chosen and the code to determine the clock-frequency.
For the OF_PLATDATA case, these code-paths are disabled and it becomes
the timer driver's responsibility to correctly set the clock-frequency
in the uclass priv-data.
Si
To use it with the DM timer driver in SPL and TPL, timer0 needs to be
marked as pre-reloc.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Changes in v2:
- add 'clock-frequency' prop to timer in the -u-boot.dtsi
arch/arm/dts/rk3368-lion-u-boot.dtsi | 5 +
arch/arm/dts/rk3368.
For the RK3368, we use a multi-stage boot-process consisting of the
following:
1. TPL: initalises DRAM, returns to boot-ROM (which then loads
the next stage and transfers control to it)
2. SPL: a full-features SPL stage including OF_CONTROL and FIT
image loading, which f
The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0.
This change defines COUNTER_FREQUENCY, which is used by the AArch64 init
code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0.
If the counter-frequency is not correctly set up, the calculation of
delays using the ARMv8 generic t
Handling TPL and SPL in the Makefile for mach-rockchip was based on
nested if checks and/or if-else-if paths. This can be simplified and
made more readable by using $(SPL_TPL_) and by introducing
intermediate variables for the aggregation of SPL and TPL features.
Signed-off-by: Philipp Tomsich
Let's clean up behind ourselves and move the (newly defined)
TPL_STACK, TPL_MAX_SIZE and TPL_TEXT_BASE into Kconfig. Given that
0x0 might be considered to be valid values for TPL_TEXT_BASE and
TPL_STACK, we need to introduce helper config options
("TPL_NEEDS_SEPARATE_...") to indicate that these s
With the clock support in rk3368_clk_set_rate() conditionalized on
various feature definitions, 'priv' can remain unused (e.g. in the
SPL build when only MMC is enabled).
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
d
In TPL we will need to configure security in the SGRF of the RK3368.
This change adds support for the SGRF as a syscon device, so we can
retrieve its address range through the syscon API in TPL (and can
avoid having to hard-code the address).
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glas
The ITS file generated warnings due to @ designations in the naming
which cause DTC to complain as follows:
Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node /images/atf@1 has a unit name, but no reg
property
Warning
Now that we have split up SPL_LDSCRIPT into a SPL and TPL variant and
have started to use the TPL-variant for the RK3368, it's time to clean
up behind ourselves: move both variants into Kconfig and remove them
from the whitelist.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Chan
For the RK3368, we want to use OF_PLATDATA in TPL, but full OF_CONTROL
in SPL: this requires the introduction of a new family of
configuration options to decouple SPL_OF_CONTROL and SPL_OF_PLATDATA
from TPL.
Consequently, Makefile.spl needs to be adjusted to test for these
configuration items thro
The RK3368 GRF header was still defines with a shifted-mask but with
non-shifted function selectors for the IOMUX defines. As the RK3368
support is still fresh enough to allow a quick change, we do this now
before having more code use this.
Signed-off-by: Philipp Tomsich
---
Changes in v4:
- r
This commit adds support for RK3368 SoC in mkimage.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 25b0340..
This splits the compilation of code modules for TPL and SPL for
OF_CONTROL (and related) features between TPL and SPL. The typical
use-case of this is a TPL stage that uses OF_PLATDATA at TPL and
provides full OF_CONTROL at SPL (e.g. on the RK3368).
Signed-off-by: Philipp Tomsich
Reviewed-by: S
The RK3368 needs to have a different base-address and stack-pointer
for its TPL stage. Now that we want to do this via Kconfig, we need
to tick the appropriate 'TPL_NEEDS_...' boxes.
Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
---
Changes in v4:
- use 'select if' for SPL/TPL prese
To implement a TPL stage (incl. its DRAM controller setup) for the
RK3368, we'll want to configure the DPLL (DRAM PLL).
This commit implements setting the DPLL (CLK_DDR) and provides PLL
configuration details for the common DRAM operating speeds found on
RK3368 boards.
Signed-off-by: Philipp Toms
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