Hi,
On Sun, 25 Jun 2017 14:54:56 -0700 Alison Chaiken wrote:
> On Sun, Jun 18, 2017 at 4:03 AM, Wolfgang Denk wrote:
>
> > Dear Alison,
> >
> > In message > gmail.com> you wrote:
> > >
> > > The idea behind the 'swap' mode is that a storage device can have two
> > sets
> > > of partitions, one
On 26/06/2017 16:07, Soeren Moch wrote:
>
>
> On 12.05.2017 21:58, Tim Harvey wrote:
>> There is no dedicated reset signal wired up for the MX6QDL thus if the
>> bootloader enables the link we need some special handling to get the core
>> back into a state where it is safe to touch it for configu
On 22/06/2017 15:50, Fabio Estevam wrote:
> The correct name is 'Celsius', so fix it accordingly.
>
> Signed-off-by: Fabio Estevam
> ---
> arch/arm/cpu/armv7/mx6/soc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/
Hi Tom,
this should be my last PR for the release. I checked which fixes should
go into release and all other patches can wait. I am starting to merge
pending patches into -next.
Most of commits are fixes (mx25, pciimx,..). Exception is pico-imx7d: I
merged since a lot of time, and I convinced I
On Thu, 22 Jun 2017 19:55:21 +0200
daggs wrote:
> Greetings,
>
> I'm using buildroot to generate images for the odroid c2 boards and
> from what I see, it uses u-boot.bin to burn into the image. I'm not
> seeing any other uboot product that is used for booting (unless I'm
> mistaken). I'm readin
This series enables SPL_DM very early so that i2c, gpio can be
used.
Lokesh Vutla (3):
arm: omap: Detect boot mode very early
arm: omap4+: Enable spl_early_init()
ARM: dts: OMAP5+: Enable gpio in SPL
arch/arm/dts/omap5-u-boot.dtsi | 8
arch/arm/mach-omap2/am33xx/board.c | 8
gpio2 is used to detect lcd based on which pin mux is done in SPL.
gpio7 is used to enable vtt regulator. Enable these two gpio nodes
in SPL.
Signed-off-by: Lokesh Vutla
---
arch/arm/dts/omap5-u-boot.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/omap5-u-boot.dtsi
Enable spl_early_init() so that spl can use
DT very early during boot.
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-omap2/hwinit-common.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/hwinit-common.c
b/arch/arm/mach-omap2/hwinit-common.c
index 77368ee85f..7324d522ee 1
ROM stores the boot params information in a known location
and passes it to SPL. This information needs to be copied
very early during boot or else there is a chance of getting
corrupted by SPL. So move this boot device detection very early
during boot.
Signed-off-by: Lokesh Vutla
---
arch/arm/m
Hi Stefan,
On Tue, Jun 27, 2017 at 1:23 PM, Stefan Roese wrote:
> Hi Bin,
>
>
> On 27.06.2017 02:01, Bin Meng wrote:
>>
>> On Tue, Jun 27, 2017 at 2:07 AM, Marek Vasut wrote:
>>>
>>> On 06/24/2017 03:57 AM, Bin Meng wrote:
Hi Marek,
On Sat, Jun 24, 2017 at 2:02 AM, Marek Vasu
On Tue, Jun 27, 2017 at 11:25 AM, Simon Glass wrote:
> On 26 June 2017 at 17:36, Bin Meng wrote:
>> This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.
>>
>> With MMC converted to driver model, SCSI driver is broken due to
>> zero address access at (ops->read) in block_dread() function.
Hi Tom,
The following changes since commit 7df4ff2c2689a6d3c16eb0c3cce098fcac622b0c:
Merge branch 'master' of git://git.denx.de/u-boot-rockchip
(2017-06-23 11:02:21 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git
for you to fetch changes up to da2364cc14a0b3
On 06/27/2017 10:27 AM, Bin Meng wrote:
> Hi Stefan,
>
> On Tue, Jun 27, 2017 at 1:23 PM, Stefan Roese wrote:
>> Hi Bin,
>>
>>
>> On 27.06.2017 02:01, Bin Meng wrote:
>>>
>>> On Tue, Jun 27, 2017 at 2:07 AM, Marek Vasut wrote:
On 06/24/2017 03:57 AM, Bin Meng wrote:
>
> Hi Mare
Hi guys,
do you have any concern about this change?
Thanks,
Michal
On 22.6.2017 12:00, Siva Durga Prasad Paladugu wrote:
> Remove the error which causes compilation failure when
> dcache is off for builds otherthan SPL. There may be
> cases where user wants to disable dcache completely
> eventho
On Thursday 22 June 2017 06:30 PM, Lukasz Majewski wrote:
> On Thu, 22 Jun 2017 17:42:38 +0530
> Vignesh R wrote:
>
>>
>>
>> On Wednesday 21 June 2017 01:39 PM, Lukasz Majewski wrote:
>>> Hi Vignesh,
>>>
Hi,
On Tuesday 20 June 2017 07:14 PM, Lukasz Majewski wrote:
> Hi Marek,
Hi,
On Tue, 27 Jun 2017 09:05:14 +0200 Lothar Waßmann wrote:
> Hi,
>
> On Sun, 25 Jun 2017 14:54:56 -0700 Alison Chaiken wrote:
> > On Sun, Jun 18, 2017 at 4:03 AM, Wolfgang Denk wrote:
> >
> > > Dear Alison,
> > >
> > > In message > > gmail.com> you wrote:
> > > >
> > > > The idea behind the
On Tue, 27 Jun 2017 14:38:38 +0530
Vignesh R wrote:
>
>
> On Thursday 22 June 2017 06:30 PM, Lukasz Majewski wrote:
> > On Thu, 22 Jun 2017 17:42:38 +0530
> > Vignesh R wrote:
> >
> >>
> >>
> >> On Wednesday 21 June 2017 01:39 PM, Lukasz Majewski wrote:
> >>> Hi Vignesh,
> >>>
> Hi,
> >>
On 06/27/2017 07:23 AM, Stefan Roese wrote:
> Hi Bin,
>
> On 27.06.2017 02:01, Bin Meng wrote:
>> On Tue, Jun 27, 2017 at 2:07 AM, Marek Vasut wrote:
>>> On 06/24/2017 03:57 AM, Bin Meng wrote:
Hi Marek,
On Sat, Jun 24, 2017 at 2:02 AM, Marek Vasut wrote:
> On 06/23/2017 11:54
On 06/26/2017 09:40 PM, Joe Hershberger wrote:
> Don't wait forever.
> Pass errors back to the caller.
>
> Signed-off-by: Joe Hershberger
Acked-by: Marek Vasut
> ---
>
> Changes in v2:
> - Isolate error propagation changes
>
> drivers/net/ag7xxx.c | 29 -
> 1 fil
On 06/26/2017 09:40 PM, Joe Hershberger wrote:
> In the case of the WAN port, pay attention to the link status.
> In the case of LAN ports, stop reading the link status since we don't
> care.
>
> Signed-off-by: Joe Hershberger
Well, let's see how that works, ev. I'll have to bisect.
btw I hope a
On 06/26/2017 09:40 PM, Joe Hershberger wrote:
> The register constants don't use the exact names that are used in the
> TRM, so add comments that use the exact names so that it is clear what
> register is being referred to.
>
> https://www.atheros-drivers.com/qualcomm-atheros-datasheets-for-AR933
I don't think that's going to work - at least not without compiler flag
changes. By default, gcc will happily generate unaligned accesses. If
you disable dcache, these will trap.
Alex
On 27.06.17 11:04, Michal Simek wrote:
Hi guys,
do you have any concern about this change?
Thanks,
Michal
Hi,
On 27.6.2017 13:01, Alexander Graf wrote:
> I don't think that's going to work - at least not without compiler flag
> changes. By default, gcc will happily generate unaligned accesses. If
> you disable dcache, these will trap.
What's that compiler flags we should be using to avoid that?
The
On 27.06.17 13:20, Michal Simek wrote:
Hi,
On 27.6.2017 13:01, Alexander Graf wrote:
I don't think that's going to work - at least not without compiler flag
changes. By default, gcc will happily generate unaligned accesses. If
you disable dcache, these will trap.
What's that compiler flags
On 27.6.2017 13:46, Alexander Graf wrote:
>
>
> On 27.06.17 13:20, Michal Simek wrote:
>> Hi,
>>
>> On 27.6.2017 13:01, Alexander Graf wrote:
>>> I don't think that's going to work - at least not without compiler flag
>>> changes. By default, gcc will happily generate unaligned accesses. If
>>> y
Greetings Lukasz
> Sent: Tuesday, June 27, 2017 at 10:57 AM
> From: "Lukasz Majewski"
> To: daggs
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot] question regarding the odroidc2 board support
>
> On Thu, 22 Jun 2017 19:55:21 +0200
> daggs wrote:
>
> > Greetings,
> >
> > I'm using buildroo
> Am 27.06.2017 um 13:52 schrieb Michal Simek :
>
>> On 27.6.2017 13:46, Alexander Graf wrote:
>>
>>
>>> On 27.06.17 13:20, Michal Simek wrote:
>>> Hi,
>>>
On 27.6.2017 13:01, Alexander Graf wrote:
I don't think that's going to work - at least not without compiler flag
changes.
On Tue, 27 Jun 2017 13:58:46 +0200
daggs wrote:
> Greetings Lukasz
>
> > Sent: Tuesday, June 27, 2017 at 10:57 AM
> > From: "Lukasz Majewski"
> > To: daggs
> > Cc: u-boot@lists.denx.de
> > Subject: Re: [U-Boot] question regarding the odroidc2 board support
> >
> > On Thu, 22 Jun 2017 19:55:21
When CONFIG_DM_ETH is set, the FEC ethernet controller is reset after
the PHY has been set up and initialzed. This breaks the communication
with the PHY and results in an inoperable ethernet interface.
Do the initialization with CONFIG_DM_ETH in the same order as with
legacy ETH support to fix thi
doc/README.fsl-clk was removed in commit
5b8e76c35ec31 ("powerpc, 8xx: remove support for 8xx")
allthought CONFIG_SYS_FSL_CLK is defined in
arch/arm/cpu/armv8/fsl-layerscape/Kconfig and still in use
in the following configs:
./include/configs/mx53loco.h:21:#define CONFIG_SYS_FSL_CLK
./include/conf
On 06/07/2017 11:33 PM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This converts the following to Kconfig:
>CONFIG_FPGA
>CONFIG_FPGA_ALTERA
>
> Signed-off-by: Tien Fong Chee
> ---
> configs/astro_mcf5373l_defconfig| 1 +
> configs/theadorable_debug_defconfig | 1 +
Hello Christophe,
Am 27.06.2017 um 16:00 schrieb Christophe Leroy:
doc/README.fsl-clk was removed in commit
5b8e76c35ec31 ("powerpc, 8xx: remove support for 8xx")
allthought CONFIG_SYS_FSL_CLK is defined in
arch/arm/cpu/armv8/fsl-layerscape/Kconfig and still in use
in the following configs:
./i
driver is not used anymore, so remove it.
Signed-off-by: Heiko Schocher
---
drivers/block/Makefile | 1 -
drivers/block/sil680.c | 89
scripts/config_whitelist.txt | 1 -
3 files changed, 91 deletions(-)
delete mode 100644 drivers/bloc
I found the directory 'board/samsung/smdk2410' was removed after 2017.01
version, does it mean u-boot no longer support smdk2410?
___
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U-Boot@lists.denx.de
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Hi,
We are doing some quick prototyping and noticing some issues.
Look at the latest changeset (
http://git.denx.de/?p=u-boot.git;a=commit;h=026f30ec3e846edb85b5df8265d8cad098184be6
) that changed arch/arm/cpu/armv8/cpu-dt.c
We can find the diff here:
http://git.denx.de/?p=u-boot.git;a=blobdif
There was for long time no activity in the 4xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 4xx,
so remove it.
While at it, found drivers/block/sil680.c is not used anymore,
so remove it here too.
Patch compiles clean on travis
Heiko Sch
On 06/07/2017 11:33 PM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This is the 10th version of patchset to adds support for Intel Arria 10 SoC
> FPGA
> driver. This version mainly resolved comments from Marek in [v9].
> This series is working on top of u-boot-socfpga.git -
> h
On 27.6.2017 16:49, Heiko Schocher wrote:
> There was for long time no activity in the 4xx area.
> We need to go further and convert to Kconfig, but it
> turned out, nobody is interested anymore in 4xx,
> so remove it.
Acked-by: Michal Simek
for Xilinx part
Note: Ricardo wanted to have xilinx pp
I'm trying to port u-boot from the freescale mx6ul_14x14_evk to a custom
board. Right now I'm just trying to setup the same build under the new
target name. I've followed a porting guide document and created a new board
directory, header file, and config file, but I'm getting the following
error wh
Hi Heiko,
On 27.06.2017 16:49, Heiko Schocher wrote:
There was for long time no activity in the 4xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 4xx,
so remove it.
While at it, found drivers/block/sil680.c is not used anymore,
so remove
On Tue, Jun 27, 2017 at 4:32 AM, Marek Vasut wrote:
> On 06/26/2017 09:40 PM, Joe Hershberger wrote:
>> In the case of the WAN port, pay attention to the link status.
>> In the case of LAN ports, stop reading the link status since we don't
>> care.
>>
>> Signed-off-by: Joe Hershberger
>
> Well, l
On 06/27/2017 05:46 PM, Joe Hershberger wrote:
> On Tue, Jun 27, 2017 at 4:32 AM, Marek Vasut wrote:
>> On 06/26/2017 09:40 PM, Joe Hershberger wrote:
>>> In the case of the WAN port, pay attention to the link status.
>>> In the case of LAN ports, stop reading the link status since we don't
>>> ca
Hello Gautam,
On Wed, Jun 21, 2017 at 1:18 PM, Gautam Bhat wrote:
> This change sets the VLDO4 settings output to 2.8V in PMIC
> initialization so that the MIPI DSI and MIPI CSI input voltage
> is 2.8V as per the schematics.
>
> Signed-off-by: Gautam Bhat
Thanks for the patch; Fabio, could you
Hi Gautam,
On Wed, Jun 21, 2017 at 1:18 PM, Gautam Bhat wrote:
> This change sets the VLDO4 settings output to 2.8V in PMIC
> initialization so that the MIPI DSI and MIPI CSI input voltage
> is 2.8V as per the schematics.
As we do not have MIPI DSI / MIPI CSI support in U-Boot, it is
preferable
On Sun, Jun 25, 2017 at 07:15:57AM +0900, Masahiro Yamada wrote:
> Hi Tom,
>
> Please pull some more UniPhier SoC updates:
>
> - fix sparse warnings
> - sync DT with Linux
> - add new board support (LD11/LD20 global)
>
>
> The following changes since commit 431c66a3bad13e13c1d44ef4ec3638f95e72
On Mon, Jun 26, 2017 at 10:34:49AM +0200, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-i2c.git master
>
> The following changes since commit 7df4ff2c2689a6d3c16eb0c3cce098fcac622b0c:
>
> Merge branch 'master' of git://git.denx.de/u-boot-rockchip (2017-06-23
> 11:02:21 -0400
On Tue, Jun 27, 2017 at 04:34:52PM +0800, Bin Meng wrote:
> Hi Tom,
>
> The following changes since commit 7df4ff2c2689a6d3c16eb0c3cce098fcac622b0c:
>
> Merge branch 'master' of git://git.denx.de/u-boot-rockchip
> (2017-06-23 11:02:21 -0400)
>
> are available in the git repository at:
>
>
On Tue, Jun 27, 2017 at 09:53:35AM +0200, Stefano Babic wrote:
> Hi Tom,
>
> this should be my last PR for the release. I checked which fixes should
> go into release and all other patches can wait. I am starting to merge
> pending patches into -next.
>
> Most of commits are fixes (mx25, pciimx,
Thanks a bunch Simon (and everyone else who contributed)!
I followed the instructions and was able to get uboot to boot successfully.
:D
Now I just got to figure out how to get the kernel to boot in HYP mode.
Cheers,
Thomas
On Fri, Jun 9, 2017 at 5:27 AM, Simon Glass wrote:
> Hi Stephen,
Hi Marek,
On Tue, Jun 27, 2017 at 5:31 PM, Marek Vasut wrote:
> On 06/27/2017 07:23 AM, Stefan Roese wrote:
>> Hi Bin,
>>
>> On 27.06.2017 02:01, Bin Meng wrote:
>>> On Tue, Jun 27, 2017 at 2:07 AM, Marek Vasut wrote:
On 06/24/2017 03:57 AM, Bin Meng wrote:
> Hi Marek,
>
> On Sa
On Tue, Jun 27, 2017 at 8:23 AM, Lothar Waßmann
wrote:
> When CONFIG_DM_ETH is set, the FEC ethernet controller is reset after
> the PHY has been set up and initialzed. This breaks the communication
> with the PHY and results in an inoperable ethernet interface.
>
> Do the initialization with CON
On Tue, Jun 27, 2017 at 10:54 PM, Fabio Estevam wrote:
> Hi Gautam,
>
> On Wed, Jun 21, 2017 at 1:18 PM, Gautam Bhat
> wrote:
> > This change sets the VLDO4 settings output to 2.8V in PMIC
> > initialization so that the MIPI DSI and MIPI CSI input voltage
> > is 2.8V as per the schematics.
>
> A
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