Hi Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: Tuesday, July 26, 2016 11:16 AM
> To: Siva Durga Prasad Paladugu
> Cc: u-boot@lists.denx.de; Michal Simek ; Siva Durga
> Prasad Paladugu ; Michal Simek
> Subject: Re: [PATCH] spi: xilinx_spi: Add
On 27 July 2016 at 12:54, Siva Durga Prasad Paladugu
wrote:
> Hi Jagan,
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: Tuesday, July 26, 2016 11:16 AM
>> To: Siva Durga Prasad Paladugu
>> Cc: u-boot@lists.denx.de; Michal Simek ; Siva Durga
>> Prasad
On 19 July 2016 at 14:40, Siva Durga Prasad Paladugu
wrote:
> Dont set quad enable for micron devices in all cases
> Setting the quad enable bit in micron expects all other
> commands like register reads on quad lines which may
> not be supported by some controllers. Hence, dont
> set the quad ena
On 19 July 2016 at 14:40, Siva Durga Prasad Paladugu
wrote:
> This adds QSPI driver support for ZynqMP platform
> This driver supports all spi flash commands in
> qspi single mode.
>
> Signed-off-by: Siva Durga Prasad Paladugu
> ---
> Changes for v3:
> - None
> Changes for v2:
> - set no_all_quad
On 19 July 2016 at 21:18, Siva Durga Prasad Paladugu
wrote:
> This series enables the Quad and dual modes support
> for zynq. It also contains fixes for issues found
> during testing of dual parallel and stacked modes.
>
> Siva Durga Prasad Paladugu (9):
> spi: zynq_qspi: Add quad support for zy
On Wed, 2016-07-27 at 00:28 +0200, Hans de Goede wrote:
> There is a new Orange Pi PC *Plus* version available now,
> this is an extended version of the regular Orange Pi PC
> with sdio wifi and an eMMC.
>
> The upstream kernel devs have decided that they want a separate
> dts for the PC Plus rath
On Wed, 2016-07-27 at 00:28 +0200, Hans de Goede wrote:
> Disable the sun8i emac driver for now, there are 2 issues with it:
>
> 1) It is causing issues with network connectivity under the kernel
> driver,
> when booting the kernel with v2 of Corentin's sun8i-h3 emac driver, I
> get
> the connecti
Hi Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: Wednesday, July 27, 2016 1:47 PM
> To: Siva Durga Prasad Paladugu
> Cc: u-boot@lists.denx.de; Michal Simek ; Siva Durga
> Prasad Paladugu
> Subject: Re: [PATCH v2 0/9] qspi: Add Quad and Dual mode
Hi Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: Wednesday, July 27, 2016 1:24 PM
> To: Siva Durga Prasad Paladugu
> Cc: u-boot@lists.denx.de; Michal Simek ; Siva Durga
> Prasad Paladugu
> Subject: Re: [PATCH v3 1/3] spi: spi_flash: Dont set qua
On 27 July 2016 at 14:28, Siva Durga Prasad Paladugu
wrote:
> Hi Jagan,
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: Wednesday, July 27, 2016 1:47 PM
>> To: Siva Durga Prasad Paladugu
>> Cc: u-boot@lists.denx.de; Michal Simek ; Siva Durga
>> Prasa
On 27 July 2016 at 14:31, Siva Durga Prasad Paladugu
wrote:
> Hi Jagan,
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: Wednesday, July 27, 2016 1:24 PM
>> To: Siva Durga Prasad Paladugu
>> Cc: u-boot@lists.denx.de; Michal Simek ; Siva Durga
>> Prasa
Hi York,
> -Original Message-
> From: york sun
> Sent: Tuesday, July 26, 2016 12:26 PM
> To: Qianyu Gong ; u-boot@lists.denx.de; Prabhakar
> Kushwaha ; Mingkai Hu
> Cc: Shaohui Xie ; Zhiqiang Hou ;
> Wenbin Song
> Subject: Re: [PATCH 2/2] config.h: clean unused CONFIG_ENV_SPI_* if using
> -Original Message-
> From: york sun
> Sent: Tuesday, July 26, 2016 1:38 AM
> To: Yangbo Lu; u-boot@lists.denx.de
> Subject: Re: [PATCH 4/4] mmc: add workaround for eSDHC erratum A009620
>
> On 05/20/2016 03:20 AM, Yangbo Lu wrote:
> > Erratum Title:
> > Data timeout error not getting set
Hi Tom,
Could you help to assign this mmc patch reviewing to right person?
It seems no one had reviewed it for almost half year.
And another my mmc patch also needs to be reviewed.
I submitted in May. Please help.
http://patchwork.ozlabs.org/patch/624448/
Thank you very much.
Best regards,
Ya
On 07/27/2016 04:28 PM, Yangbo Lu wrote:
> Hi Tom,
>
> Could you help to assign this mmc patch reviewing to right person?
> It seems no one had reviewed it for almost half year.
>
> And another my mmc patch also needs to be reviewed.
> I submitted in May. Please help.
> http://patchwork.ozlabs.or
On 07/27/2016 04:10 PM, Yangbo Lu wrote:
>> -Original Message-
>> From: york sun
>> Sent: Tuesday, July 26, 2016 1:38 AM
>> To: Yangbo Lu; u-boot@lists.denx.de
>> Subject: Re: [PATCH 4/4] mmc: add workaround for eSDHC erratum A009620
>>
>> On 05/20/2016 03:20 AM, Yangbo Lu wrote:
>>> Erratu
Hi,
On 07/27/2016 10:10 AM, Minkyu Kang wrote:
> Hi,
>
> On 26/07/16 19:06, Jaehoon Chung wrote:
>> buswidth isn't used anywhere in sdhci_setup_cfg.
>>
>> Signed-off-by: Jaehoon Chung
>> ---
>> drivers/mmc/msm_sdhci.c | 4 ++--
>> drivers/mmc/sdhci.c | 4 ++--
>> drivers/mmc/zynq_sdhci.c
MIPSfpga is an FPGA based dev platform.
In a nutshell, its a microAptiv cpu core with lots of Xilinx IP blocks
The FPGA dev board used is the Nexys4DDR board by Digilent.
For more information, check the Readme file in board/imgtec/xilfpga
Signed-off-by: Zubair Lutfullah Kakakhel
Reviewed-by: P
Mostly the same as the Kernel upstream device tree file except for
- alias for the serial console node
- ethernet node as the ethernet stuff isn't upstream on kernel.org yet
- uart clock-frequency passed directly in the node
Signed-off-by: Zubair Lutfullah Kakakhel
Reviewed-by: Paul Burton
---
Hi,
This patch series changes the emaclite driver to be slightly more generic
and then enables it for the MIPS arch.
Regards,
ZubairLK
Zubair Lutfullah Kakakhel (3):
net: emaclite: Use ioremap_nocache
net: emaclite: use __raw_readl/writel instead of weird define
net: emaclite: Enable drive
MIPSfpga is an FPGA based dev platform by Imagination Technologies Ltd.
DDR is already initialized before u-boot.
And the peripherals supported in the u-boot port are an n16550 uart and
a xilinx ethernet IP (axi_emaclite) which already have drivers in u-boot.
Hence the port is mostly DT + config
Virtual to physical mapping isn't necessarily 1:1 for all architectures
Using ioremap_nocache allows for the arch code to translate the
physical address to a virtual address.
Signed-off-by: Zubair Lutfullah Kakakhel
Reviewed-by: Paul Burton
---
drivers/net/xilinx_emaclite.c | 4 +++-
1 file ch
Signed-off-by: Zubair Lutfullah Kakakhel
Reviewed-by: Paul Burton
---
drivers/net/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 88d8e83..4efb5d6 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -170,7 +170
out_be32 and in_be32 are actually #defined to little endian
writel/readl in arch/microblaze.
Just use __raw_writel/readl instead. That is also what is used
in the Linux kernel driver for this IP block
Tested on MIPSfpga. Can tftp a kernel.
Signed-off-by: Zubair Lutfullah Kakakhel
Reviewed-by: P
On 07/26/2016 10:41 PM, Aron L. Phillips wrote:
> To whom it may concern:
>
> I am not sure how this email list works but I am interested in knowing what
> exactly does the mmc erase command do? I know it erases the mmc, but in what
> manner? Does it clear bad sector marks or for that matter, pl
Am 27.07.2016 um 00:24 schrieb Paul Burton:
> This patch introduces support for building U-Boot to run on the MIPS
> Boston development board. This is a board built around an FPGA & an
> Intel EG20T Platform Controller Hub, used largely as part of the
> development of new CPUs and their software
Using PSCI to reset the system.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index f15dc5d71522..0c5d9979316f 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/boar
Am 27.07.2016 um 13:25 schrieb Zubair Lutfullah Kakakhel:
> Virtual to physical mapping isn't necessarily 1:1 for all architectures
>
> Using ioremap_nocache allows for the arch code to translate the
> physical address to a virtual address.
>
> Signed-off-by: Zubair Lutfullah Kakakhel
> Review
On Wed, Jul 27, 2016 at 03:42:40PM +0900, Masahiro Yamada wrote:
[snip]
> The tool will show as follows:
>
> uniphier_ld4_sld8_defconfig
> CONFIG_I2C_EEPROM is not defined in Kconfig. Do nothing.
>
>
> This is the message.
>
>
>
> - CONFIG_... is not defined in Kconfig. Do nothing.
>
Am 27.07.2016 um 12:51 schrieb Zubair Lutfullah Kakakhel:
> Mostly the same as the Kernel upstream device tree file except for
>
> - alias for the serial console node
> - ethernet node as the ethernet stuff isn't upstream on kernel.org yet
> - uart clock-frequency passed directly in the node
>
On Tue, 26 Jul 2016, Heiko Schocher wrote:
... snip ...
> > it appears that, no matter what, the environment *is* updated
> > every single time because of this line in the bootdelay_process()
> > routine:
> >
> >setenv_ulong("bootcount", bootcount);
> >
> > why? it seems, from the above, that
On Wednesday 27 July 2016 12:05 PM, Jagan Teki wrote:
> On 25 July 2016 at 15:45, Vignesh R wrote:
>> According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, update
>> the driver to use the same.
>>
>> Signed-off-by: Vignesh R
>> ---
>> drivers/spi/ti_qspi.c | 17 -
>>
it would seem that this wiki page:
http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
could use a fair bit of updating, since it concludes with:
"At the moment, the Boot Count Limit feature is available only for
MPC8xx, MPC82xx and MPC5200 Power Architecture® processors."
which i susp
Am 27.07.2016 um 12:51 schrieb Zubair Lutfullah Kakakhel:
> MIPSfpga is an FPGA based dev platform.
>
> In a nutshell, its a microAptiv cpu core with lots of Xilinx IP blocks
>
> The FPGA dev board used is the Nexys4DDR board by Digilent.
>
> For more information, check the Readme file in boar
Greetings Jaehoon,
No. When I enter into u-boot (when I press the space bar booting the
Beaglebone Black) I will see this =>
From this command prompt, I type mmc dev 1 and it switches to the onboard
eMMC chip. If I type mmc erase 0 0x50, it erases 5,242,880 block
sectors. I would like to
On 27/07/16 12:37, Daniel Schwierzeck wrote:
+#define EXT(field) ((mmcmdiv & field) >> (ffs(field) - 1))
+
+ in_rate = EXT(BOSTON_PLAT_MMCMDIV_INPUT);
+ mul = EXT(BOSTON_PLAT_MMCMDIV_MUL);
+ clk0_div = EXT(BOSTON_PLAT_MMCMDIV_CLK0DIV);
+
+#undef EXT
+
+ clk0_rate = (in_rat
On Tuesday 26 July 2016 05:43 PM, Tom Rini wrote:
> On Tue, Jul 26, 2016 at 12:07:26PM +0530, R, Vignesh wrote:
>>
>>
>> On 7/25/2016 7:08 PM, Tom Rini wrote:
>>> On Mon, Jul 25, 2016 at 06:40:22PM +0530, Vignesh R wrote:
>>>
On DRA72 EVM, cpsw slaves may be muxed with other modules. This
>>
Hi Michael,
On 08.06.2016 10:18, Michael Trimarchi wrote:
This patch try to parse name=userdata,size=-,uuid=${uuid_gpt_userdata};
gpt mmc write 0 $partitions
gpt mmc verify 0 $partitions
Signed-off-by: Michael Trimarchi
---
cmd/gpt.c | 13 +++--
1 file changed, 11 insertions(+), 2 de
Hi
On Wed, Jul 27, 2016 at 2:57 PM, Julian Scheel wrote:
> Hi Michael,
>
>
> On 08.06.2016 10:18, Michael Trimarchi wrote:
>>
>> This patch try to parse name=userdata,size=-,uuid=${uuid_gpt_userdata};
>>
>> gpt mmc write 0 $partitions
>> gpt mmc verify 0 $partitions
>>
>> Signed-off-by: Michael T
Hi Michael, all,
On 26.07.2016 11:41, Kever Yang wrote:
Hi Michael,
On 07/26/2016 05:08 PM, Michael Trimarchi wrote:
Hi
On Tue, Jul 26, 2016 at 10:59 AM, Kever Yang
wrote:
Hi Michael,
On 07/26/2016 04:37 PM, Michael Trimarchi wrote:
Hi
On Tue, Jul 26, 2016 at 9:56 AM, Kever Yang
wrote:
Define config USB_STORAGE through defconfig for all
Xilinx ZynqMP boards.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 +
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 +
configs/xilinx_zynqmp_zcu102_defconfig | 1 +
configs/xilinx_zynqmp
Update Microblaze, Zynq and ZynqMP defconfigs to reflect
latest Kconfig changes.
Signed-off-by: Michal Simek
---
configs/microblaze-generic_defconfig | 4 ++--
configs/xilinx_zynqmp_ep_defconfig | 8
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 8 ---
Hi,
As pointed out in emails on the threads
[U-Boot] [RFC PATCH] cmd: gpt: add - partition size parsing
[U-Boot] [PATCH] cmd: gpt: fix the wrong size parse for the last partition
it makes no sense to replicate the available size computation from part_efi.c
into gpt.c. Furthermore the replication
If a partition was specified to fill the available space using size "-" a
verification is not possible as there is no sane reference value to compare
against. In this case simply skip the check to avoid printing a meaningless
error.
Signed-off-by: Julian Scheel
---
disk/part_efi.c | 3 ++-
1 fil
Partition size is automatically calculated by part_efi when omitted. Besides
this the patch introduced regressions because of faulty maximum size and
offset computations.
This reverts commit 666362356e1ccc0df91c03b1d3f97939968b9c04.
Signed-off-by: Julian Scheel
---
cmd/gpt.c | 13 ++---
Hi,
On 27-07-16 04:38, Chen-Yu Tsai wrote:
Hi Hans
On Wed, Jul 27, 2016 at 6:30 AM, Hans de Goede wrote:
Hi Tom,
Here is the second sunxi pull-req for v2016.09,
this adds some fixes to the h3 ethernet driver
and disables it for now as it has too much issues.
It also adds 1 new board.
The f
On 27 July 2016 at 04:06, Tom Rini wrote:
> On Mon, Jul 25, 2016 at 09:42:27AM +0200, Maxime Ripard wrote:
>> On Fri, Jul 15, 2016 at 10:45:34AM +0200, Hans de Goede wrote:
>> > Hi,
>> >
>> > On 04-07-16 14:57, Hans de Goede wrote:
>> > >Hi All,
>> > >
>> > >Between my $dayjob, linux-sunxi, other
On 2016年07月27日 19:15, Jaehoon Chung wrote:
On 07/27/2016 04:28 PM, Yangbo Lu wrote:
Hi Tom,
Could you help to assign this mmc patch reviewing to right person?
It seems no one had reviewed it for almost half year.
And another my mmc patch also needs to be reviewed.
I submitted in May. Please
On Wed, Jul 27, 2016 at 06:58:24PM +0530, Jagan Teki wrote:
> On 27 July 2016 at 04:06, Tom Rini wrote:
> > On Mon, Jul 25, 2016 at 09:42:27AM +0200, Maxime Ripard wrote:
> >> On Fri, Jul 15, 2016 at 10:45:34AM +0200, Hans de Goede wrote:
> >> > Hi,
> >> >
> >> > On 04-07-16 14:57, Hans de Goede w
Hi Tom
Missed this thread to reply.
>> index ef12f9f..ed3e295 100644
>> --- a/Kconfig
>> +++ b/Kconfig
>> @@ -336,6 +336,33 @@ config SPL_FIT_IMAGE_POST_PROCESS
>>injected into the FIT creation (i.e. the blobs would have been pre-
>>processed before being added to the FIT image).
'usb start' is much faster now, so always enable usb keyboard
Signed-off-by: Soeren Moch
---
Cc: Stefano Babic
Cc: u-boot@lists.denx.de
---
include/configs/tbs2910.h | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/include/configs/tbs2910.h b/include/configs/tbs
On 27/07/16 00:43, Simon Glass wrote:
Hi Paul,
On 26 July 2016 at 16:24, Paul Burton wrote:
This patch adds a driver for the Xilinx AXI bridge for PCI express, an
IP block which can be used on some generations of Xilinx FPGAs. This is
mostly a case of implementing PCIe ECAM specification, but
HDMI output must be enabled very early to also enable the pre-console buffer
Signed-off-by: Soeren Moch
---
Cc: Stefano Babic
Cc: u-boot@lists.denx.de
---
include/configs/tbs2910.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/tbs2910.h b/include/configs
This series introduces initial support for the MIPS Boston, and FPGA
based development board & successor to the older Malta board. Further
peripheral work is needed but this introduces the basics.
This can be tested in a currently out-of-tree QEMU port if desired,
which can be found in the boston
Previously ns16550 compatible UARTs probed via device tree have needed
their device tree nodes to contain a clock-frequency property. An
alternative to this commonly used with Linux is to reference a clock via
a phandle. This patch allows U-Boot to support that, retrieving the
clock frequency by pr
This patch adds a driver for the Xilinx AXI bridge for PCI express, an
IP block which can be used on some generations of Xilinx FPGAs. This is
mostly a case of implementing PCIe ECAM specification, but with some
quirks about what devices are valid to access.
Signed-off-by: Paul Burton
Reviewed-by
Import a copy of the dt-bindings/interrupt-controller/mips-gic.h header
from Linux, such that we can use device trees which include it without
modification.
Signed-off-by: Paul Burton
---
Changes in v2: None
include/dt-bindings/interrupt-controller/mips-gic.h | 9 +
1 file changed, 9 i
The pch_gbe driver previously casted pointers to & from unsigned 32 bit
integers in many locations. This breaks the driver on 64 bit systems,
producing streams of compiler warnings about mismatched pointer &
integer sizes and then failing to keep track of addresses correctly at
runtime.
Fix the dr
Reading the PCI BAR & converting the result to a physical address is not
safe across all architectures. For example on MIPS the virtual:physical
mapping is not 1:1, so we cannot directly make use of the physical
address.
Use the more generic BAR-mapping function dm_pci_map_bar to discover the
MMIO
In pci_uclass_pre_probe an attempt is made to detect whether the parent
of a device is a PCI device and that the device is thus a bridge. This
was being done by checking whether the parent of the device is of the
UCLASS_ROOT class. This causes problems if the PCI controller is a child
of some other
The regmap_read & regmap_write functions were previously declared in
regmap.h but not implemented anywhere. The regmap implementation &
commit message of 6f98b7504f70 ("dm: Add support for register maps
(regmap)") indicate that only memory mapped accesses are supported for
now, so providing simple
Provide a trivial syscon driver matching the generic "syscon" compatible
string, allowing for simple system controllers to be used without a
custom driver just as in Linux.
Signed-off-by: Paul Burton
---
Changes in v2:
- New patch
drivers/core/syscon-uclass.c | 11 +++
1 file changed,
Add a simple driver for the clocks provided by the MIPS Boston
development board. The system provides information about 2 clocks whose
rates are fixed by the bitfile flashed in the boards FPGA, and this
driver simply reads the rates of these 2 clocks.
Signed-off-by: Paul Burton
---
Changes in v
This patch introduces support for building U-Boot to run on the MIPS
Boston development board. This is a board built around an FPGA & an
Intel EG20T Platform Controller Hub, used largely as part of the
development of new CPUs and their software support. It is essentially
the successor to the older
On 07/19/2016 01:36 AM, Prabhakar Kushwaha wrote:
> LS1012AFRDM has 512MB of DDR.
> So update Kernel load address as 0x9600 instead of default
> 0xa000.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
> include/configs/ls1012afrdm.h | 16
> 1 file changed, 16 insertions(+)
>
On 07/27/2016 12:10 AM, Yangbo Lu wrote:
>> -Original Message-
>> From: york sun
>> Sent: Tuesday, July 26, 2016 1:38 AM
>> To: Yangbo Lu; u-boot@lists.denx.de
>> Subject: Re: [PATCH 4/4] mmc: add workaround for eSDHC erratum A009620
>>
>> On 05/20/2016 03:20 AM, Yangbo Lu wrote:
>>> Erratu
On Wed, Jul 27, 2016 at 02:04:24PM +, B, Ravi wrote:
> Hi Tom
>
> Missed this thread to reply.
>
> >> index ef12f9f..ed3e295 100644
> >> --- a/Kconfig
> >> +++ b/Kconfig
> >> @@ -336,6 +336,33 @@ config SPL_FIT_IMAGE_POST_PROCESS
> >> injected into the FIT creation (i.e. the blobs would
On 27 July 2016 at 19:28, Tom Rini wrote:
> On Wed, Jul 27, 2016 at 06:58:24PM +0530, Jagan Teki wrote:
>> On 27 July 2016 at 04:06, Tom Rini wrote:
>> > On Mon, Jul 25, 2016 at 09:42:27AM +0200, Maxime Ripard wrote:
>> >> On Fri, Jul 15, 2016 at 10:45:34AM +0200, Hans de Goede wrote:
>> >> > Hi,
On 2 of my H3 boards bytes 13-15 of the SID are all 0 leading to
the NIC specific bytes of the mac all being 0, which leads to the
boards not getting an ipv6 address from the dhcp server.
This commits adds a check to ensure this does not happen.
Cc: Chen-Yu Tsai
Cc: Corentin LABBE
Cc: Amit Sing
This fixes the following CACHE warnings when using sun8i_emac:
=> dhcp
BOOTP broadcast 1
BOOTP broadcast 2
CACHE: Misaligned operation at range [7bf594a8, 7bf59628]
BOOTP broadcast 3
CACHE: Misaligned operation at range [7bf59c90, 7bf59e10]
CACHE: Misaligned operation at range [7bf5a478, 7bf5a5f8]
With the recent bug fixes for the sun8i_emac driver all known issues
are resolved, so we can re-enable the driver.
While at it, also enable the emac on the Orange Pi One.
Cc: Chen-Yu Tsai
Cc: Corentin LABBE
Cc: Amit Singh Tomar
Signed-off-by: Hans de Goede
---
arch/arm/dts/sun8i-h3-orangepi-
It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the SID
are always 0 on H3 making it a poor candidate to use as source for the
serialnr / mac-address, switch to word1 which seems to be more random.
Cc: Chen-Yu Tsai
Cc: Corentin LABBE
Cc: Amit Singh Tomar
Signed-off-by: Hans de G
On 02/23/2016 01:32 AM, Aneesh Bansal wrote:
> sec_init() which was earlier called in misc_init_r()
> is now done in board_init() before PPA init as SEC
> block will be used during PPA image validation.
>
> Signed-off-by: Aneesh Bansal
> ---
> The patchset is dependent on
> http://patchwork.ozlabs
On 07/27/2016 03:00 AM, Qianyu Gong wrote:
>
> Hi York,
>
>> -Original Message-
>> From: york sun
>> Sent: Tuesday, July 26, 2016 12:26 PM
>> To: Qianyu Gong ; u-boot@lists.denx.de; Prabhakar
>> Kushwaha ; Mingkai Hu
>> Cc: Shaohui Xie ; Zhiqiang Hou ;
>> Wenbin Song
>> Subject: Re: [PATC
Hello,
I'm about to use U-Boot for an embedded project. I need a fallback
strategy if the network boot (no matter what exactly) fails e.g. no server
reached after a timeout period. In this case it should boot an linux image
from flash memory.
The U-Boot docs say nothing about that...
_
Hello Robert,
Am 27.07.2016 um 14:03 schrieb Robert P. J. Day:
On Tue, 26 Jul 2016, Heiko Schocher wrote:
... snip ...
it appears that, no matter what, the environment *is* updated
every single time because of this line in the bootdelay_process()
routine:
setenv_ulong("bootcount", bootco
Hello,
I'm about to use U-Boot for an embedded project. I need a fallback
strategy if the network boot (no matter what exactly) fails e.g. no server
reached after a timeout period. In this case it should boot an linux image
from flash memory.
The U-Boot docs say nothing about that...
___
Hello,
I'm about to use U-Boot for an embedded project. I need a fallback
strategy if the network boot (no matter what exactly) fails e.g. no server
reached after a timeout period. In this case it should boot an linux image
from flash memory.
The U-Boot docs say nothing about that...
___
Hello,
> index 7c088c3..877859c 100644
> --- a/drivers/net/sun8i_emac.c
> +++ b/drivers/net/sun8i_emac.c
> @@ -32,7 +32,8 @@
>
> #define CONFIG_TX_DESCR_NUM32
> #define CONFIG_RX_DESCR_NUM32
> -#define CONFIG_ETH_BUFSIZE 2024
> +#define CONFIG_ETH_BUFSIZE 2048
> +#define CONFIG_E
This commit allows injecting a board/platform/device-specific post-
processing function into the FIT image data loading process, which can
include modifying the size and altering the starting source address of
an image data artifact. This might be desired to do things like strip
headers or footers
On 07/03/2016 09:37 PM, Rajesh Bhagat wrote:
>
>
> Will take care in v3.
>
Did you send v3 patch set?
York
___
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U-Boot@lists.denx.de
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On Tue, 26 Jul 2016 08:52:52 +0200
Anatolij Gustschin ag...@denx.de wrote:
> From: Alexey Brodkin
>
> This change introduces default_splash_locations which
> simplifies splash recovery from the first partition of
> USB/MMC/SATA drive.
>
> Given usual mapping of the first partition of external m
On Wed, Jul 27, 2016 at 09:31:25PM +0530, Jagan Teki wrote:
> >> >> FWIW, if anyone is interested in taking over, I'm can help with the
> >> >> load if needed.
> >> >
> >> > I would also be quite happy to see a joint custodian setup similar to
> >> > how some of the Linux Kernel trees are handled,
On Wed, 2016-07-27 at 18:10 +0200, Hans de Goede wrote:
> This fixes the following CACHE warnings when using sun8i_emac:
>
> => dhcp
> BOOTP broadcast 1
> BOOTP broadcast 2
> CACHE: Misaligned operation at range [7bf594a8, 7bf59628]
> BOOTP broadcast 3
> CACHE: Misaligned operation at range [7bf59
On Wed, 2016-07-27 at 18:10 +0200, Hans de Goede wrote:
> On 2 of my H3 boards bytes 13-15 of the SID are all 0 leading to
> the NIC specific bytes of the mac all being 0, which leads to the
> boards not getting an ipv6 address from the dhcp server.
>
> This commits adds a check to ensure this doe
On Wed, 2016-07-27 at 18:10 +0200, Hans de Goede wrote:
> With the recent bug fixes for the sun8i_emac driver all known issues
> are resolved, so we can re-enable the driver.
>
> While at it, also enable the emac on the Orange Pi One.
>
> Cc: Chen-Yu Tsai
> Cc: Corentin LABBE
> Cc: Amit Singh T
On Wed, 2016-07-27 at 18:10 +0200, Hans de Goede wrote:
> It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the
> SID
> are always 0 on H3 making it a poor candidate to use as source for
> the
> serialnr / mac-address, switch to word1 which seems to be more
> random.
>
> Cc: Chen-Yu
Hello Hans,
On Wed, 27 Jul 2016 18:10:34 +0200
Hans de Goede wrote:
> It seems that bytes 13-14 of the SID / bytes 1-2 from word 3 of the SID
> are always 0 on H3 making it a poor candidate to use as source for the
> serialnr / mac-address, switch to word1 which seems to be more random.
>
> Cc:
On 07/20/2016 03:51 AM, Gong Qianyu wrote:
> The current code would always use the speed and mode set by
> CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE. But if using
> SPI driver model it should get the values from DT.
>
> Signed-off-by: Gong Qianyu
> ---
> drivers/net/fm/fm.c | 10 ++
>
Hi Tom,
On Mon, 25 Jul 2016 17:46:31 -0400
Tom Rini tr...@konsulko.com wrote:
...
> Hey, good catch. Anatolij, please fix and re-submit, thanks!
sandbox build fixed now, here is updated pull request:
The following changes since commit 19ce924ff914f315dc2fdf79f357825c513aed6e:
Prepare v2016.0
On Wed, Jul 27, 2016 at 08:10:08PM +0200, Maxime Ripard wrote:
> On Wed, Jul 27, 2016 at 09:31:25PM +0530, Jagan Teki wrote:
> > >> >> FWIW, if anyone is interested in taking over, I'm can help with the
> > >> >> load if needed.
> > >> >
> > >> > I would also be quite happy to see a joint custodian
Am 27.07.2016 um 16:26 schrieb Paul Burton:
> This patch introduces support for building U-Boot to run on the MIPS
> Boston development board. This is a board built around an FPGA & an
> Intel EG20T Platform Controller Hub, used largely as part of the
> development of new CPUs and their software
On 07/21/2016 04:45 AM, Marek Vasut wrote:
> On 07/21/2016 10:02 AM, Rajesh Bhagat wrote:
>> Hi All,
>>
>> Any Comments?
>
> York, please check this.
Passed compiling tests on powerpc and arm platforms.
York
>
>>> -Original Message-
>>> From: Rajesh Bhagat [mailto:rajesh.bha...@nxp.com]
From: Stephen Warren
In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP
(Boot and Power Management Processor). This change implements a driver
that does that. A tegra/ sub-directory is created to follow the existing
pattern. It is unconditionally selected by CONFIG_TEGRA186
From: Stephen Warren
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. These bindings dictate how to represent the BPMP in d
From: Stephen Warren
This adds the DT content that's needed to allow board DTs to enable use
of BPMP, clocks, resets, GPIOs, eMMC, and SD cards.
Signed-off-by: Stephen Warren
---
arch/arm/dts/tegra186.dtsi | 55 --
1 file changed, 53 insertions(+), 2
From: Stephen Warren
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication
From: Stephen Warren
The DT binding for the Tegra186 HSP module apparently wasn't quite final
when I posted initial U-Boot support for it. Add the final DT binding doc
and adapt all code and DT files to match it.
Signed-off-by: Stephen Warren
---
arch/arm/dts/tegra186.dtsi
From: Stephen Warren
In Tegra186, on-SoC reset signals are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that. It is unconditionally selected by CONFIG_TEGRA186
since virtually any Tegra186 build of U-Boot will need the
From: Stephen Warren
In Tegra186, SoC power domains are manipulated using IPC requests to
the BPMP (Boot and Power Management Processor). This change implements a
driver that does that.
Signed-off-by: Stephen Warren
---
drivers/power/domain/Kconfig | 7 +++
drivers/power/domai
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