Moved Tegra config options to mach-tegra/Kconfig so that both
32-bit and 64-bit builds can co-exist for Tegra SoCs.
T210 will be 64-bit only (no SPL) and will requires a 32-bit
AVP/BPMP loader.
Signed-off-by: Tom Warren
---
arch/arm/Kconfig| 11 ---
arch/arm/mach-tegra/Kconf
Derived from Tegra124, modified as appropriate during T210
board bringup. Cleaned up debug statements to conserve
string space, too.
Signed-off-by: Tom Warren
---
arch/arm/include/asm/arch-tegra/ap.h | 6 +--
arch/arm/include/asm/arch-tegra/clk_rst.h| 28 +++---
arch/arm/inc
Simon's 'tegra124: Implement spl_was_boot_source()' needs
a prototype for save_boot_params_ret() to build cleanly
for 64-bit Tegra210.
Signed-off-by: Tom Warren
---
arch/arm/mach-tegra/board.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra
Based on T124 Venice2. SDMMC1 is SD-card slot.
Signed-off-by: Tom Warren
---
arch/arm/dts/Makefile | 3 +-
.../{tegra124-venice2.dts => tegra210-p2571.dts} | 40 --
arch/arm/dts/{tegra124.dtsi => tegra210.dtsi} | 153 -
3 files chang
Based on Venice2, incorporates Stephen Warren's
latest P2571 pinmux table.
With Thierry Reding's 64-bit build fixes, this
will build and and boot in 64-bit on my P2571
(when used with a 32-bit AVP loader).
Signed-off-by: Tom Warren
---
arch/arm/mach-tegra/tegra210/Kconfig | 7 +
On Mon, Jul 20, 2015 at 9:17 PM, Joe Hershberger wrote:
> On Mon, Jul 20, 2015 at 1:59 PM, Lukasz Majewski wrote:
>>> >> Is thor not faster than DFU?
>>> >
>>> > Yes, it is. However, DFU is standardized (which is despite of its
>>> > low speed its huge advantage) - thor not.
>>> >
>>> >>
>>> >> It
Hi Adrian,
On 07/16/2015 01:49 AM, Adrian Alonso wrote:
* The system counter driver for imx7d abd mx6ul, move
this timer driver to imx-common and rename it as syscounter.c
For mx6ul and mx7, configurations are used for choose the GPT timer
or system counter timer (default).
GPT tim
Apparently lcd_panel_disable is not defined anywhere, so no config for
an arm1136 board would have set CONFIG_LCD. Remove the unused code.
Signed-off-by: Alexander Stein
---
arch/arm/cpu/arm1136/cpu.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/arch/arm/cpu/arm1136/cpu.c b/arc
The cacheline is always 32 bytes for arm1176 CPUs, so define it at board
config level for cache handling code.
Signed-off-by: Alexander Stein
---
include/configs/rpi-common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h
index 101
As both cores are similar merge the cache handling code for both CPUs
to arm11 directory.
Signed-off-by: Alexander Stein
---
arch/arm/cpu/arm11/Makefile | 8 +++
arch/arm/cpu/arm11/cpu.c | 150 ++
arch/arm/cpu/arm1136/Makefile | 1 -
arch/arm/cp
When using dcache the setup data for the mailbox must be actually written
into memory before calling into firmware. Thus flush and invalidate the
memory.
Signed-off-by: Alexander Stein
---
Changes in v2:
* Add hint in header about alignment requirements
* Invalidate cache after calling into mailb
The mailbox buffer is required to be at least 16 bytes aligned, but for
cache invalidation and/or flush it needs to be cacheline aligned.
Use CONFIG_SYS_CACHELINE_SIZE alignment for all mailbox buffer allocations.
Signed-off-by: Alexander Stein
---
board/raspberrypi/rpi/rpi.c | 10 +-
dr
Now that mailbox driver supports cache flush and invalidation, we can
enable dcache.
Signed-off-by: Alexander Stein
---
Changes in v2:
* Only enable dcache on rpi1, but not on rpi2
include/configs/rpi-common.h | 1 -
include/configs/rpi_2.h | 1 +
2 files changed, 1 insertion(+), 1 deletio
This patchset enables dcache support for Raspberry Pi 1.
First the cache support code for arm1136 and 1176 was merged.
CONFIG_SYS_CACHELINE_SIZE is defined as 32 bytes which is used as alignment
for mailbox buffer allocations.
Then rpi mailbox code has now dcache flush for writing the mailbox reque
Tom,
The following changes since commit 605e15db2b54302364a2528d3c6604fbc57be846:
Merge git://git.denx.de/u-boot-x86 (2015-07-15 10:41:20 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git master
for you to fetch changes up to db14f11dfe348550d8c10c66092
On 07/01/2015 10:58 PM, Prabhakar Kushwaha wrote:
> From: "J. German Rivera"
>
> Make it easier for the user to notice when the MC firmware
> had problems booting.
>
> Signed-off-by: J. German Rivera
> Signed-off-by: Prabhakar Kushwaha
> ---
> Changes for v2: Sending as it is for patchset
>
On 06/29/2015 12:50 AM, Alison Wang wrote:
> From: Zhichun Hua
>
> When final MMU table is setup in DDR, TCR attributes must match
> those of the memroy for cacheability and shareability.
>
> Signed-off-by: Zhichun Hua
> Signed-off-by: York Sun
Applied to u-boot-fsl-qoriq master branch.
Yo
On 06/29/2015 12:49 AM, Alison Wang wrote:
> From: Zhichun Hua
>
> For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit
> position [13:12] of TCR_ELx register.
>
> Signed-off-by: Zhichun Hua
> Signed-off-by: York Sun
> ---
Applied to u-boot-fsl-qoriq master branch.
York
On 05/11/2015 12:39 AM, Alison Wang wrote:
> As the function 'sprintf' does not check buffer boundaries but outputs
> to the buffer 'enet' of fixed size (16), this patch removes the function
> 'sprintf', and uses 'strcpy' instead. It will assign the character
> arrays 'enet' and 'phy' the corresp
On Thu, Jul 16, 2015 at 10:14:49AM -0500, Nishanth Menon wrote:
> Fix up a few typos in documentation.
>
> Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini
--
Tom
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On 06/03/2015 09:01 PM, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform.
>
> Tested on LS1021AQDS, LS1021ATWR.
> Test CPU hotplug times: 60K
> Test kernel boot times: 1.2K
>
> Signed-off-by: Wang Dongsheng
>
Applied to u
On 06/03/2015 09:01 PM, Dongsheng Wang wrote:
> From: Wang Dongsheng
>
> timer_wait is moved from sunxi/psci_sun7i.S, and it can be converted
> completely into a reusable armv7 generic timer. LS1021A will use it
> as well.
>
> Signed-off-by: Wang Dongsheng
>
Applied to u-boot-fsl-qoriq mast
On 06/09/2015 01:07 AM, Alison Wang wrote:
> As SCFG_ENDIANCR register is added to choose little-endian or big-endian
> for audio IPs on Rev2.0 silion, little-endian mode is selected.
>
> Signed-off-by: Alison Wang
> ---
Applied to u-boot-fsl-qoriq master branch.
York
On 06/26/2015 04:48 AM, Haikun Wang wrote:
> From: Haikun Wang
>
> Bring in required device tree files for ls2085a from Linux.
> These are initially unchanged and have a number of pieces not needed by
> U-Boot.
>
> Signed-off-by: Haikun Wang
> ---
This set is applied to u-boot-fsl-qoriq mas
On 06/26/2015 04:56 AM, Haikun Wang wrote:
> From: Haikun Wang
>
> Signed-off-by: Haikun Wang
> ---
Applied to u-boot-fsl-qoriq master branch.
York
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On 06/26/2015 04:58 AM, Haikun Wang wrote:
> From: Haikun Wang
>
> DSPI has pin muxing with SDHC and other IPs, this patch check the value of
> RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig"
> configuration, if those pins are configured to DSPI and "hwconfig" enable
> D
On 07/03/2015 01:51 AM, Haikun Wang wrote:
> From: Haikun Wang
>
> Enable DSPI flash related configurations.
>
> Signed-off-by: Haikun Wang
> ---
This set is applied to u-boot-fsl-qoriq master branch with subject fix.
York
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On 07/03/2015 01:51 AM, Haikun Wang wrote:
> Freescale DSPI driver has been converted to Driver Model.
> The new driver is depended on OF_CONTROL, DM, DM_SPI.
> This patch enable FSL_DSPI and its dependence configure options.
>
> Signed-off-by: Haikun Wang
> ---
Applied to u-boot-fsl-qoriq mas
Hi Stefan,
On Mon, Jul 20, 2015 at 11:20:40AM +0200, Stefan Roese wrote:
> This patch adds the configuration options to boot via SDIO/MMC on the
> Marvell DB-88F6820-GP Armada A38x board. The default boot device
> is still SPI NOR flash.
>
> To enable MMC booting on this board 2 things need to be
Hi Nikolay,
> -Original Message-
> From: Nikolay Dimitrov [mailto:picmas...@mail.bg]
> Sent: Monday, July 20, 2015 3:43 PM
> To: Alonso Lazcano Adrian-B38018
> Cc: u-boot@lists.denx.de; sba...@denx.de; Estevam Fabio-R49496;
> ota...@ossystems.com.br
> Subject: Re: [U-Boot] [PATCH 09/11] im
Hello Albert,
You are right. it seems the "file' program in my Ubuntu- 12.04.5 LTS system
doesn't have the aarch64 database of signatures as you said. But If I moved the
64 bit u-boot I built in my Ubuntu- 12.04.5 LTS system to an Ubuntu14.04.02 LTS
system, the "file u-boot" shows " u-boot: EL
From: Marcel Ziswiler
Allow for optional custom USB gadget manufacturer/product/vendor
IDs/strings to be specified.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Simon Glass
---
include/configs/tegra-common-usb-gadget.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/configs/t
From: Marcel Ziswiler
This patch set is an assortment of tegra fixes/enhancements distilled
straight from our downstream integration work.
Changes in v2:
- dropped Colibri T20 specific ONFI detection enablement patch (formerly
9) as I noticed this already being done globally as part of
tegra
From: Marcel Ziswiler
Add LCD display support defaulting to VESA VGA resolution. Different
resolutions configurable via device tree.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Simon Glass
---
Changes in v2: fixed PWM instance
arch/arm/dts/tegra20-colibri.dts| 29
From: Marcel Ziswiler
Fix PIO read_byte() implementation not only used for the legacy READ ID
but also the PARAM command now required for proper ONFI detection.
This fix is inspired by Lucas Stach's Linux Tegra NAND driver of late.
While at it also disable subpage writes.
Signed-off-by: Marcel
From: Marcel Ziswiler
Integrate cache alignment bounce buffer to workaround issues as follows:
Loading file '/boot/zImage' to addr 0x0100 with size 4499152 (0x0044a6d0)...
ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108
ERROR: v7_dcache_inval_range - stop address is
From: Marcel Ziswiler
The Colibri T20's PMIC enters a sleep mode on low supply voltage < 3.0V
±2.5% (2.92...3.08V). Rising the main supply voltage again does not
bring it back to regular operation. Not even a full reset does bring
the module back. A full power cycle was required to reboot the sys
From: Marcel Ziswiler
Now as all is in place actually enable UBI/UBIFS support to be able to
boot the Linux kernel and root file system from NAND.
Signed-off-by: Marcel Ziswiler
---
include/configs/colibri_t20.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/configs/colibr
From: Marcel Ziswiler
Allow detecting whether or not U-Boot was launched through the
recovery mode of the resp. NVIDIA SoC.
Make use of a board specific arch_misc_init() and enable the same via
CONFIG_ARCH_MISC_INIT configuration option.
Signed-off-by: Marcel Ziswiler
---
Changes in v2:
Drop u
From: Marcel Ziswiler
Add I2C support in order to subsequently allow disabling the PMIC sleep
mode on low supply voltage.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Simon Glass
---
arch/arm/dts/tegra20-colibri.dts | 28
include/configs/colibri_t20.h| 4
From: Marcel Ziswiler
Various clean-ups either in comments, order or spacing without any
functional impact:
- Add some comments in the device trees resp. reorder some parameters
for consistency across all our modules.
- Sort some include files alphabetically (while leaving common.h on
top of
From: Marcel Ziswiler
Unfortunately currently both Apalis T30 as well as Colibri T30 crash
upon starting USB host support. This is due to the following patch not
having taken into account that our T30 device trees were defaulting to
peripheral only mode instead of otg:
commit ddb9a502d18008e845d
From: Marcel Ziswiler
Use toradex,colibri_t20 as the device-tree compatible node value rather
than toradex,t20 in accordance to our Apalis/Colibri T30 products.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Simon Glass
---
arch/arm/dts/tegra20-colibri.dts | 2 +-
1 file changed, 1 insertion(+),
From: Marcel Ziswiler
Enable optional raw initrd support to allow boot using an initrd.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Simon Glass
---
include/configs/apalis_t30.h | 3 +++
include/configs/colibri_t20.h | 3 +++
include/configs/colibri_t30.h | 3 +++
3 files changed, 9 insertion
From: Max Krummenacher
Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384.
This increases the tftp download speed considerably.
While at it enable CONFIG_TFTP_TSIZE which limits the progress bar to
fifty '#' independent of the downloaded file size.
Signed-off-by: Max Krummenacher
S
From: Marcel Ziswiler
Enable mtdparts aka dynamic MTD partition support.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Simon Glass
---
Changes in v2:
Actually set mtdparts environment variable as part of the board extra ones.
include/configs/colibri_t20.h | 14 ++
1 file changed, 1
From: Marcel Ziswiler
Add defines to allow reading recovery mode (RCM) boot type from the boot
information table (BIT) written by the boot ROM (BR) to the IRAM.
Signed-off-by: Marcel Ziswiler
Reviewed-by: Simon Glass
---
Changes in v2: Reword commit mesage as per Simon's suggestion.
arch/arm
From: Marcel Ziswiler
Make sure SODIMM pin 87 nRESET_OUT is released properly by explicitly
setting its pin mux function to GMI. This solves some issues with e.g.
USB not being fully operational on carrier boards with USB hubs
connected to reset if U-Boot got loaded via recovery mode aka rcm.
Si
Hi Adrian,
On 07/21/2015 01:11 AM, Alonso Adrian wrote:
Hi Nikolay,
-Original Message-
From: Nikolay Dimitrov [mailto:picmas...@mail.bg]
Sent: Monday, July 20, 2015 3:43 PM
To: Alonso Lazcano Adrian-B38018
Cc: u-boot@lists.denx.de; sba...@denx.de; Estevam Fabio-R49496;
ota...@ossystems
* Extend imximage DCD version 2 to support DCD commands
CMD_WRITE_CLR_BIT 4 [address] [mask bit] means:
while ((*address & ~mask) != 0);
CMD_CHECK_BITS_SET 4 [address] [mask bit] means:
while ((*address & mask) != mask);
CMD_CHECK_BITS_CLR 4 [address] [mask bit] means:
*address =
* Add pmic pfuze3000 support, implement power_pfuze3000_init to be
used in power_init_board callback function.
Signed-off-by: Adrian Alonso
Signed-off-by: Peng Fan
---
Changes for V2:
- Correct pfuze device name to pfuze3000; Freescale documentation uses
Pfuze 3000 as product name for the pm
* Add support for usb driver for i.MX7D SoC
Signed-off-by: Adrian Alonso
Signed-off-by: Ye.Li
Signed-off-by: Peng Fan
---
Changes for V2: Resend
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-mx7.c | 103
2 files changed, 104 insertions
DCIMVAC is upgraded to DCCIMVAC for the individual processor
(Cortex-A7) that the DCIMVAC is executed on.
We should follow the linux dma follow. Before DMA read, first
invalidate dcache then after DMA read, invalidate dcache again.
With the DMA direction DMA_FROM_DEVICE, the dcache need be
invali
* Ocotp of i.MX7D has different operation rule.
This patch is to add support for i.MX7D ocotp.
Signed-off-by: Adrian Alonso
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
---
Changes for V2: Resend
drivers/misc/mxc_ocotp.c | 74 +++-
1 file changed,
* Add mxc_gpio support for imx7d SoC
* Use CONFIG_MX7 to extend mxc gpio driver support for imx7d
Signed-off-by: Peng Fan
Signed-off-by: Adrian Alonso
---
Changes for V2: Resend
arch/arm/include/asm/arch-mx7/gpio.h | 12
drivers/gpio/mxc_gpio.c | 8 +---
2 files
* Add thermal driver support for imx7 SoC
read_cpu_temperature is SoC dependent
* Redefine config macro to support imx7 and imx6 SoC
Signed-off-by: Adrian Alonso
Signed-off-by: Peng Fan
---
Changes for V2:
- Rework patch so it can be applyed on top of patch
imx6: standardise OCOTP and fuse c
* The system counter driver for imx7d abd mx6ul, move
this timer driver to imx-common and rename it as syscounter.c
For mx6ul and mx7, configurations are used for choose the GPT timer
or system counter timer (default).
GPT timer: CONFIG_GPT_TIMER
System counter timer: CON
* Add Clock control module (CCM) support
* iMX7D SoC introduces 3 main clock sysmtem abstraction for clock
root frequency generation denominated clock slices.
Core clock slice: hihg speed clock for ARM core
Bus clock slice: for bus clocks
IP clock slice: Peripheral clocks
* At system boot R
* Add timer support for imx7d SoC
Signed-off-by: Adrian Alonso
---
Changes for V2: Split from patch imx: imx7d: initial arch level support
arch/arm/imx-common/timer.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/ti
* HAB secure boot support
- get_hab_status: checks if secure boot is enabled or not
- authenticate_image: verifies image properly signed based
on CSF entry
* Uboot command for hab authenticate
- hab_auth_img: authenticate image via HAB
- hab_status: display HAB status
Signed-off-by: Ad
* Add i.MX7D SABRESD target board support with enabled modules:
UART, PMIC, USB/OTG, SD, eMMC, ENET, I2C, 74LV IOX.
Build target: mx7dsabresd_config
Signed-off-by: Peng Fan
Signed-off-by: Fugang Duan
Signed-off-by: Ye.Li
Signed-off-by: Adrian Alonso
---
Changes for V2:
- Include arch/arm/
* Add SoC system support, Misc arch dependent functions for
system bring up:
s_init: system init enable clock base settings
enable_caches: configures Cortex-A7 L2 caches
get_boot_device: identifies boot device
Signed-off-by: Adrian Alonso
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
---
* Add imx-common cpu support for imx7d SoC
* Update reset_cause for imx7d
* Enable watchdog driver built for imx7d
Signed-off-by: Adrian Alonso
---
Changes for V2: Split from patch imx: imx7d: initial arch level support
arch/arm/Makefile| 4 ++--
arch/arm/cpu/armv7/Makefile | 3 +
Hi Adrian,
On Mon, Jul 20, 2015 at 9:17 PM, Adrian Alonso wrote:
> --- /dev/null
> +++ b/board/freescale/mx7dsabresd/MAINTAINERS
> @@ -0,0 +1,6 @@
> +MX7DSABRESD BOARD
> +M: Fabio Estevam
I think it makes more sense to put your name here :-)
___
Hi Marek,
On Mon, Jul 20, 2015 at 09:27:35PM +0200, Marek Vasut wrote:
>On Monday, July 20, 2015 at 11:40:22 AM, Peng Fan wrote:
>> Follow linux dma follow:
>
>Nit: "flow" at the end, not "follow" ;-)
Thanks.
Do you have a chance to review this patch,
https://patchwork.ozlabs.org/patch/497619/ ?
>
Thanks. :)
Regards,
-Dongsheng
> -Original Message-
> From: Sun York-R58495
> Sent: Tuesday, July 21, 2015 5:14 AM
> To: Wang Dongsheng-B40534
> Cc: i...@hellion.org.uk; hdego...@redhat.com; albert.u.b...@aribaud.net;
> jan.kis...@siemens.com; Jin Zhengxiong-R64188; Wang Huan-B18965; Zhao
From: Tang Yuantian
Freescale ARM-based Layerscape SoCs contain a SATA controller
which comply with the serial ATA 3.0 specification and the
AHCI 1.3 specification.
This patch adds some basic SATA APIs which would be called by
specific board.
Signed-off-by: Tang Yuantian
---
board/freescale/co
Hi Luka,
On 20.07.2015 23:34, Luka Perkov wrote:
On Mon, Jul 20, 2015 at 11:20:40AM +0200, Stefan Roese wrote:
This patch adds the configuration options to boot via SDIO/MMC on the
Marvell DB-88F6820-GP Armada A38x board. The default boot device
is still SPI NOR flash.
To enable MMC booting on
Masahiro Yamada (7):
ARM: UniPhier: add environment sets for non-FIT Linux boot
ARM: UniPhier: add environment variable for TFTP boot
ARM: UniPhier: disable CONFIG_FIT
ARM: UniPhier: update CONFIG_BOOTARGS
ARM: UniPhier: add PH1-sLD3 SoC support
ARM: dts: UniPhier: add I2C ch4 device n
Both "earlyprintk" and "loglevel=8" should be useful for the
development.
Signed-off-by: Masahiro Yamada
---
include/configs/uniphier.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 0a86c8d..5ec60d6 100644
--- a
Signed-off-by: Masahiro Yamada
---
doc/README.uniphier | 46 --
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/doc/README.uniphier b/doc/README.uniphier
index 4dacc9c..52d681b 100644
--- a/doc/README.uniphier
+++ b/doc/README.uniphier
@
To use FIT boot, we have to describe Image Tree Source in addition.
So, it is not intended for beginners. Disable it by default.
Signed-off-by: Masahiro Yamada
---
configs/ph1_ld4_defconfig | 2 --
configs/ph1_pro4_defconfig | 2 --
configs/ph1_sld8_defconfig | 2 --
3 files changed, 6 deleti
Currently, the environment variables "norboot" and "nandboot" only
work with CONFIG_FIT, but we do not want to depend on CONFIG_FIT to
boot the kernel.
This commit adds environments useful for booting Linux with separate
uImage + ramdisk + DTB.
Signed-off-by: Masahiro Yamada
---
include/config
This I2C device is used SoC-internally for controlling the DMD core.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ph1-sld3.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi
b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 2fa42a6..5e29
The init code for UMC (Unified Memory Controller) and PLL has not
been mainlined yet, but U-boot proper should work.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig | 12 ++-
arch/arm/mach-uniphier/Makefile| 7 +-
arch/arm/mach-uniphier
The command "run tftpboot" downloads some files onto the RAM
via TFTP and boots the kernel.
Signed-off-by: Masahiro Yamada
---
include/configs/uniphier.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index a909621..0a86c8
Hi Heiko,
> Hello Lukasz,
>
> Am 20.07.2015 um 16:03 schrieb Lukasz Majewski:
> > Hi Marek,
> >
> >> add dfu supprt for at91 sam9260 based boards. The USB
> >> gadget driver is ported from linux:
> >>
> >> b2ba27a5c56ff: usb: gadget: at91_udc: move prepare clk into process
> >> context
> >>
> >>
On Monday, July 20, 2015 at 04:03:08 PM, Lukasz Majewski wrote:
> Hi Marek,
>
> > add dfu supprt for at91 sam9260 based boards. The USB
> > gadget driver is ported from linux:
> >
> > b2ba27a5c56ff: usb: gadget: at91_udc: move prepare clk into process
> > context
> >
> > it drops a lot of checkp
On Monday, June 15, 2015 at 02:43:01 PM, Heiko Schocher wrote:
> [root@pollux dfu-util]# ./src/dfu-util -l
> dfu-util 0.8
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2014 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY
On Monday, July 20, 2015 at 11:40:21 AM, Peng Fan wrote:
> Check maximum ecc strength for each platfrom to avoid the calculated ecc
> exceed the limitation.
>
> Signed-off-by: Peng Fan
> Signed-off-by: Han Xu
Reviewed-by: Marek Vasut
Best regards,
Marek Vasut
_
On Tuesday, July 21, 2015 at 02:27:43 AM, Peng Fan wrote:
> Hi Marek,
>
> On Mon, Jul 20, 2015 at 09:27:35PM +0200, Marek Vasut wrote:
> >On Monday, July 20, 2015 at 11:40:22 AM, Peng Fan wrote:
> >> Follow linux dma follow:
> >Nit: "flow" at the end, not "follow" ;-)
>
> Thanks.
> Do you have a
On Tuesday, July 21, 2015 at 02:17:06 AM, Adrian Alonso wrote:
> * Add support for usb driver for i.MX7D SoC
>
> Signed-off-by: Adrian Alonso
> Signed-off-by: Ye.Li
> Signed-off-by: Peng Fan
Hi!
Do we really need yet-another-driver for i.MX ?
> ---
> Changes for V2: Resend
>
> drivers/usb/
On Monday, June 15, 2015 at 02:42:59 PM, Heiko Schocher wrote:
> add cpu.h from linux:
>
> 7538ec7d1e5: ARM: at91: remove no-MMU at91x40 support
>
> so it is easier to port linux code, which is based on it.
>
> Signed-off-by: Heiko Schocher
> ---
>
> arch/arm/mach-at91/include/mach/cpu.h | 14
* Add imx7d support for iomux controller
* imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr
(0x302C) each conroller provides control and mux mode pad
registers but shares iomuxc input select register with iomuxc-lpsr
IOMUX_CONFIG_LPSR flag is used to properly set daisy c
Hi Adrian, hi Peng,
On 16/07/2015 00:49, Adrian Alonso wrote:
> * Extend imximage DCD version 2 to support DCD commands
> CMD_WRITE_CLR_BIT 4 [address] [mask bit] means:
> while ((*address & ~mask) != 0);
> CMD_CHECK_BITS_SET 4 [address] [mask bit] means:
> while ((*address & mask) !=
In order to achieve reproducible builds in U-Boot, timestamps that are defined
at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment
variable allows setting a fixed value for those timestamps.
Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can b
> Did you see my v2 patch [1] for u-boot?
>
> It also builds now u-boot images created with mkimage reproducible ...
>
> If I interpret your patch from above correct, you add with
> SOURCE_DATE_EPOCH a specific fix timestamp?
>
> I think, this could be included to my approach too ...
>
> If SOU
Le lundi 20 juillet 2015 à 10:01 +0200, Paul Kocialkowski a écrit :
> In order to achieve reproducible builds in U-Boot, timestamps that are defined
> at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH
> environment
> variable allows setting a fixed value for those timestamps.
>
With the upcoming addition of the Armada 38x DDR support, which is not
compatible to the Armada XP DDR init code, we need to introduce a new
directory infrastructure. To support multiple Marvell DDR controller.
This will be the new structure:
drivers/ddr/marvell/axp
Supporting Armada XP
The u-boot-spl.kwb build target needs the SPL text-base
(CONFIG_SPL_TEXT_BASE) as load and execution address.
Signed-off-by: Stefan Roese
---
Changes in v2: None
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index a7dce06..744ae80 100644
--- a
Pin muxing needs to be done before UART output, since on A38x the UART
pins need some re-muxing for output to work.
Signed-off-by: Stefan Roese
---
Changes in v2: None
arch/arm/mach-mvebu/spl.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach
On A38x switching the regs base address without running from
SDRAM doesn't seem to work. So let the SPL still use the
default base address and switch to the new address in the
mail u-boot later.
Signed-off-by: Stefan Roese
---
Changes in v2: None
arch/arm/mach-mvebu/include/mach/soc.h | 10 +++
This patch adds SPL support for the Marvell DB-88F6820-GP board.
With this change, the bin_hdr from the original Marvell U-boot
is not needed any more on this board. The sources from bin_hdr
(SERDES/PHY and DDR setup) are now integrated in mainline
U-Boot. And this patch enables them for this board
Remove the incorrect PEX macros from the DDR header. And insert the
correct ones in ctrl_pex.h instead.
Signed-off-by: Stefan Roese
---
Changes in v2:
- New patch "arm: mvebu: a38x: Use correct PEX register access macros"
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h | 4
drivers/d
With the upcoming addition of the Armada 38x SPL support, which is not
compatible to the Armada XP SERDES init code, we need to introduce a new
directory infrastructure. So lets move the AXP serdes init code into
a new directory. This way the A38x code can be added in a clean way.
Signed-off-by: S
This patch-set adds the DDR3 setup and training code taken from the Marvell
U-Boot repository. This code used to be included as a binary (bin_hdr) into
the A38x boot image. Not linked with the main U-Boot. With this code
addition and the also included SERDES / PHY setup code, the Armada 38x
suppor
Only with disabled MMU its possible to switch the base register address on
Armada 38x. Without this the SDRAM located at >= 0x4000. is also not
accessible, as its still locked to cache.
Signed-off-by: Stefan Roese
---
Changes in v2: None
arch/arm/mach-mvebu/cpu.c | 18 ++
1
Without calling timer_init(), the xdelay() functions return immediately.
We need to call timer_init() early, so that these functions work and
the PHY and DDR init code works correctly.
Signed-off-by: Stefan Roese
---
Changes in v2:
- New patch "arm: mvebu: Call timer_init early before PHY and D
This patch adds the configuration options to boot via SDIO/MMC on the
Marvell DB-88F6820-GP Armada A38x board. The default boot device
is still SPI NOR flash.
To enable MMC booting on this board 2 things need to be changes:
a) Change kwbimage.cfg
BOOT_FROM sdio
b) In the config header select
This patch adds basic SDIO/MMC booting support to MVEBU SoC's. Since
I don't know of a way to test the boot-device upon runtime, this patch
hardcodes the spl_boot_device instead.
Tested on Marvell DB-88F6820-GP board.
Signed-off-by: Stefan Roese
Cc: Luka Perkov
Cc: Dirk Eibach
---
arch/arm/ma
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