According to new QIXIS system definition, update QIXIS registers set
to add present2 register instead of obsolete ctl_sys2.
Signed-off-by: Shengzhou Liu
---
based on master branch of upstream tree.
This patch is needed by T4QDS patches.
board/freescale/common/qixis.c |2 +-
board/freescale/
>> git clone git://arago-project.org/git/projects/u-boot-am33x.git
>
> This is definitely NOT what you want to use when somebody mentions
> "latest version". This term always refers to top of tree in mainline
> U-Boot, see http://git.denx.de/?p=u-boot.git;a=summary resp.
> git://git.denx.de/u-boo
Hi,
We are using exynos 4210 based odroid-PC board.I have gone throgh the uboot
code in which it is enabling MMU.I want to know why do we need to enable MMU in
uboot level.I came across this question when i was trying to use "go" command in
uboot which does not seem to be working.
Thanks & Rega
Hi Shabbir,
On 8 October 2012 14:20, shabbir wrote:
> Hi,
> We are using exynos 4210 based odroid-PC board.I have gone throgh the uboot
> code in which it is enabling MMU.I want to know why do we need to enable MMU
> in
Which u-boot you are reffering to.
> uboot level.I came across this questi
Hi Albert,
these changes are in my -next branch, so please pull them into arm/next.
The following changes since commit 4668a086bb0a769b741e3a4ffab85f1c41c7cdb8:
sandbox: Add asm/errno.h (2012-09-29 10:00:29 -0700)
are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git
Hi,
Iam using* u-boot-1.1.6* for my soc. *Go* command is not working and
gets hang whenever i try to load the stand alone application. Though I have
gone through the code, i am not able to find the cause. Can any one help me.
Thanks
Balaji
___
U-
Dear Albert Aribaud,
On 05.10.2012 21:15, Albert ARIBAUD wrote:
> Under option -munaligned-access, gcc can perform local char
> or 16-bit array initializations using misaligned native
> accesses which will throw a data abort exception. Fix files
> where these array initializations were unneeded, a
On 04/10/2012 21:49, Eric Nelson wrote:
> Signed-off-by: Eric Nelson
> ---
Hi Eric,
> diff --git a/board/boundary/nitrogen6x/README
> b/board/boundary/nitrogen6x/README
> new file mode 100644
> index 000..d67cdf0
> --- /dev/null
> +++ b/board/boundary/nitrogen6x/README
> @@ -0,0 +1,77 @@
>
On 04/10/2012 21:49, Eric Nelson wrote:
> Signed-off-by: Eric Nelson
> ---
> board/boundary/nitrogen6x/nitrogen6x.c | 34
> +++-
> 1 files changed, 33 insertions(+), 1 deletions(-)
>
> diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
> b/board/boundary/nitrogen
On 05/10/2012 22:03, Eric Nelson wrote:
> On 10/05/2012 12:00 PM, Tom Rini wrote:
>> On Fri, Oct 05, 2012 at 11:42:19AM -0700, Eric Nelson wrote:
>>> On 10/05/2012 10:24 AM, Albert ARIBAUD wrote:
Hi Eric,
On Thu, 4 Oct 2012 12:49:07 -0700, Eric Nelson
wrote:
> Signe
On 04/10/2012 03:47, Troy Kisky wrote:
> Read memory setup registers to determine size
> of available ram. This routine works for mx53/mx6x
>
> I need this because when mx6solo called get_ram_size
> with a too large maximum size, the system hanged.
>
> Signed-off-by: Troy Kisky
>
Hi Troy,
I a
On 04/10/2012 03:47, Troy Kisky wrote:
> This series goal is to add support for mx6solo and mx6duallite
> variants of mx6qsabrelite board. The new targets are
> called mx6ssabrelite and mx6dlsabrelite.
>
> The 1st 16 patches perform cleanup on imximage
Hi Troy,
I have some difficulties to unders
On 04/10/2012 03:47, Troy Kisky wrote:
> Signed-off-by: Troy Kisky
>
> ---
> v3: split into its own patch
> ---
> tools/imximage.c |1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/tools/imximage.c b/tools/imximage.c
> index c917036..bda1a75 100644
> --- a/tools/imximage.c
> +++ b/tool
On 04/10/2012 03:47, Troy Kisky wrote:
> Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the
> same check. Move check to before the set_imx_hdr call.
>
> Signed-off-by: Troy Kisky
>
> ---
> v3: split into its own patch
> ---
> tools/imximage.c | 19 +--
> 1 file changed, 5 inse
On 04/10/2012 03:47, Troy Kisky wrote:
> The '#' used as comments in the files cause the preprocessor
> trouble, so change to /* */.
>
> Signed-off-by: Troy Kisky
> ---
Hi Troy,
> Makefile |3 +-
> board/esg/ima3-mx53/imximage.cfg | 120
On 04/10/2012 03:47, Troy Kisky wrote:
> Use CONFIG_MX6 when the particular processor
> variant isn't important.
>
> Reserve the use of CONFIG_MX6Q to
> specifically test for quad cores variant.
>
> Signed-off-by: Troy Kisky
> ---
> drivers/gpio/mxc_gpio.c|6 +++---
> drivers/vi
On 05/10/2012 01:34, Troy Kisky wrote:
> On 10/3/2012 8:23 PM, Otavio Salvador wrote:
>> On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky
>> wrote:
>>> Signed-off-by: Troy Kisky
>>> ---
>>> board/freescale/mx6qsabrelite/mx6qsabrelite.c | 235
>>> ++---
>>> board/freescale/mx6qs
On 05/10/2012 01:28, Troy Kisky wrote:
> On 10/3/2012 8:00 PM, Otavio Salvador wrote:
>> On Wed, Oct 3, 2012 at 10:47 PM, Troy Kisky
>> wrote:
>>> The prompt is not appropriate if not running on
>>> a mx6q processor.
>>>
>>> Signed-off-by: Troy Kisky
>> But in this case the board name will change
Hi Andreas,
On Mon, 08 Oct 2012 13:21:45 +0200, "Andreas Bießmann"
wrote:
> Dear Albert Aribaud,
>
> On 05.10.2012 21:15, Albert ARIBAUD wrote:
> > Under option -munaligned-access, gcc can perform local char
> > or 16-bit array initializations using misaligned native
> > accesses which will thr
Hi Albert,
On 08.10.2012 16:36, Albert ARIBAUD wrote:
> Hi Andreas,
>
> On Mon, 08 Oct 2012 13:21:45 +0200, "Andreas Bießmann"
> wrote:
>
>> Dear Albert Aribaud,
>>
>> On 05.10.2012 21:15, Albert ARIBAUD wrote:
>>> Under option -munaligned-access, gcc can perform local char
>>> or 16-bit array
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 10/06/12 16:26, Marek Vasut wrote:
> Dear Tom Rini,
>
>> On Sun, Sep 30, 2012 at 02:21:31AM +0200, Marek Vasut wrote:
>>> This patch series implants slightly modified kernel-doc
>>> documentation generator from Linux kernel into U-Boot. First
>>>
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 10/07/12 04:17, Igor Grinberg wrote:
> Increase the MAXARGS to support more than 16 arguments.
>
> Signed-off-by: Igor Grinberg ---
> include/configs/cm_t35.h |2 +- 1 files changed, 1
> insertions(+), 1 deletions(-)
>
> diff --git a/include/
Dear Tom Rini,
> On 10/06/12 16:26, Marek Vasut wrote:
> > Dear Tom Rini,
> >
> >> On Sun, Sep 30, 2012 at 02:21:31AM +0200, Marek Vasut wrote:
> >>> This patch series implants slightly modified kernel-doc
> >>> documentation generator from Linux kernel into U-Boot. First
> >>> patch pulls in all
Hi Stefano,
On 10/08/2012 05:28 AM, Stefano Babic wrote:
On 04/10/2012 21:49, Eric Nelson wrote:
Signed-off-by: Eric Nelson
---
Hi Eric,
diff --git a/board/boundary/nitrogen6x/README b/board/boundary/nitrogen6x/README
new file mode 100644
index 000..d67cdf0
--- /dev/null
+++ b/board/bo
On Sat, Oct 06, 2012 at 01:06:41AM +0200, Anatolij Gustschin wrote:
> Hi Tom,
>
> please pull some fixes for upcoming release.
>
> The following changes since commit 198166877768cf4d0197289a524df8a6ca0e2f19:
>
> Merge branch 'master' of git://git.denx.de/u-boot-arm (2012-10-04 10:00:42
> -07
On 10/07/2012 03:36 PM, Lucas Stach wrote:
> This adds board support for the Toradex Colibri T20 module.
>
> Working functions:
> - SD card boot
> - USB boot
> - Network
> - NAND environment
>
> Signed-off-by: Lucas Stach
> ---
> v2:
> - rename .dts file to match board name
> v3:
> - make commen
On Sat, Oct 6, 2012 at 4:34 AM, Albert ARIBAUD
wrote:
> Hi,
>
> On Sat, 6 Oct 2012 13:02:49 +0200, Albert ARIBAUD
> wrote:
>
>> Hi All,
>>
>> With Anatolij's fix in, ELDK4.2 still fails to build three boards:
>> highbank, omap4_panda and omap4_sdp4430 (maintainers CCed).
>>
>> Build logs are wei
Clean up i.MX25 imx-regs.h:
- Update mx31 imx-regs.h filename.
- Test for __KERNEL_STRICT_NAMES just in case.
- Define internal RAM size.
Signed-off-by: Benoît Thébaudeau
Cc: Stefano Babic
---
.../arch/arm/include/asm/arch-mx25/imx-regs.h |6 +++---
1 file changed, 3 insertions(+),
From: Kumar Gala
Signed-off-by: Kumar Gala
---
arch/powerpc/cpu/mpc85xx/cpu.c |4
arch/powerpc/cpu/mpc85xx/speed.c | 11 +++
2 files changed, 15 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 5ddb294..515dd41 100644
--- a/a
Using E6500 L1 cache as initram requires L2 cache enabled.
Add l2-cache cluster enabling.
Setup stash id for L1 cache as (coreID) * 2 + 32 + 0
Setup stash id for L2 cache as (cluster) * 2 + 32 + 1
Stash id for L2 is only set for Chassis 2.
Signed-off-by: York Sun
Signed-off-by: Kumar Gala
Signe
Fix compiling error in case CONFIG_SYS_PCIE2_MEM_VIRT or
CONFIG_SYS_PCIE3_MEM_VIRT
not defined.
Signed-off-by: York Sun
---
drivers/pci/fsl_pci_init.c |4
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 0d46c96..1cf6158 100644
FSL_HW_PORTAL_PME is used even when CONFIG_SYS_DPAA_PME is not defined.
Remove the #ifdef.
Signed-off-by: York Sun
---
arch/powerpc/include/asm/fsl_portals.h |2 --
1 file changed, 2 deletions(-)
diff --git a/arch/powerpc/include/asm/fsl_portals.h
b/arch/powerpc/include/asm/fsl_portals.h
i
Expand the reference clock select to three bits
000: 100 MHz
001: 125 MHz
010: 156.25MHz
011: 150 MHz
100: 161.1328125 MHz
All others reserved
Signed-off-by: York Sun
---
arch/powerpc/include/asm/immap_85xx.h |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/i
Panic if the number of cores is more than CONFIG_MAX_CPUS because it will
surely overflow gd structure.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/cpu.c |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 515
The QCSP registers are expanded and moved from offset 0 to offset 0x1000
for SoCs with QMan v3.
Signed-off-by: York Sun
---
arch/powerpc/include/asm/immap_85xx.h | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powe
From: Stephen Warren
The partition name is a long variable-length string. Move it last on
the line to ensure consistent layout and that the entries align with
the "header" line. Also, surround it in quotes, so if it's empty, it's
obvious that something is still being printed.
Also, change the ca
From: Stephen Warren
When printing the partition table, print the partition type UUID and the
individual partition UUID. Do this unconditionally, since partition UUIDs
are useful.
Signed-off-by: Stephen Warren
---
disk/part_efi.c | 50 --
1 fil
From: Stephen Warren
When printing the EFI partition table, print the raw attributes. Convert
struct gpt_entry_attributes to a union to allow raw access.
Signed-off-by: Stephen Warren
---
disk/part_efi.c |2 ++
disk/part_efi.h | 15 +--
2 files changed, 11 insertions(+), 6 de
From: Stephen Warren
Simplify the partition printing loop in print_part_efi() to bail out
early when the first invalid partition is found, rather than indenting
the whole body of the loop. This simplifies later patches.
Signed-off-by: Stephen Warren
---
v2: Rebased series on top of the bug-fixe
From: Stephen Warren
Add no_block_io_protocol and legacy_bios_bootable attribute definitions.
These are sourced from UEFI Spec 2.3, page 105, table 19. Credits to the
libparted source for the specification pointer.
Signed-off-by: Stephen Warren
---
disk/part_efi.h |4 +++-
1 files changed,
Move spin table to cached memory to comply with ePAPR v1.1.
Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.
'M' bit is set for DDR TLB to maintain cache coherence.
See details in doc/README.mpc85xx-spin-table.
Signed-off-by: York Sun
---
README|
From: Stephen Warren
This information may be useful to compare against command "part uuid",
or if you want to manually paste the information into the kernel
command-line.
Signed-off-by: Stephen Warren
---
disk/part_dos.c | 19 +++
1 files changed, 11 insertions(+), 8 deletion
From: Stephen Warren
When printing the partition table, make sure data aligns with the column
headers. Change format of partition number field to %3d to match
part_efi.c.
Signed-off-by: Stephen Warren
---
disk/part_dos.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git
These assembly macros simplify codes to add and delete temporary TLB entries.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/start.S | 309 --
1 file changed, 130 insertions(+), 179 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powe
From: Stephen Warren
A partition is considered bootable if it either has the "legacy BIOS
bootable" flag set, or if the partition type UUID matches the standard
"system" type.
Signed-off-by: Stephen Warren
---
disk/part_efi.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
From: Stephen Warren
Minor cleanups required so later patches don't trigger checkpatch.
Signed-off-by: Stephen Warren
---
disk/part_dos.c | 21 +++--
1 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/disk/part_dos.c b/disk/part_dos.c
index 5c454e6..513a54a 1006
Corenet based SoCs have different core clocks starting from Chassis
generation 2. Cores are organized into clusters. Each cluster has up to
4 cores sharing same clock, which can be chosen from one of three PLLs in
the cluster group with one of the devisors /1, /2 or /4. Two clusters are
put togethe
From: Shaveta Leekha
Add code for configuring VSC3316/3308 crosspoint switches
Add README to understand the APIs
- VSC 3316/3308 is a low-power, low-cost asynchronous crosspoint switch
capable of data rates upto 11.5Gbps. VSC3316 has 16 input and 16
output ports whereas VSC3308 has
From: Andy Fleming
The T4 has added devices to previous corenet implementations:
* SEC has 3 more DECO units
* New PMAN device
* New DCE device
This doesn't add full support for the new devices. Just some
preliminary support.
Move PMAN LIODN to upper half of register
Despite having only one L
Create new files to handle 2nd generation Chassis as the registers are
organized differently.
- Add SerDes protocol parsing and detection
- Add support of 4 SerDes
- Add CPRI protocol in fsl_serdes.h
The Common Public Radio Interface (CPRI) is publicly available
specification th
From: Roy Zang
The multirate ethernet media access controller (mEMAC) interfaces to
10Gbps and below Ethernet/IEEE 802.3 networks via either RGMII/RMII
interfaces or XAUI/XFI/SGMII/QSGMII using the high-speed SerDes interface.
Signed-off-by: Sandeep Singh
Signed-off-by: Poonam Aggrwal
Signed-o
R6 was in ePAPR draft version but was dropped in official spec.
Removing it to comply.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/mp.c |8 +++-
arch/powerpc/cpu/mpc85xx/release.S |2 +-
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/cpu/mpc
Boot space translation utilizes the pre-translation address to select
the DDR controller target. However, the post-translation address will be
presented to the selected DDR controller. It is possible that the pre-
translation address selects one DDR controller but the post-translation
address exist
DDRC ver 4.7 adds DDR_SLOW bit in sdram_cfg_2 register. This bit needs to be
set for speed lower than 1250MT/s.
CDR1 and CDR2 are control driver registers. ODT termination valueis for
IOs are defined. Starting from DDRC 4.7, the decoding of ODT for IOs is
000 -> Termsel off
001 ->
Based on populated DIMMs, automatically select from cs0_cs1_cs2_cs3 or
cs0_cs1 interleaving, or non-interleaving if not available.
Fix the message of interleaving disabled if controller interleaving
is enabled but DIMMs don't support it.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc8xxx/ddr/
Add support for Freescale T4240 SoC. Feature of T4240 are
(incomplete list):
12 dual-threaded e6500 cores built on Power Architecture® technology
Arranged as clusters of four cores sharing a 2 MB L2 cache.
Up to 1.8 GHz at 1.0 V with 64-bit ISA support (Power Architecture
v2.06-compliant)
When ECC is enabled, DDR controller needs to initialize the data and ecc.
The wait time can be calcuated with total memory size, bus width, bus speed
and interleaving mode. If it went wrong, it is bettert to timeout than
waiting for D_INIT to clear, where it probably hangs.
Signed-off-by: York Sun
After DDR controller is enabled, it performs a calibration for the
transmit data vs DQS paths. During this calibration, the DDR controller
may make an inaccurate calculation, resulting in a non-optimal tap point.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +++
a
New corenet platforms with chassis2 have separated DDR clock inputs. Use
CONFIG_DDR_CLK_FREQ for DDR clock. This patch also cleans up the logic of
detecting and displaying synchronous vs asynchronous mode.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/cpu.c | 26 --
From: Stephen Warren
This makes the FAT filesystem API more consistent with other block-based
filesystems. If in the future standard multi-filesystem commands such as
"ls" or "load" are implemented, having FAT work the same way as other
filesystems will be necessary.
Convert cmd_fat.c to the new
From: Stephen Warren
The FAT filesystem code knows which partition ID it is operating on.
Currently, this is passed to fat_register_device() as a parameter.
In order to convert FAT to the more standardized fat_set_blk_dev(), the
information needs to come from somewhere else, and the partition
def
From: Stephen Warren
This removes the standalone cur_part_nr variable, opening the way to
replacing fat_register_device() with fat_set_blk_dev().
Note that when get_partition_info() fails and we use the entire disk,
the correct partition number is 0 (whole disk) not 1 (first partition),
so that
From: Stephen Warren
When no valid partitions are found, guarantee that we return -1. This
most likely already happens, since the most recent get_partition_info()
will have returned an error. However, it's best to be explicit.
Remove an unnecessary assignment of ret=0 in the success case; this v
Corenet 2nd generation Chassis doesn't have ddr_sync bit in RCW. Only
async mode is supported.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/cpu.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu
Fix handling quad-rank DIMMs in a system with two DIMM slots and first
slot supports both dual-rank DIMM and quad-rank DIMM.
For systems with quad-rank DIMM and double dual-rank DIMMs, cs_config
registers need to be enabled to maintain proper ODT operation. The
inactive CS should have bnds registe
Chassis generation 2 has different mask and shift. Use macro instead of
magic numbers.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc85xx/speed.c |4 +++-
arch/powerpc/include/asm/immap_85xx.h |7 +++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/
Corenet 2nd generation Chassis has different RCW and registers for SerDes.
Signed-off-by: York Sun
Signed-off-by: Prabhakar Kushwaha
---
arch/powerpc/include/asm/immap_85xx.h | 98 +++--
1 file changed, 93 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/in
Add support for Freescale B4860 and variant SoCs. Features of B4860 are
(incomplete list):
Six fully-programmable StarCore SC3900 FVP subsystems, divided into three
clusters-each core runs up to 1.2 GHz, with an architecture highly
optimized for wireless base station applications
Four dual
Since empty DIMM slot is allowed on other than the first slot, remove the
error message if SPD is not found in this case.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc8xxx/ddr/main.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/
On Mon, May 14, 2012 at 09:29:10AM -, Luka Perkov wrote:
> Hi Albert,
>
> On Sun, Apr 29, 2012 at 10:19:41PM +0200, Luka Perkov wrote:
> > On Thu, Apr 19, 2012 at 08:38:19AM +0200, Albert ARIBAUD wrote:
> > > Not my main area of expertise here, but I am not sure how this plays
> > > on Marvel
On Thu, Oct 04, 2012 at 06:39:22PM -, Tetsuyuki Kobayashi wrote:
> lowlevel_init() of rmobile badly assumed that ip register holds return
> address.
> The commit "63ee53a7 armv7 cpu_init_crit: Simplify code" breaks this
> assumption.
> This patch removes this bad assumption and simplify code.
Hi Troy,
This seems to be the patch where the rubber meets the road in
much of this series.
On 10/03/2012 06:47 PM, Troy Kisky wrote:
Signed-off-by: Troy Kisky
---
board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 120 +++---
1 file changed, 87 insertions(+), 33 deletions(-
On Fri, Oct 05, 2012 at 01:17:40PM -, Stephen Warren wrote:
> From: Stephen Warren
>
> Logically, a disk that contains a raw FAT filesystem does not in fact
> have a partition table. However, test_part_dos() was claiming that such
> disks did in fact have a DOS-style partition table. This ca
On Fri, Oct 05, 2012 at 01:17:39PM -, Stephen Warren wrote:
> From: Stephen Warren
>
> The recent switch to use get_device_and_partition() from do_fat_ls()
> broke the ability to access a FAT filesystem directly on a whole device;
> FAT only works within a partition on a device.
>
> This ch
On Fri, Oct 05, 2012 at 11:31:03PM -, Anatolij Gustschin wrote:
> Fix:
> yaffs_guts.c: In function 'yaffs_check_chunk_erased':
> yaffs_guts.c:324:6: warning: variable 'result' set but not used
> [-Wunused-but-set-variable]
> yaffs_guts.c: In function 'yaffs_verify_chunk_written':
> yaffs_guts.
On Sun, Oct 07, 2012 at 09:24:10AM -, Albert ARIBAUD wrote:
> The restore sequence in lowlevel_init was in the wrong order,
> causing lr to lose its original value and be set equal to ip
> instead. Also, its use of the stack clashes with that of
> s_init, so move the s_init call after the rest
Hey all,
I've tagged and pushed v2012.10-rc3. We're on-track to release v2012.10
officially next Monday, the 15th. Since -rc2 we have had:
- The ARM pull request merged. This includes at least the must-have fix
that Michael Walle pointed out among many other things.
- A number of outstanding
Hi Andreas,
On Mon, 08 Oct 2012 16:56:41 +0200, "Andreas Bießmann"
wrote:
> Hi Albert,
>
> On 08.10.2012 16:36, Albert ARIBAUD wrote:
> > Hi Andreas,
> >
> > On Mon, 08 Oct 2012 13:21:45 +0200, "Andreas Bießmann"
> > wrote:
> >
> >> Dear Albert Aribaud,
> >>
> >> On 05.10.2012 21:15, Albert
Am Montag, den 08.10.2012, 10:28 -0600 schrieb Stephen Warren:
> On 10/07/2012 03:36 PM, Lucas Stach wrote:
> > This adds board support for the Toradex Colibri T20 module.
> >
> > Working functions:
> > - SD card boot
> > - USB boot
> > - Network
> > - NAND environment
> >
> > Signed-off-by: Luca
Hi Stephen,
On Monday, October 8, 2012 8:15:27 PM, Stephen Warren wrote:
> This makes the FAT filesystem API more consistent with other
> block-based
> filesystems. If in the future standard multi-filesystem commands such
> as
> "ls" or "load" are implemented, having FAT work the same way as other
On 10/08/2012 10:38 AM, Lucas Stach wrote:
> Am Montag, den 08.10.2012, 10:28 -0600 schrieb Stephen Warren:
>> On 10/07/2012 03:36 PM, Lucas Stach wrote:
>>> This adds board support for the Toradex Colibri T20 module.
>>>
>>> Working functions:
>>> - SD card boot
>>> - USB boot
>>> - Network
>>> -
On 10/7/2012 11:19 AM, Eric Nelson wrote:
Hi Troy,
On 10/03/2012 06:47 PM, Troy Kisky wrote:
The '#' used as comments in the files cause the preprocessor
trouble, so change to /* */.
Signed-off-by: Troy Kisky
---
Makefile |3 +-
board/esg/ima3-mx53/im
Under option -munaligned-access, gcc can perform local char
or 16-bit array initializations using misaligned native
accesses which will throw a data abort exception. Fix files
where these array initializations were unneeded, and for
files known to contain such initializations, enforce gcc
option -m
Hi Stefano,
On 10/08/2012 05:54 AM, Stefano Babic wrote:
On 05/10/2012 22:03, Eric Nelson wrote:
On 10/05/2012 12:00 PM, Tom Rini wrote:
On Fri, Oct 05, 2012 at 11:42:19AM -0700, Eric Nelson wrote:
On 10/05/2012 10:24 AM, Albert ARIBAUD wrote:
Hi Eric,
On Thu, 4 Oct 2012 12:49:07 -0700, Er
On Mon, Oct 08, 2012 at 09:19:04PM +0200, Albert ARIBAUD wrote:
> Under option -munaligned-access, gcc can perform local char
> or 16-bit array initializations using misaligned native
> accesses which will throw a data abort exception. Fix files
> where these array initializations were unneeded, a
On Sun, Oct 07, 2012 at 02:07:05AM +0200, Marek Vasut wrote:
> Add kerneldoc annotations into serial core.
>
> Signed-off-by: Marek Vasut
> Cc: Marek Vasut
> Cc: Tom Rini
Please re-wrap the comments you're adding, they're too wide in many
cases and right at the edge in others (textwidth=72 or
Under option -munaligned-access, gcc can perform local char
or 16-bit array initializations using misaligned native
accesses which will throw a data abort exception. Fix files
where these array initializations were unneeded, and for
files known to contain such initializations, enforce gcc
option -m
Hi Lucas,
On Fri, Sep 28, 2012 at 7:51 AM, Lucas Stach wrote:
> Am Donnerstag, den 27.09.2012, 17:44 -0700 schrieb Simon Glass:
>> When the cursor position gets to the end of the LCD console we normally
>> scroll by one line. This adds an option to increase that value.
>>
>> Console scrolling is
Hi Stephen,
On Wed, Oct 3, 2012 at 3:58 PM, Stephen Warren wrote:
> On 09/27/2012 06:44 PM, Simon Glass wrote:
>> Add LCD definitions and also a proposed binding for LCD displays.
>>
>> The PWM is as per what will likely be committed to linux-next soon.
>>
>> The displaymode binding comes from a
Hi Stephen,
On Fri, Oct 5, 2012 at 12:51 PM, Stephen Warren wrote:
> On 10/03/2012 11:05 AM, Stephen Warren wrote:
>> On 09/27/2012 06:44 PM, Simon Glass wrote:
>>> This series adds support for the Tegra2x's display peripheral. This
>>> supports the LCD display on Seaboard and we use this to enab
Hi Stephen,
On Wed, Oct 3, 2012 at 3:58 PM, Stephen Warren wrote:
> On 09/27/2012 06:44 PM, Simon Glass wrote:
>> The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
>> by one of the PWMs.
>
>> diff --git a/board/nvidia/dts/tegra20-seaboard.dts
>> b/board/nvidia/dts/tegra20-seaboa
Simon/Stephen,
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: Monday, October 08, 2012 1:06 PM
> To: Stephen Warren
> Cc: U-Boot Mailing List; Tom Warren
> Subject: Re: [PATCH v4 0/16] tegra: Add display driver and LCD support for
> S
On 10/8/2012 9:05 AM, Eric Nelson wrote:
Hi Stefano,
On 10/08/2012 05:28 AM, Stefano Babic wrote: +
+/* Command definition */
+#include
Move CONFIG_CMD_BMODE and CONFIG_CMD_SETEXPR here.
That makes perfect sense.
Moving CONFIG_CMD_BMODE may break MX51 boards.
Only mx6 and mx53 define boo
Add kerneldoc annotations into serial core.
Signed-off-by: Marek Vasut
Cc: Marek Vasut
Cc: Tom Rini
---
drivers/serial/serial.c | 164 +++
1 file changed, 164 insertions(+)
V2: Rewrap the documentation.
diff --git a/drivers/serial/serial.c b/drive
On 08/10/2012 22:30, Troy Kisky wrote:
> On 10/8/2012 9:05 AM, Eric Nelson wrote:
>> Hi Stefano,
>>
>> On 10/08/2012 05:28 AM, Stefano Babic wrote: +
+/* Command definition */
+#include
>>>
>>> Move CONFIG_CMD_BMODE and CONFIG_CMD_SETEXPR here.
>>>
>>
>> That makes perfect sense.
>>
> Mov
On 10/8/2012 11:46 AM, Eric Nelson wrote:
Hi Troy,
This seems to be the patch where the rubber meets the road in
much of this series.
On 10/03/2012 06:47 PM, Troy Kisky wrote:
Signed-off-by: Troy Kisky
---
board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 120
+++---
1 f
Hi Thierry,
On Fri, Sep 28, 2012 at 1:08 PM, Thierry Reding
wrote:
> On Thu, Sep 27, 2012 at 05:44:24PM -0700, Simon Glass wrote:
>> This binding will apparently soon be in linux-next. Bring it in now
>> since we need to do something, and may as well try to target what
>> Linux will have.
>>
>> S
On 10/8/2012 2:03 PM, Stefano Babic wrote:
On 08/10/2012 22:30, Troy Kisky wrote:
On 10/8/2012 9:05 AM, Eric Nelson wrote:
Hi Stefano,
On 10/08/2012 05:28 AM, Stefano Babic wrote: +
+/* Command definition */
+#include
Move CONFIG_CMD_BMODE and CONFIG_CMD_SETEXPR here.
That makes perfect se
On 10/08/2012 02:06 PM, Simon Glass wrote:
> Hi Stephen,
>
> On Fri, Oct 5, 2012 at 12:51 PM, Stephen Warren wrote:
>> On 10/03/2012 11:05 AM, Stephen Warren wrote:
>>> On 09/27/2012 06:44 PM, Simon Glass wrote:
This series adds support for the Tegra2x's display peripheral. This
support
On 10/8/2012 6:06 AM, Stefano Babic wrote:
On 04/10/2012 03:47, Troy Kisky wrote:
Read memory setup registers to determine size
of available ram. This routine works for mx53/mx6x
I need this because when mx6solo called get_ram_size
with a too large maximum size, the system hanged.
Signed-off-b
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