Hi Thierry,
On Fri, Sep 28, 2012 at 1:08 PM, Thierry Reding
<thierry.red...@avionic-design.de> wrote:
> On Thu, Sep 27, 2012 at 05:44:24PM -0700, Simon Glass wrote:
>> This binding will apparently soon be in linux-next. Bring it in now
>> since we need to do something, and may as well try to target what
>> Linux will have.
>>
>> Signed-off-by: Simon Glass <s...@chromium.org>
>> ---
>> Changes in v3:
>> - Add new commit for pwm binding and node
>>
>> arch/arm/dts/tegra20.dtsi | 7 +++++++
>> doc/device-tree-bindings/pwm/tegra20-pwm.txt | 18 ++++++++++++++++++
>> 2 files changed, 25 insertions(+), 0 deletions(-)
>> create mode 100644 doc/device-tree-bindings/pwm/tegra20-pwm.txt
>>
>> diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
>> index d936b1e..3221bc9 100644
>> --- a/arch/arm/dts/tegra20.dtsi
>> +++ b/arch/arm/dts/tegra20.dtsi
>> @@ -211,4 +211,11 @@
>> compatible = "nvidia,tegra20-nand";
>> reg = <0x70008000 0x100>;
>> };
>> +
>> + pwm: pwm@7000a000 {
>> + compatible = "nvidia,tegra20-pwm";
>> + reg = <0x7000a000 0x100>;
>> + #pwm-cells = <2>;
>> + };
>> +
>> };
>> diff --git a/doc/device-tree-bindings/pwm/tegra20-pwm.txt
>> b/doc/device-tree-bindings/pwm/tegra20-pwm.txt
>> new file mode 100644
>> index 0000000..bbbeedb
>> --- /dev/null
>> +++ b/doc/device-tree-bindings/pwm/tegra20-pwm.txt
>> @@ -0,0 +1,18 @@
>> +Tegra SoC PWFM controller
>> +
>> +Required properties:
>> +- compatible: should be one of:
>> + - "nvidia,tegra20-pwm"
>> + - "nvidia,tegra30-pwm"
>> +- reg: physical base address and length of the controller's registers
>> +- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
>> + first cell specifies the per-chip index of the PWM to use and the second
>> + cell is the duty cycle in nanoseconds.
>
> This is a mistake in the Linux kernel documentation. The second cell
> specifies the period in nanoseconds, not the duty cycle. I'll fix this
> up in the kernel.
Oh ok, thanks. I will update this patch.
Regards,
Simon
>
> Thierry
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