Dear Wolfgand,
On Mon, Mar 22, 2010 at 10:04 PM, Wolfgang Denk wrote:
> Dear Michael Zaidman,
>
> In message <1269267840-15285-1-git-send-email-michael.zaid...@gmail.com> you
> wrote:
>> Added support for extra ns16550 chip extending total number of
>> supported COMs up to 6. This targets the ca
ethaddr can be optionally read from i2c memory. So, chip_config command supports
reading/writing hw mac id into i2c memory. Placing this code within
CONFIG_CMD_NET as this would only be needed when network interface is configured
Signed-off-by: Vipin Kumar
---
board/spear/common/spr_misc.c | 2
SMI driver fails because of low timeout values. Increasing the erase and write
timeouts to 3 seconds
Signed-off-by: Vipin Kumar
---
drivers/mtd/spr_smi.c|8
include/asm-arm/arch-spear/spr_smi.h |6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --g
These patches add the following changes
1. A bugfix (SMI write, erase timeout increased)
2. read/write of eth macid placed in CONFIG_CMD_NET
3. Network driver support added
4. macb driver configured for spear310 and spear320
Vipin Kumar (4):
SPEAr : SMI erase and write timeouts increased
SPEAr
Signed-off-by: Vipin Kumar
---
board/spear/spear310/spear310.c |9 -
board/spear/spear320/spear320.c |6 +-
include/asm-arm/arch-spear/clk.h | 27 +++
include/configs/spear3xx.h | 21 +
4 files changed, 61 insertions(+),
SPEAr SoCs support a synopsys network peripheral. This patch adds the support
for the same
Signed-off-by: Vipin Kumar
---
board/spear/spear300/spear300.c |6 +
board/spear/spear310/spear310.c |6 +
board/spear/spear320/spear320.c |6 +
board/spear/spear600/
Tom wrote:
> Stefano Babic wrote:
>> The lowlevel_init file contained some hard-coded values
>> to setup the RAM. These board related values are moved into
>> the board configuration file.
>
> Why was only one value cleaned up?
> Just from the patch, there are at least 4 more.
Well, I prefer do n
Hi,
> -Original Message-
> From: u-boot-boun...@lists.denx.de
> [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Stefano Babic
> Sent: 2010年3月17日 0:22
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH] SPI: added support for MX51 to mxc_spi
>
> This patch add support for MX51 pro
hi:
all,i used mpc837x chip and u-boot1.3.3,the uboot could start normally,but
when i use command "tftp" and "bootm" download the linux 2.6.25 uImage and
dtb,the uboot could download these file to RAM.but before uboot transfer
control to linux,it wil execise unlock_ram_in_cache(),which is in
Hi Michal,
> Detlev Zundel wrote:
>> Hi Michal,
>>
>>> Detlev Zundel wrote:
Hi Horst,
> in "lib_microblaze/board.c board_init()" the function
> "env_relocate()" should be called before "getenv_IPaddr()"
> otherwise there is no chance to save an ip-address in the
> enviro
Hi Michael,
> Added support for extra ns16550 chip extending total number of
> supported COMs up to 6. This targets the cases when due to the
> insufficient number of UART ports on the CPU chip designers are
> forced to put additional ns16550 chip on board.
Additionally to Wolfgangs comments, let
Hi Thomas,
On Tuesday 23 March 2010 04:24:08 Thomas Chou wrote:
> This patch adds status polling method to offer an alternative to
> data toggle method for amd flash chips.
>
> This patch is needed for nios2 cfi flash interface, where the bus
> controller performs 4 bytes read cycles for a single
On Mon, Mar 22, 2010 at 10:14 PM, Wolfgang Denk wrote:
> Dear Michael Zaidman,
>
> In message <1269267894-15324-1-git-send-email-michael.zaid...@gmail.com> you
> wrote:
>> Serial loopback internal/external tests. Is based on my previous commit
>> 078a9c4898e7802086b362baa44ad48b8ad1baed
>
> This
> Horst: Give me step-by-step manual how to reach that fault.
Hi Michal,
in 'include/configs/microblaze_generic.h' is ipaddr defined:
#define CONFIG_IPADDR 192.168.0.3
Now run uboot:
setenv ipaddr 192.168.0.1
saveenv
Reboot the board
printenv (tells ipaddr 192.168.0.1)
bdi
Dear "allen.lotus",
In message you wrote:
>
> all,i used mpc837x chip and u-boot1.3.3,the uboot could start
> normally,but when i use command "tftp" and "bootm" download the linux 2.6.25
> uImage and dtb,the uboot could download these file to RAM.but before uboot
> transfer control to linu
Dear Michael Zaidman,
In message <660c0f821003230315i54c79d5au12377695cb85a...@mail.gmail.com> you
wrote:
>
> Sorry, I meant that this patch is based on the "Serial support
> extended up to 6 COMs" patch (See
> http://lists.denx.de/pipermail/u-boot/2010-March/068796.html).
>
> BTW, If one patch
>> With 16 bit flash configurations I suppose the Avalon bus will do four Word
>> reads instead of a single one
Supposedly it will do two Word reads, of course, still resulting in the same
problem.
-Michael
___
U-Boot mailing list
U-Boot@lists.denx.de
I just checked the 2010-03 rc2.
Unfortunatly no NAND support in config file.
I added
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_ENV_IS_IN_NAND 1
but get some errors:
lib_arm/libarm.a(board.o): In function `init_func_i2c':
/opt/src/ub/uboot2010-03-rc2/u-bo
With adding this lines it is working:
#if defined(CONFIG_CMD_NAND)
#define CONFIG_NAND_OMAP_GPMC
#define GPMC_NAND_ECC_LP_x16_LAYOUT1
#define CONFIG_ENV_IS_IN_NAND 1
#elif defined(CONFIG_CMD_ONENAND)
#define CONFIG_ENV_IS_IN_ONENAND1
#endif
It would be nice to add this to con
Dear Wolfgang,
On Tue, Mar 23, 2010 at 1:31 PM, Wolfgang Denk wrote:
[snip]
> Then what is the "uart[t]est" command needed for?
For two reasons:
1) It gets parameters such internal/external loopback and COM number
while "diag run uart" performs only local loopback through all COMs.
Thus, it ca
Horst Gall wrote:
>> Horst: Give me step-by-step manual how to reach that fault.
>
> Hi Michal,
>
> in 'include/configs/microblaze_generic.h' is ipaddr defined:
>#define CONFIG_IPADDR 192.168.0.3
>
> Now run uboot:
>
>setenv ipaddr 192.168.0.1
>saveenv
>
> Reboot the board
>
>
Detlev Zundel wrote:
> Hi Michal,
>
>> Detlev Zundel wrote:
>>> Hi Michal,
>>>
Detlev Zundel wrote:
> Hi Horst,
>
>> in "lib_microblaze/board.c board_init()" the function
>> "env_relocate()" should be called before "getenv_IPaddr()"
>> otherwise there is no chance to save
>
> With adding this lines it is working:
>
> #if defined(CONFIG_CMD_NAND)
> #define CONFIG_NAND_OMAP_GPMC
> #define GPMC_NAND_ECC_LP_x16_LAYOUT1
> #define CONFIG_ENV_IS_IN_NAND 1
> #elif defined(CONFIG_CMD_ONENAND)
> #define CONFIG_ENV_IS_IN_ONENAND 1
> #endif
Please submit
Signed-off-by: Scott McNutt
---
lib_nios2/board.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/lib_nios2/board.c b/lib_nios2/board.c
index 41d3297..8ec66a3 100644
--- a/lib_nios2/board.c
+++ b/lib_nios2/board.c
@@ -139,6 +139,13 @@ void board_init (void)
Dear list,
I am trying to get ethernet to work on my custom MCF54455 board
and having some trouble.
I have a DP83848J PHY connected in MII mode to each of the FEC0
and FEC1 ports (seperate MDIO connection). Both PHYs are set to
address 0x0. *)
In my config (basically copied from M54455EVB), I se
Dear Michael Zaidman,
In message <660c0f821003230108t579e90femaac28b937e043...@mail.gmail.com> you
wrote:
> Dear Wolfgand,
s/d/g/
> All these chips are treated in the same way by this patch. Only
> frequency of crystal oscillator or external clock can differs from
> UART ports belonging to CPU.
On Tue, 2010-03-23 at 15:50 +0100, w.weg...@astro-kom.de wrote:
> Dear list,
>
> I am trying to get ethernet to work on my custom MCF54455 board
> and having some trouble.
>
> I have a DP83848J PHY connected in MII mode to each of the FEC0
> and FEC1 ports (seperate MDIO connection). Both PHYs ar
Hi ,
I was exploring the ways to add partition into the blob dynamically.
I followd the following steps.
1) say we have 5 partitions. Flash size is 128mb
norfl...@0,0{
1--
2--
3
5
partit...@f8 {
label = "u_booot";
Dear John,
On 23 Mar 2010 at 10:11, John Schmoller wrote:
> On Tue, 2010-03-23 at 15:50 +0100, w.weg...@astro-kom.de wrote:
> > I have a DP83848J PHY connected in MII mode to each of the FEC0
> > and FEC1 ports (seperate MDIO connection). Both PHYs are set to
> > address 0x0. *)
>
> Are you sure
Achim Ehrlich wrote:
> This converts the at91 watchdog driver to new c structure
> type to access registers of the SoC
>
> Signed-off-by: Achim Ehrlich
Applied to arm/next
Thanks
Tom
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mai
Wolfgang,
As long as you are not using only one FEC's mdio/mdc to communicate the
both PHY at address 1.
Best Regards,
TsiChung
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of w.weg...@astro-kom.de
Sent: Tuesday, March 23, 2010 1
On Thu, Mar 04, 2010 at 04:02:31PM +0530, Vipin KUMAR wrote:
> Hi All,
>
> This query is wrt NAND 8/16 bit device support at runtime. Currently,
> the u-boot code can support only one of these at a time.
>
> Although the NAND device in itself can be recognized by reading the
> device id, the NAND
Dear Wolfgang,
On Tue, Mar 23, 2010 at 5:04 PM, Wolfgang Denk wrote:
> Dear Michael Zaidman,
>
> In message <660c0f821003230108t579e90femaac28b937e043...@mail.gmail.com> you
> wrote:
>
>> All these chips are treated in the same way by this patch. Only
>> frequency of crystal oscillator or extern
Wolfgang,
On 3/21/2010 1:38 PM, Wolfgang Denk wrote:
> Dear Ben,
>
> In message<3270dcac1b1540c7b13d9bc718f54...@smartbridges.com> Teh Kok How
> wrote:
>
>> Fixes: Board_eth_init() calls pci_eth_init() (include/netdev.h) and if
>> ethernet is soc, CONFIG_PCI is not defined, pci_eth_init() ret
On 3/22/2010 3:05 PM, TsiChung Liew wrote:
> Fix incorrect default environment for flash erase or protect
> range. Change offset from 0 to 0xff80. Remove default
> ethernet setup and MAC address.
>
> Signed-off-by: TsiChung Liew
>
Acked-by: Ben Warren
> ---
> include/configs/M5253DEMO.h
On 3/22/2010 3:05 PM, TsiChung Liew wrote:
> Provide extra environment Data. Remove default network
> address and MAC address.
>
> Signed-off-by: TsiChung Liew
>
Acked-by: Ben Warren
> ---
> include/configs/M5275EVB.h | 22 +-
> 1 files changed, 17 insertions(+), 5 del
Add initial support for Matrix Vision mvSMR board based on MPC5200B.
Signed-off-by: Andre Schwarz
---
CREDITS |2 +-
MAINTAINERS |1 +
MAKEALL |1 +
Makefile |5 +
board
Hi Vipin,
On 3/23/2010 1:30 AM, Vipin KUMAR wrote:
> SPEAr SoCs support a synopsys network peripheral. This patch adds the support
> for the same
>
>
> Signed-off-by: Vipin Kumar
> ---
> board/spear/spear300/spear300.c |6 +
> board/spear/spear310/spear310.c |6 +
>
On 3/22/10 11:23 AM, Stefan Roese wrote:
>
> Currently I see 2 approaches to support NOR FLASH mapped via a cached memory
> region in the common CFI driver:
>
> a) Use write-through cache support (if possible) and add required cache
>handling calls (invalidate and flush) at the "correct locati
On Sat, Mar 20, 2010 at 07:02:58PM +0100, Florian Fainelli wrote:
> On Friday 19 March 2010 23:02:11 Scott Wood wrote:
> > You're changing the behavior in case the user presses y and then does
> > something other than hit return. You won't set scrub = 1, but you'll
> > continue with the erase rath
The following changes since commit 859500a2be94bfa77a845b9c8a4c499587035fd5:
Wolfgang Denk (1):
Merge remote branch 'origin/master' into next
are available in the git repository at:
git://git.denx.de/u-boot-nand-flash.git next
Cyril Chemparathy (1):
TI: Davinci: NAND Driver Cle
Dear Ben Warren,
In message <4ba8f738.3050...@gmail.com> you wrote:
> >>
> > Do you have this patch in your queue?
> >
> No, I don't. This patch is wrong, and I believe I already responded
> about it. The code does need a subtle clean-up, but I haven't quite
> found the time to do it
Dear Semih Hazar,
In message <4ba8fd4e.9080...@indefia.com> you wrote:
>
> I'm not the expert on the AVR32 memory architecture, but as far as I
> know it goes like this for the NOR Flash area:
> The Flash is mapped at the physical address at 0x0 and this region is
> cached.
> This same memory regi
Applied.
Thanks,
--Scott
Thomas Chou wrote:
> This patch adds the driver of altera spi controller, which is also
> used as epcs/spi flash controller.
>
> With the spi_flash driver, they can replace the epcs driver at
> cpu/nios2/epcs.c.
>
> Signed-off-by: Thomas Chou
> ---
> drivers/spi/Makefi
Hi Wolfgang,
On 3/23/2010 12:52 PM, Wolfgang Denk wrote:
> Dear Ben Warren,
>
> In message<4ba8f738.3050...@gmail.com> you wrote:
>
>>> Do you have this patch in your queue?
>>>
>>>
>> No, I don't. This patch is wrong, and I believe I already responded
>> about it
On Monday 22 March 2010 23:36:19 Thomas Chou wrote:
> +#include
> +#include
> +#include
> +#include
> +#include
side note, but am i the only one who thinks nios headers in include/ is bad
mojo ?
> +static nios_spi_t *nios_spi = (nios_spi_t *)CONFIG_SYS_SPI_BASE;
shouldnt this be based on t
> On Monday 22 March 2010 23:36:19 Thomas Chou wrote:
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>
> side note, but am i the only one who thinks nios headers in include/ is bad
> mojo ?
No. It's definitely bad mojo ... and has been for years (along with
many other head
Hi,
U-Boot v2010.03-rc2 has been released.
Summary status (as far as I know so far):
- PowerPC:
Looks mostly acceptable; main issues are with all the boards using
Marvell 64260 (EVB64260, P3G4, ZUMA, ...) plus the "ml300" board,
which is 1) seriously broken and 2) unmaintained.
If some
On Tuesday 23 March 2010 18:32:35 Wolfgang Denk wrote:
> U-Boot v2010.03-rc2 has been released.
>
> Summary status (as far as I know so far):
Blackfin looks good now
-mike
signature.asc
Description: This is a digitally signed message part.
___
U-Boot
From: Renato Andreola
With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000.
Signed-off-by: Alessandro Rubini
Signed-off-by: Renato Andreola
---
drivers/mtd/cfi_flash.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers
From: Renato Andreola
With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000.
Signed-off-by: Alessandro Rubini
Signed-off-by: Renato Andreola
---
drivers/mtd/cfi_flash.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c b/drivers
This patch adds status polling method to offer an alternative to
data toggle method for amd flash chips.
This patch is needed for nios2 cfi flash interface, where the bus
controller performs 4 bytes read cycles for a single byte read
instruction. The data toggle method can not detect chip busy
sta
On 03/23/2010 06:12 PM, Stefan Roese wrote:
> Hi Thomas,
>
> On Tuesday 23 March 2010 04:24:08 Thomas Chou wrote:
>
>> This patch adds status polling method to offer an alternative to
>> data toggle method for amd flash chips.
>>
>> This patch is needed for nios2 cfi flash interface, where the
On 03/23/2010 06:39 PM, Michael Schnell wrote:
>>> With 16 bit flash configurations I suppose the Avalon bus will do four Word
>>> reads instead of a single one
>>>
> Supposedly it will do two Word reads, of course, still resulting in the same
> problem.
>
Hi Michael,
The write cycle
This patch adds bootargs passing to nios2 linux.
The args passing is enabled with,
r4 : 'NIOS' magic
r5 : pointer to initrd start
r6 : pointer to initrd end
r7 : pointer to command line
Signed-off-by: Thomas Chou
---
lib_nios2/bootm.c | 19 ---
1 files changed, 12 insertions(+
This patch fixes the following compilerwarning,
if compiling u-boot for the suen3 board:
$ ./MAKEALL suen3
jffs2_1pass.c: In function 'get_fl_mem':
jffs2_1pass.c:399: warning: unused variable 'id'
jffs2_1pass.c: In function 'get_node_mem':
jffs2_1pass.c:423: warning: unused variable 'id'
Signed-o
If we relocate the code, the data cache must be flushed before
we jump to the new code.
Signed-off-by: Thomas Chou
---
cpu/nios2/start.S | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/cpu/nios2/start.S b/cpu/nios2/start.S
index 4b4c560..b0a51a8 100644
--- a/c
This patch ports the opencore 10/100 ethernet mac driver ethoc.c
from linux kernel to u-boot.
Signed-off-by: Thomas Chou
---
drivers/net/Makefile |1 +
drivers/net/ethoc.c | 536 ++
include/netdev.h |1 +
3 files changed, 538 insertio
This driver supports the Altera triple speeds 10/100/1000 ethernet
mac.
Signed-off-by: Thomas Chou
---
drivers/net/Makefile |1 +
drivers/net/altera_tse.c | 977 ++
include/altera_tse.h | 512
include/netdev.h
This function return cache-line aligned allocation which is mapped
to uncached io region.
Signed-off-by: Thomas Chou
---
include/asm-nios2/dma-mapping.h | 21 +
1 files changed, 21 insertions(+), 0 deletions(-)
create mode 100644 include/asm-nios2/dma-mapping.h
diff --git
60 matches
Mail list logo