From: Yuan Yao
The default configuration for QSPI AHB bus can't support 16MB+.
But some flash on NXP layerscape board are more than 16MB.
Signed-off-by: Yuan Yao
---
Changed in v3:
Rename the CONFIG_SYS_QSPI_ADDR to SYS_FSL_QSPI_ADDR.
Changed in v2:
Remov
From: Yuan Yao
The default configuration for QSPI AHB bus can't support 16MB+.
But some flash on NXP layerscape board are more than 16MB.
Signed-off-by: Yuan Yao
---
Changed in v2:
Remove the CONFIG_QSPI_AHB_INIT into Kconfig.
---
arch/arm/cpu/armv8/fsl-layerscape/Kc
From: Yuan Yao
Add the name for register space and memory space.
<0x155 0x1 > is the QSPI register space.
<0x4000 0x400> is the QSPI memory space.
Signed-off-by: Yuan Yao
---
Changed in v2:
Updated the commit message.
---
arch/arm/dts/ls1021a.dtsi | 1 +
1
From: Yuan Yao
Signed-off-by: Yuan Yao
---
Changed in v3:
Rename README.deploy to README.qspi
Changed in v2:
Move the readme for QSPI deploy out of only for ls2080aqds.
---
arch/arm/cpu/armv8/fsl-layerscape/doc/README.qspi | 42 +++
1 file changed, 42
From: Yuan Yao
Change core clock to 1.2GHz in the configurations for SD and NAND boot.
Signed-off-by: Yuan Yao
---
Changed in v2:
Updated the commit message.
---
board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg| 2 +-
board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg | 4
From: Yuan Yao
LS1021A is working stability with 1.2GHZ, so as a performance
requirements we can improve the core frequency to 1.2GHZ for
SD boot and NAND boot.
Signed-off-by: Yuan Yao
---
board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg| 2 +-
board/freescale/ls1021aqds
From: Yuan Yao
Signed-off-by: Yuan Yao
---
Changed in v2:
Move the readme for QSPI deploy out of only for ls2080aqds.
---
.../arm/cpu/armv8/fsl-layerscape/doc/README.deploy | 44 ++
1 file changed, 44 insertions(+)
create mode 100644 arch/arm/cpu/armv8/fsl
From: Yuan Yao
The default configuration for QSPI AHB bus can't support 16MB+.
But some flash on NXP layerscape board are more than 16MB.
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c| 37 ++
.../include/asm/arch-fsl-layerscape/immap_
From: Yuan Yao
Signed-off-by: Yuan Yao
---
board/freescale/ls2080aqds/README | 35 +++
1 file changed, 35 insertions(+)
diff --git a/board/freescale/ls2080aqds/README
b/board/freescale/ls2080aqds/README
index f288750..0f7446a 100644
--- a/board/freescale
From: Yuan Yao
Add the address value and size value name for QSPI dts node.
Signed-off-by: Yuan Yao
---
arch/arm/dts/ls1021a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 119b1af..37be169 100644
--- a/arch/arm/dts
From: Yuan Yao
There is the stmicro DSPI flash on LS12080ARDB.
Enable DSPI flash related configure options.
Signed-off-by: Yuan Yao
---
include/configs/ls2080ardb.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index b93e919
From: Yuan Yao
The QSPI support the direct 4bytes address command for flash
read/write/erase.
And the address can cover the whole QSPI memory space.
Signed-off-by: Yuan Yao
---
drivers/spi/fsl_qspi.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/spi
From: Yuan Yao
The QSPI flash on LS1046A is 64MB, and don't support BAR.
Signed-off-by: Yuan Yao
---
include/configs/ls1046ardb.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 693cc8d..3322953 1
From: Yuan Yao
Some new flash don't support bar register but use 4bytes address to
support exceed 16MB flash size.
So add flash flag:
ADDR_4B
for some flash which support 4bytes address.
Signed-off-by: Yuan Yao
---
drivers/mtd/spi/sf_internal.h | 4 +++-
drivers/mtd/spi/sf_params.c
From: Yuan Yao
The QSPI flash on LS1012A is 64MB, and don't support BAR.
Signed-off-by: Yuan Yao
---
include/configs/ls1012a_common.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 5f
From: Yuan Yao
Some new flash don't support bar but use 4bytes address to direct
support exceed 16MB flash size. So add flash flag:
ADDR_4B
for some flash which support 4bytes address.
Yuan Yao (4):
sf: add ADDR_4B for 4byte address support
spi: fsl_qspi: Add 4bytes address support
From: Yuan Yao
When QSPI is enabled, NOR flash and QIXIS can't be accessed
through IFC due to pin mux.
So enable I2C QIXIS access and I2C early init to read the
sysclk and ddrclk.
Signed-off-by: Yuan Yao
---
Changed in v5:
Use I2C to read the clocks instead of the hard-coded c
From: Yuan Yao
Add QSPI controller and slave dts node for LS2080AQDS board.
Signed-off-by: Yuan Yao
---
arch/arm/dts/fsl-ls2080a-qds.dts | 14 ++
arch/arm/dts/fsl-ls2080a.dtsi| 10 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b
From: Yuan Yao
The Freescale QSPI driver has been converted to Driver Model.
This patch enable FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.
Signed-off-by: Yuan Yao
---
Changed in v6:
Add CONFIG_CMD_SF in defconfig.
---
configs/ls2080aqds_nand_defconfig | 9
From: Yuan Yao
In order to access QSPI flash we must asserted ISO allowing
the DUT to access the full IFC domain.
But deasserted the unused ISO will allowing maximum performance.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
board/freescale
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Signed-off-by: Yuan Yao
---
Changed in v6:
Add CONFIG_CMD_SF in defconfig.
Changed in v4
From: Yuan Yao
Freescale QSPI and DSPI driver have been converted to Driver Mode.
This converting bring dtb file for u-boot and this increase the size
of u-boot image.
LS2080A nand boot use SPL framework.
This patch increase the size of image load from NAND to RAM in SPL.
Signed-off-by: Yuan
From: Yuan Yao
Enable QSPI flash related configure options.
Signed-off-by: Yuan Yao
---
Changed in v6:
remove CONFIG_CMD_SF.
---
include/configs/ls2080aqds.h | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls2080aqds.h b/include
From: Yuan Yao
The NOR flash related configure options also appear in ls2080aqds.h and
ls2080ardb.h, and the two files all have included ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao
---
include/configs/ls2080a_common.h | 7
From: Yuan Yao
QSPI module output SCLK divisor value is configured through SCFG.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm
From: Yuan Yao
Add early i2c init function with conservative divider when the exact
clock rate is not available.
Signed-off-by: Yuan Yao
---
New add in v3.
---
drivers/i2c/i2c_core.c | 5 +
drivers/i2c/mxc_i2c.c | 27 +++
include/i2c.h | 3 +++
3 files
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Yuan Yao (10):
drivers: i2c: mxc: Add early init
armv8: ls2080aqds: Select QSPI CLK div via SCFG
From: Yuan Yao
The Freescale QSPI driver has been converted to Driver Model.
This patch enable FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.
Signed-off-by: Yuan Yao
---
configs/ls2080aqds_nand_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a
From: Yuan Yao
Freescale QSPI and DSPI driver have been converted to Driver Mode.
This converting bring dtb file for u-boot and this increase the size
of u-boot image.
LS2080A nand boot use SPL framework.
This patch increase the size of image load from NAND to RAM in SPL.
Signed-off-by: Yuan
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Signed-off-by: Yuan Yao
---
Changed in v4:
Merged the below patch into one:
board
From: Yuan Yao
Add QSPI controller and slave dts node for LS2080AQDS board.
Signed-off-by: Yuan Yao
---
arch/arm/dts/fsl-ls2080a-qds.dts | 14 ++
arch/arm/dts/fsl-ls2080a.dtsi| 10 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b
From: Yuan Yao
In order to access QSPI flash we must asserted ISO allowing
the DUT to access the full IFC domain.
But deasserted the unused ISO will allowing maximum performance.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
board/freescale
From: Yuan Yao
When QSPI is enabled, NOR flash and QIXIS can't be accessed
through IFC due to pin mux.
So enable I2C QIXIS access and I2C early init to read the
sysclk and ddrclk.
Signed-off-by: Yuan Yao
---
Changed in v5:
Use I2C to read the clocks instead of the hard-coded c
From: Yuan Yao
Add early i2c init function with conservative divider when the exact
clock rate is not available.
Signed-off-by: Yuan Yao
---
New add in v3.
---
drivers/i2c/i2c_core.c | 5 +
drivers/i2c/mxc_i2c.c | 27 +++
include/i2c.h | 3 +++
3 files
From: Yuan Yao
Enable QSPI flash related configure options.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 99b0551..f917484 100644
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Yuan Yao (10):
drivers: i2c: mxc: Add early init
armv8: ls2080aqds: Select QSPI CLK div via SCFG
From: Yuan Yao
QSPI module output SCLK divisor value is configured through SCFG.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm
From: Yuan Yao
The NOR flash related configure options also appear in ls2080aqds.h and
ls2080ardb.h, and the two files all have included ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao
---
include/configs/ls2080a_common.h | 7
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Signed-off-by: Yuan Yao
---
Changed in v3:
1, Rebase to lastest code.
2, Give up to
From: Yuan Yao
Freescale QSPI and DSPI driver have been converted to Driver Mode.
This converting bring dtb file for u-boot and this increase the size
of u-boot image.
LS2080A nand boot use SPL framework.
This patch increase the size of image load from NAND to RAM in SPL.
Signed-off-by: Yuan
From: Yuan Yao
In order to access QSPI flash we must asserted ISO allowing
the DUT to access the full IFC domain.
But deasserted the unused ISO will allowing maximum performance.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
board/freescale
From: Yuan Yao
The Freescale QSPI driver has been converted to Driver Model.
This patch enable FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.
Signed-off-by: Yuan Yao
---
configs/ls2080aqds_nand_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a
From: Yuan Yao
When QSPI is enabled, NOR flash and QIXIS can't be accessed through IFC
due to pin mux.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
From: Yuan Yao
Add QSPI controller and slave dts node for LS2080AQDS board.
Signed-off-by: Yuan Yao
---
arch/arm/dts/fsl-ls2080a-qds.dts | 14 ++
arch/arm/dts/fsl-ls2080a.dtsi| 10 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b
From: Yuan Yao
Enable QSPI flash related configure options.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index a14b465..c0c2a97 100644
From: Yuan Yao
Add early i2c init function with conservative divider when the exact
clock rate is not available.
Signed-off-by: Yuan Yao
---
drivers/i2c/i2c_core.c | 5 +
drivers/i2c/mxc_i2c.c | 27 +++
include/i2c.h | 3 +++
3 files changed, 35
From: Yuan Yao
The NOR flash related configure options also appear in ls2080aqds.h and
ls2080ardb.h, and the two files all have included ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao
---
include/configs/ls2080a_common.h | 7
From: Yuan Yao
QSPI module output SCLK divisor value is configured through SCFG.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Yuan Yao (10):
drivers: i2c: mxc: Add early init
armv8: ls2080aqds: Select QSPI CLK div via SCFG
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Signed-off-by: Yuan Yao
---
Changed in v3:
1, Rebase to lastest code.
2, Give up to
From: Yuan Yao
Enable QSPI flash related configure options.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index a14b465..c0c2a97 100644
From: Yuan Yao
QSPI module output SCLK divisor value is configured through SCFG.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm
From: Yuan Yao
Add QSPI controller and slave dts node for LS2080AQDS board.
Signed-off-by: Yuan Yao
---
arch/arm/dts/fsl-ls2080a-qds.dts | 14 ++
arch/arm/dts/fsl-ls2080a.dtsi| 10 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b
From: Yuan Yao
In order to access QSPI flash we must asserted ISO allowing
the DUT to access the full IFC domain.
But deasserted the unused ISO will allowing maximum performance.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
board/freescale
From: Yuan Yao
When QSPI is enabled, NOR flash and QIXIS can't be accessed through IFC
due to pin mux.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
From: Yuan Yao
The Freescale QSPI driver has been converted to Driver Model.
This patch enable FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.
Signed-off-by: Yuan Yao
---
configs/ls2080aqds_nand_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a
From: Yuan Yao
When QSPI boot is used, board FPGA is not accessible from IFC.
To use I2C interface instead, i2c needs to be initialized before knowing
the exact clock rate.
Signed-off-by: Yuan Yao
---
New add in v3.
---
board/freescale/ls2080aqds/ls2080aqds.c | 3 +++
include/configs
From: Yuan Yao
Add early i2c init function with conservative divider when the exact
clock rate is not available.
Signed-off-by: Yuan Yao
---
New add in v3.
---
drivers/i2c/i2c_core.c | 5 +
drivers/i2c/mxc_i2c.c | 27 +++
include/i2c.h | 3 +++
3 files
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Yuan Yao (11):
armv8: ls2080aqds: Select QSPI CLK div via SCFG
configs: ls2080a_common: Remove
From: Yuan Yao
Freescale QSPI and DSPI driver have been converted to Driver Mode.
This converting bring dtb file for u-boot and this increase the size
of u-boot image.
LS2080A nand boot use SPL framework.
This patch increase the size of image load from NAND to RAM in SPL.
Signed-off-by: Yuan
From: Yuan Yao
The NOR flash related configure options also appear in ls2080aqds.h and
ls2080ardb.h, and the two files all have included ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao
---
include/configs/ls2080a_common.h | 7
From: Yuan Yao
The flash type of LS2085AQDS QSPI is S25FS256S.
It has special write any device register command and read any device register
command.
This patch enable support for those commands.
Signed-off-by: Yuan Yao
Signed-off-by: Prabhakar Kushwaha
Signed-off-by: Yuan Yao
---
drivers
From: Yuan Yao
The address value and size value set for QSPI dts node "reg"
property have type of u64 on arm64.
Signed-off-by: Yuan Yao
---
arch/arm/dts/fsl-ls1043a.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/a
From: Yuan Yao
QSPI controller automatic enable the chipselect signal according the dest
AMBA memory address. Now we distribute the AMBA memory zone averagely to
every chipselect slave device according chipselect numbers got from dts
node.
Signed-off-by: Yuan Yao
Signed-off-by: Prabhakar
From: Yuan Yao
The address value and size value get from dts "reg" property have type
of u64 on arm64.
If we assign those values to "u32" variables, driver can't work correctly.
Converting the type of those variables to fdt_xxx_t.
Signed-off-by: Yuan Yao
Signed-o
From: Yuan Yao
The S25FS-S family physical sectors may be configured as a hybrid
combination of eight 4-kB parameter sectors at the top or bottom
of the address space with all but one of the remaining sectors
being uniform size.
The default status of the flash is in this hybrid architecture.
The
From: Yuan Yao
There is the spansion S25FS-S family flash: s25fs256s1
on LS2080QDS QSPI.
Yuan Yao (5):
spi: fsl_qspi: Fix issues on arm64
spi: fsl_qspi: Assign AMBA mem according CS num in dts
spi: fsl_qspi: Enable Spansion S25FS-S family flashes
sf: Disable 4-KB erase command for
From: Yuan Yao
There is the spansion S25FS-S family flash: s25fs256s1
on LS2080QDS QSPI.
Haikun Wang (3):
spi: fsl_qspi: Fix issues on arm64
spi: fsl_qspi: Assign AMBA mem according CS num in dts
spi: fsl_qspi: Enable Spansion S25FS-S family flashes
Yuan Yao (2):
sf: Disable 4-KB erase
From: Yuan Yao
Signed-off-by: Yuan Yao
---
board/freescale/common/qixis.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index 113295f..de9daeb 100644
--- a/board/freescale/common/qixis.c
+++ b
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Signed-off-by: Yuan Yao
---
Changed in v2:
merged the patch:
0009-armv8-ls2080aqds-Enable-QSPI-boot
From: Yuan Yao
Signed-off-by: Yuan Yao
---
board/freescale/ls2080aqds/README | 35 +++
1 file changed, 35 insertions(+)
diff --git a/board/freescale/ls2080aqds/README
b/board/freescale/ls2080aqds/README
index 6ddad92..21e8c7b 100644
--- a/board/freescale
From: Yuan Yao
The Freescale QSPI driver has been converted to Driver Model.
This patch enable FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.
Signed-off-by: Yuan Yao
---
configs/ls2080aqds_nand_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a
From: Yuan Yao
Freescale QSPI and DSPI driver have been converted to Driver Mode.
This converting bring dtb file for u-boot and this increase the size
of u-boot image.
LS2080A nand boot use SPL framework.
This patch increase the size of image load from NAND to RAM in SPL.
Signed-off-by: Yuan
From: Yuan Yao
In order to access QSPI flash we must asserted ISO allowing
the DUT to access the full IFC domain.
But deasserted the unused ISO will allowing maximum performance.
So if we want to access QSPI flash when boot from NAND,
we should use the below board configuration:
Boot Source
From: Yuan Yao
Add QSPI controller and slave dts node for LS2080AQDS board.
Signed-off-by: Yuan Yao
---
arch/arm/dts/fsl-ls2080a-qds.dts | 14 ++
arch/arm/dts/fsl-ls2080a.dtsi| 10 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b
From: Yuan Yao
When QSPI is enabled, NOR flash and QIXIS can't be accessed through IFC
due to pin mux.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
From: Yuan Yao
Enable QSPI flash related configure options.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 3edb0b9..3cba10a 100644
From: Yuan Yao
QSPI module output SCLK divisor value is configured through SCFG.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm
From: Yuan Yao
This series add support for QSPI boot on LS2080AQDS.
Yuan Yao (11):
armv8: ls2080aqds: Select QSPI CLK div via SCFG
configs: ls2080a_common: Remove duplicate NOR configs
configs: ls2080aqds: disable IFC NOR & QIXIS when QSPI enable
configs: ls2080aqds: Enable QSPI f
From: Yuan Yao
The NOR flash related configure options also appear in ls2080aqds.h and
ls2080ardb.h, and the two files all have included ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao
---
include/configs/ls2080a_common.h | 7
From: Yuan Yao
QSPI module output SCLK divisor value is configured through SCFG.
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 +
board/freescale/ls2080aqds/ls2080aqds.c| 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm
From: Yuan Yao
The NOR flash related configure options also appear in ls2080aqds.h and
ls2080ardb.h, and the two files all have included ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao
---
include/configs/ls2080a_common.h | 7
From: Yuan Yao
If we want to access QSPI flash when boot from NAND,
we need below board configuration:
Boot Source ISO1ISO2IBOOT
On-board NAND 1 0 0
IFCCARD NAND0 0 1
Signed-off-by: Yuan Yao
---
arch/arm/include/asm/arch-fsl-layerscape
From: Yuan Yao
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 513a2e3..064e341 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
From: Yuan Yao
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then the booting will start from QSPI memory space.
Signed-off-by: Yuan Yao
---
configs/ls2080aqds_qspi_defconfig | 10 ++
include/configs
From: Yuan Yao
Add QSPI controller and slave dts node for LS2080AQDS board.
Signed-off-by: Yuan Yao
---
arch/arm/dts/fsl-ls2080a-qds.dts | 14 ++
arch/arm/dts/fsl-ls2080a.dtsi| 10 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b
From: Yuan Yao
Signed-off-by: Yuan Yao
---
board/freescale/common/qixis.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index 113295f..de9daeb 100644
--- a/board/freescale/common/qixis.c
+++ b
From: Yuan Yao
Enable QSPI flash related configure options.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 3edb0b9..3cba10a 100644
From: Yuan Yao
Freescale QSPI and DSPI driver have been converted to Driver Mode.
This converting bring dtb file for u-boot and this increase the size
of u-boot image.
LS2080A nand boot use SPL framework.
This patch increase the size of image load from NAND to RAM in SPL.
Signed-off-by: Yuan
From: Yuan Yao
This patch is used for fix the bug below:
/***/
"Synchronous Abort" handler, esr 0x86000210
ELR: fff6cfb4
LR: fff6d3f0
x0 : 0022 x1 : fff78c6f
x2 : ffd0ecb0 x3 :
x4 : f
From: Yuan Yao
The Freescale QSPI driver has been converted to Driver Model.
This patch enable FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.
Signed-off-by: Yuan Yao
---
configs/ls2080aqds_nand_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a
From: Yuan Yao
Yuan Yao (12):
armv8: ls2080aqds: Select QSPI CLK div via SCFG
configs: ls2080a_common: Remove duplicate NOR configs
configs: ls2080aqds: Disable IFC NOR & QIXIS when QSPI
configs: ls2080aqds: Enable QSPI flash support
dm: dts: ls2080aqds: Add QSPI dts node
a
From: Yuan Yao
When QSPI is enabled, NOR Flash and QIXIS can’t be accessed through IFC
due to pin muxing.
Enable QIXIS accessing through I2C.
Signed-off-by: Yuan Yao
---
include/configs/ls2080aqds.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/ls2080aqds.h
As the errata A008336 and A008514 do not apply to all LS series SoCs
(such as LS1021A, LS1043A) we move them to an soc specific file
Signed-off-by: Yuan Yao
---
Changed in v3:
Fix a typo issue.
In function "erratum_a008514"
"#ifdef CONFIG_SYS_FSL_DCSR_DDR2_
This is a workaround for hardware erratum.
Write the value of 63b2_0042h to EDDRTQCFG will optimal the
memory controller performance.
The value: 63b2_0042h comes from the hardware team.
Signed-off-by: Yuan Yao
---
Changed in v2:
Update the write value to 63b2_0042h;
---
arch/arm/cpu
arm: ls1021a: merge SoC specific code in a separate file
arm: ls102xa: enable all the snoop signal for masters.
ls102xa: Enable snoop and DVM message requests.
armv7/fsl-ls102xa: Workaround for DDR erratum A008514
Changed in v2:
Update the write value to 63b2_0042h;
move erratum a008336 an
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv7/ls102xa/soc.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 6036473..97ba6d5 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu
Enable the IP feature's snoop signal to support
hardware snoop for cache coherence.
SNPCNFGCR contains the bits to drive snoop signal
for various masters.
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv7/ls102xa/soc.c | 8
arch/arm/include/asm/arch-ls
Create a soc.c file to put the code for soc special settings.
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv7/ls102xa/Makefile | 1 +
arch/arm/cpu/armv7/ls102xa/soc.c| 66 +
arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h | 12 +
board
Create a soc.c file to put the code for soc special settings.
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv7/ls102xa/Makefile | 1 +
arch/arm/cpu/armv7/ls102xa/soc.c| 66 +
arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h | 12 +
board
1 - 100 of 140 matches
Mail list logo
