From: Yuan Yao <yao.y...@nxp.com>
When QSPI boot is used, board FPGA is not accessible from IFC.
To use I2C interface instead, i2c needs to be initialized before knowing
the exact clock rate.
Signed-off-by: Yuan Yao <yao.y...@nxp.com>
---
New add in v3.
---
board/freescale/ls2080aqds/ls2080aqds.c | 3 +++
include/configs/ls2080aqds.h | 8 ++++----
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
b/board/freescale/ls2080aqds/ls2080aqds.c
index 45dc298..23ebcc1 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -230,6 +230,9 @@ int board_init(void)
int board_early_init_f(void)
{
+#ifdef CONFIG_SYS_I2C_EARLY_INIT
+ i2c_early_init_f();
+#endif
fsl_lsch3_early_init_f();
#ifdef CONFIG_FSL_QSPI
/* input clk: 1/2 platform clk, output: input/20 */
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index adb6901..97afda6 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -21,14 +21,14 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_IMLS
-#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 133333333
#define CONFIG_QIXIS_I2C_ACCESS
#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
-#else
+#define CONFIG_SYS_I2C_EARLY_INIT
+#define CONFIG_SYS_I2C_IFDR_DIV 0x7e
+#endif
+
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
-#endif
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
#define CONFIG_DDR_SPD
--
2.1.0.27.g96db324
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