On Thu 2024-11-14 08:56:36, Tom Rini wrote:
> On Thu, Nov 14, 2024 at 04:02:29AM +, zdi-disclosu...@trendmicro.com
> wrote:
>
> > Hi,
> > Do you have any updates to share regarding this vulnerability report?
>
> Michal, microblaze-generic is the most active platform that enables
> FS_JFFS2 b
Hi!
> > > > > > diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
> > > > > > index 5a5d07b9a7..0232fa84de 100644
> > > > > > --- a/drivers/led/led-uclass.c
> > > > > > +++ b/drivers/led/led-uclass.c
> > > > > > @@ -71,7 +71,9 @@ static int led_post_bind(struct udevice *dev)
> > > >
On Tue 2021-05-18 21:26:40, Tom Rini wrote:
> This board has not been converted to CONFIG_DM_USB by the deadline.
> Remove it.
Given that the board is in a active use and that Pali is actively
working on it... That does not seem like good idea or sensible thing
to do.
Best regards,
le some other unused options
> so CONFIG_USB_TTY can be enabled.
>
> Nokia RX-51 does not have easily accessible UART serial console so the only
> option for easy debugging is to use device's keyboard+screen or this usbtty
> serial console over USB.
>
> Signed-off-by: Pali
between more endpoint cause data loss and unexpected errors.
>
> This patch is fixing transmission of characters over usbtty serial console
> and allow using of usbtty for debugging purposes on Nokia N900.
>
> Signed-off-by: Pali Rohár
6-10: Acked
ble.
>
> This patch is fixing calculation of start address and buffer size to
> minimal value and ensure that it would not overlap with reserved EP0
> buffer.
>
> This issue caused loose of packets on USB bus in both directions and
> basically usbtty was unusable.
>
>
On Mon 2020-11-30 20:10:34, Pali Rohár wrote:
> Those two commands now doing same thing, reading from ext2/3/4 filesystem.
> So remove useless duplicated call.
>
> Signed-off-by: Pali Rohár
Acked-by: Pavel Machek
--
http://www.livejournal.com/~pavelmachek
signature.asc
Desc
Hi!
> > > > >> >entry when CTRL+C is pressed.
> > > > >> >
> > > > >> >It is useful when bootmenu is part of boot process and you want to
> > > > >> >interrupt boot process by scripts which control U-Boot (serial)
> > > > >> >console.
> > > > >>
> > > > >> Wouldn't the escape key be a better choi
On Sat 2020-12-26 20:15:40, Pali Rohár wrote:
> On Saturday 26 December 2020 20:10:10 Heinrich Schuchardt wrote:
> > Am 26. Dezember 2020 20:03:56 MEZ schrieb "Pali Rohár" :
> > >On Saturday 26 December 2020 19:44:23 Heinrich Schuchardt wrote:
> > >> Am 26. Dezember 2020 19:02:25 MEZ schrieb "Pali
erial console so the only
> option for easy debugging is to use device's keyboard+screen or this usbtty
> serial console over USB.
>
> Signed-off-by: Pali Rohár
11-13 Reviewed-by: Pavel Machek
Best regards,
On Sun 2020-11-29 17:52:07, Pali Rohár wrote:
> Function s_init() is called only from lowlevel_init(). So compile it only
> when function lowlevel_init() is compiled.
>
> Signed-off-by: Pali Rohár
Reviewed-by: Pavel Machek
--
http://www.livejournal.com/~pavelmachek
s
On Sun 2020-11-29 17:51:38, Pali Rohár wrote:
> Function lowlevel_init() is called only from cpu_init_crit() and this
> function is wrapped into #if .. #endif section. So compile also
> lowlevel_init() function under same #if condition.
>
> Signed-off-by: Pali Rohár
Reviewed-b
On Sun 2020-11-29 17:49:52, Pali Rohár wrote:
> All debug messages from ep0.c except a few are printed by dbg_ep0() macro.
> So for remaining few exception use also dbg_ep0() instead of serial_printf().
>
> Signed-off-by: Pali Rohár
Reviewed-by: Pavel Machek
--
http://www.liv
t; are not used.
>
> Signed-off-by: Pali Rohár
Reviewed-by: Pavel Machek
--
http://www.livejournal.com/~pavelmachek
signature.asc
Description: Digital signature
into waiting queue.
>
> Implement function musb_peri_tx() which transmit checks when endpoints are
> ready and continue transmitting of waiting queue.
>
> This patch fixes sending e.g. output of printenv command over usbtty serial
> console.
>
> Signed-off-by: Pa
On Sun 2020-11-29 17:46:10, Pali Rohár wrote:
> PERI_RXCSR is 16bit register so store its value into 16bit local variable.
>
> Signed-off-by: Pali Rohár
Reviewed-by: Pavel Machek
--
http://www.livejournal.com/~pavelmachek
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ctions and
> basically usbtty was unusable.
>
> Signed-off-by: Pali Rohár
Reviewed-by: Pavel Machek
--
http://www.livejournal.com/~pavelmachek
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Description: Digital signature
On Sun 2020-11-29 17:46:08, Pali Rohár wrote:
> Without this patch it was done only when U-Boot was compiled with MUSB Host
> Controller. But it is needed also for MUSB Device Controller, otherwise
> Device Controller does not work.
>
> Signed-off-by: Pali Rohár
Reviewed-b
`usbd_device_event_irq'
> arm-linux-gnueabi-ld.bfd: u-boot/drivers/usb/musb/musb_udc.c: undefined
> reference to `usbd_device_event_irq'
> make: *** [Makefile:1762: u-boot] Error 1
>
> Signed-off-by: Pali Rohár
Reviewed-by: Pavel Machek
--
http://www.livejournal.com/~pavelmachek
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Description: Digital signature
lace to make output on usbtty serial console more readable.
>
> Signed-off-by: Pali Rohár
Reviewed-by: Pavel Machek
--
http://www.livejournal.com/~pavelmachek
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Description: Digital signature
On Sun 2020-11-29 17:15:05, Pali Rohár wrote:
> This patch adds a new test which checks that U-Boot for Nokia RX-51 running
> in qemu can print test line to serial console and also checks that test
> line appeared on qemu serial console.
>
> Signed-off-by: Pali Rohár
Reviewed-b
its previous value.
>
> Signed-off-by: Pali Rohár
> Fixes: 8d8c18170325 ("Nokia RX-51: Convert to CONFIG_DM_I2C")
Reviewed-by: Pavel Machek
Best regards,
Pavel
--
http://www.livejournal.com/~pavelmac
gt; This patch fixes that problematic commit and changes 3.0V to 3.3V on all
> remaining places in omap_hsmmc driver.
>
> Fixes: d2c05f50e12f ("mmc: omap_hsmmc: Set 3.3V for IO voltage")
> Signed-off-by: Pali Rohár
Acked-by: Pavel Machek
--
DENX Software Engineering GmbH,
Hi!
> Adding Jean to the loop. Could you please look at this problem? Your
> commit (described below) is causing reboot loop on Nokia N900
> hardware.
I'm not sure Jean is still with TI. You may want to talk to Tomi
Valkeinen if you don't get replies.
Best regards,
On Wed 2020-04-01 00:42:54, Pali Roh??r wrote:
> On Wednesday 01 April 2020 00:35:07 Pali Roh??r wrote:
> > This patch series contain fixes for Nokia RX-51 board (aka N900).
> > After these changes it is possible to run U-Boot in qemu emulator again.
> > And U-Boot can boot kernel image from RAM, e
On Mon 2017-06-12 13:50:00, Darwin Dingel wrote:
> This is a fix made for the fsl_ifc_nand driver on linux kernel by
> Pavel Machek and is applied to uboot. It is currently on applied on
> linux-mtd.
>
> https://patchwork.kernel.org/patch/9758117/
>
> IFC always raises ECC e
Hi!
> Signed-off-by: Marek Behun
> ---
> arch/arm/dts/armada-385-turris-omnia.dts | 428
> +++
> arch/arm/mach-mvebu/Kconfig | 7 +
> board/CZ.NIC/turris_omnia/Makefile | 7 +
> board/CZ.NIC/turris_omnia/kwbimage.cfg | 12 +
> board/CZ.NIC/
Installing u-boot on socfpga is not trivial. Yes, it can be done with
dd, but it is easy to make a typo and destroy a partition. Introduce a
script that knows how to install all the copies, and actually checks
signatures so that killing data is not trivial.
Signed-of-by: Pavel Machek
diff --git
Fix english, use "SoCFPGA" spelling, add pointer for help with installation.
Signed-off-by: Pavel Machek
diff --git a/doc/README.socfpga b/doc/README.socfpga
index cfcbbfe..b43704e 100644
--- a/doc/README.socfpga
+++ b/doc/README.socfpga
@@ -
Hi!
> > > > > /* Environment for SDMMC boot */
> > > > > #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET)
> > > > > -#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
> > > > > -#define CONFIG_ENV_OFFSET512 /* just after the
> > > > > MBR
> > > >
Hi!
> > Bah, lemme correct myself. MIPS* and PowerPC fail due to sleep taking
> > slightly too long. x86 is the only one where it's just way too fast.
> > But this is not true once Linux itself is up.
> >
>
> U-Boot uses x86 TSC timer as the delay timer. Right now the timer
> frequency is hard-
Hi!
> > We don't support quad mode in U-Boot . You mean not entering Quad mode
> > in Linux ?
> >
>
> Nope, there seems to be quad support in u-boot, from spi_flash.c (my patched
> version):
>
> #ifndef CONFIG_SPL_BUILD
> /* Look for the fastest read cmd */
> cmd = fls(params->e_rd
On Tue 2016-06-21 14:32:42, Masahiro Yamada wrote:
> This recently added board missed the tree-wide migration of
> CONFIG_BOOTDELAY.
>
> Signed-off-by: Masahiro Yamada
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pic
This adds support for IS1 board. Pretty usual socfpga board,
256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
additional ethernet ports connected to the FPGA.
Signed-off-by: Pavel Machek
---
v2: add diffstat
v3: fixes from review, add empty socfpga.c to make build
This adds support for IS1 board. Pretty usual socfpga board,
256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
additional ethernet ports connected to the FPGA.
Signed-off-by: Pavel Machek
---
v2: add diffstat
v3: fixes from review, add empty socfpga.c to make build system
Hi!
> > --- /dev/null
> > +++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
> > @@ -0,0 +1,109 @@
> > +/*
> > + * Copyright (C) 2012 Altera Corporation
>
> This copyright notice needs to be updated.
How? dts is probably not copyrightable, and my changes are certainly
not complex enough for copyright
On Mon 2016-05-30 10:43:39, Fabio Estevam wrote:
> On Mon, May 30, 2016 at 5:33 AM, Pavel Machek wrote:
>
> > Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:
> >
> > offset 0x4 is protected and cannot be erased
> > => sf help
>
This adds support for IS1 board. Pretty usual socfpga board,
256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
additional ethernet ports connected to the FPGA.
Signed-off-by: Pavel Machek
---
v2: add diffstat
arch/arm/dts/Makefile |1
arch/arm/dts
Hi!
There's one more "funny" thing I see with SPI: SPL fails to boot if I
let it do full probing, or if I allow it to do reads in big chunks
(that may be explained by watchdog, I'll investigate it some more).
This makes SPL work for me, but I guess I'd like to understand why.
Ideas welcome.
Bes
This adds support for IS1 board.
Signed-off-by: Pavel Machek
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 92c7545..a397c69 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -102,6 +102,7 @@ dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
dtb
Hi!
It seems include/configs/socfpga_sr1500.h is missing a ","...
-#define CONFIG_BOOTARGS "console=ttyS0" __stringify(CONFIG_BAUDRATE)
+#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
Best regards,
spl_init(), which sets the GD_FLG_SPL_INIT
> flag.
>
> Note that reserving the malloc area in RAM is not a problem even
> if the GD_FLG_SPL_INIT flag is not set.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Hans de Goede
> Cc:
On Mon 2016-05-30 17:22:34, Marek Vasut wrote:
> Enable both features to reduce the SPL size by 6 kiB.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
Acked-by: Pavel Machek
Tested-by: Pavel
On Mon 2016-05-30 10:43:39, Fabio Estevam wrote:
> On Mon, May 30, 2016 at 5:33 AM, Pavel Machek wrote:
>
> > Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:
> >
> > offset 0x4 is protected and cannot be erased
> > => sf help
>
Debugging SPL is hard, and if SPL is too big, it tends to crash in
mysterious ways.
(I'm not sure what the exact threshold is, 49762 bytes works, 52426
bytes does not, so 5 should be good value).
Signed-off-by: Pavel Machek
---
> Please use CONFIG_SPL_MAX_*
Ok, that's simp
I did the following to fix it up. It still might be problem with some
of my local changes, but you might want to test compile.
Thanks,
Pavel
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 6a0e971..1
On Mon 2016-05-30 05:21:28, Stefan Roese wrote:
> Hi Pavel,
>
> On 29.05.2016 22:40, Pavel Machek wrote:
> >Hi!
> >
> >On board with Altera Cyclone 5:
> >
> >=> version
> >
> >U-Boot 2016.01-05658-g81689ec (May 29 2016 - 22:25:45 +0200)
> &
Hi!
> Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:
>
> offset 0x4 is protected and cannot be erased
> => sf help
> No SPI flash selected. Please run `sf probe'
> => sf probe
> ...
> SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total
> 64 MiB
>
On Mon 2016-05-30 05:21:28, Stefan Roese wrote:
> Hi Pavel,
>
> On 29.05.2016 22:40, Pavel Machek wrote:
> >Hi!
> >
> >On board with Altera Cyclone 5:
> >
> >=> version
> >
> >U-Boot 2016.01-05658-g81689ec (May 29 2016 - 22:25:45 +0200)
> &
Hi!
On board with Altera Cyclone 5:
=> version
U-Boot 2016.01-05658-g81689ec (May 29 2016 - 22:25:45 +0200)
arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
Saving Environment to SPI Flash...
spi_flash_std_probe: slave=0bf367d0, cs=0
SF: Detected N25Q512 with page size 256 Bytes, era
Debugging SPL is hard, and if SPL is too big, it tends to crash in
mysterious ways.
(I'm not sure what the exact threshold is, 49762 bytes works, 52426
bytes does not, so 5 should be good value).
Signed-off-by: Pavel Machek
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
Hi!
If I do "make socfpga_cyclone5_config" and then build u-boot-SPL, it
results in SPL that is way too big (49K is biggest image that works in
my testing).
pavel@amd:~/stahl/u-boot$ ls -al spl/u-boot-spl*
-rwxr-xr-x 1 pavel pavel 888587 May 27 23:03 spl/u-boot-spl
-rw-r--r-- 1 pavel pavel 55486
Hi!
> The indirect write code is buggy pile of nastiness which fails horribly
> when the system runs fast enough to saturate the controller. The failure
> results in some pages (256B) not being written to the flash. This can be
> observed on systems which run with Dcache enabled and L2 cache enabl
Hi!
> This patch replaces the whole unmaintainable indirect write implementation
> with the one from upcoming Linux CQSPI driver, which went through multiple
> rounds of thorough review and testing. While this makes the patch look
> terrifying and violates all best-practices of software developmen
Hi!
> >Hi!
> >
> >>Warning (unit_address_vs_reg): Node /soc/usbphy@0 has a unit name,
> >> but no reg property
> >
> >I don't know who produces the warnings, but perhaps fix the tool,
> >instead?
>
> This warnigns poping up with new DTC compilers, introduced from dtc
> commit:
IMO compiler shou
Hi!
> Warning (unit_address_vs_reg): Node /soc/usbphy@0 has a unit name,
> but no reg property
I don't know who produces the warnings, but perhaps fix the tool,
instead?
> @@ -9,5 +9,5 @@
> #size-cells = <1>;
> chosen { };
> aliases { };
> - memory { device_type = "memory"
On Thu 2016-04-07 04:04:05, Marek Vasut wrote:
> Just staticize global variables in sequencer, since there is no
> point in having these symbols available outside of the DDR code.
>
> Signed-off-by: Marek Vasut
> Cc: Dinh Nguyen
> Cc: Chin Liang See
Acked-by: Pavel Machek
Hi!
> On 20.01.2016 10:31, Pavel Machek wrote:
> >I'm loading u-boot using tftp from u-boot 2013.01. Marek will claim
> >that this configuration is unsupported, but it enables fairly quick
> >development and was very useful for me in past.
>
> Yes, I use this ch
Hi!
> I'm loading u-boot using tftp from u-boot 2013.01. Marek will claim
> that this configuration is unsupported, but it enables fairly quick
> development and was very useful for me in past.
>
> Unfortunately, it stopped working between 2016.01-rc1 and -rc4. Before
> I start bisecting it, I wa
Hi!
I'm loading u-boot using tftp from u-boot 2013.01. Marek will claim
that this configuration is unsupported, but it enables fairly quick
development and was very useful for me in past.
Unfortunately, it stopped working between 2016.01-rc1 and -rc4. Before
I start bisecting it, I wanted to ask
> > > Pristine u-boot 2016.01-rc4 compiles fine for CV SoCDK. Can you please
> > > test mainline _before_ reporting issues ?
> >
> > Can you please test mainline before complaining?
>
> Yes I _did_ test mainline AND booted it on the actual board. The USB does work
> (if you disable dcache, which
On Sun 2016-01-10 14:45:54, Marek Vasut wrote:
> On Sunday, January 10, 2016 at 01:04:17 PM, Pavel Machek wrote:
> > On Sun 2016-01-10 12:56:15, Pavel Machek wrote:
> > > Hi!
> > >
> > > After updating from 2016-rc1, I get this compile error:
> > > C
On Sun 2016-01-10 12:56:15, Pavel Machek wrote:
> Hi!
>
> After updating from 2016-rc1, I get this compile error:
>
> CC common/main.o
> drivers/usb/host/dwc2.c: In function 'usb_lowlevel_init':
> drivers/usb/host/dwc2.c:1028:40: error: 'CONFIG_USB_
Hi!
After updating from 2016-rc1, I get this compile error:
CC common/main.o
drivers/usb/host/dwc2.c: In function 'usb_lowlevel_init':
drivers/usb/host/dwc2.c:1028:40: error: 'CONFIG_USB_DWC2_REG_ADDR'
undeclared (first use in this function)
priv->regs = (struct dwc2_core_regs *)
Hi!
> > I presume you are referring to SPL? FYI, I am still using the SPL from
> > SOCEDS while using latest U-Boot from mainstream. That's why I didn't
> > the issue noticed by Shengjiang and you.
>
> Well, at least you're honest ... but *sigh*, it'd be nice if you tested
> mainline only, really
On Tue 2015-12-22 08:59:46, Chin Liang See wrote:
> Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI
> and UBIFS support on serial NOR flash
>
> Signed-off-by: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Dinh Nguyen
> Cc: Pavel Machek
> Cc: Marek Vasut
> Cc: Stefan Ro
env20x0004 0x0014 0
> > 3: UBI 0x03e8 0x0018 0
> > 4: boot0x00e8 0x0018 0
> > 5: rootfs 0x0100 0x0100 0
> >
> > Signed-off-by: Chin Lian
On Mon 2015-12-21 11:12:29, Marek Vasut wrote:
> On Monday, December 21, 2015 at 10:37:23 AM, Pavel Machek wrote:
> > On Mon 2015-12-21 07:33:34, 圣江 吴 wrote:
> > > Hi Marek Vasut,
> > >
> > >
> > > On Dec 18, 2015, at 04:50 AM, Marek Vasut wrote:
&g
On Mon 2015-12-21 07:33:34, 圣江 吴 wrote:
> Hi Marek Vasut,
>
>
> On Dec 18, 2015, at 04:50 AM, Marek Vasut wrote:
>
> On Friday, December 18, 2015 at 08:57:22 AM, 圣江 吴 wrote:
> Hi Chin,
>
> The PLL settings are copied from previous version
> http://git.rocketboards.org/u-boot-socfpga.git,
>
>
-off-by: shengjiangwu
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Dinh Nguyen
> Cc: Pavel Machek
> Cc: Marek Vasut
> Cc: Stefan Roese
> ---
> Changes for v2:
> - fixed wrong perpll for QSPI
> ---
> board/altera/cyclone5-socdk/qts/pll_config.h | 2 +-
> 1 fil
On Mon 2015-12-14 13:20:28, Marek Vasut wrote:
> On Monday, December 14, 2015 at 12:51:16 PM, Pavel Machek wrote:
> > On Mon 2015-12-14 12:31:32, Marek Vasut wrote:
> > > On Monday, December 14, 2015 at 12:26:39 PM, Pavel Machek wrote:
> > > > On Mon 2015-12-
On Mon 2015-12-14 12:31:32, Marek Vasut wrote:
> On Monday, December 14, 2015 at 12:26:39 PM, Pavel Machek wrote:
> > On Mon 2015-12-14 12:09:08, Marek Vasut wrote:
> > > On Monday, December 14, 2015 at 08:54:38 AM, Pavel Machek wrote:
> > > > (Please,
On Mon 2015-12-14 12:09:08, Marek Vasut wrote:
> On Monday, December 14, 2015 at 08:54:38 AM, Pavel Machek wrote:
> > (Please, trim your emails when replying)
> > > Try this:
> > >
> > > mtdparts=1m(u-boot),256k(env1),256k(env2),14848k(boot),112m(root),-@1536
(Please, trim your emails when replying)
On Mon 2015-12-14 01:58:04, Marek Vasut wrote:
> On Monday, December 14, 2015 at 01:43:58 AM, Chin Liang See wrote:
> > On Mon, 2015-12-14 at 01:22 +0100, Marek Vasut wrote:
> > > On Monday, December 14, 2015 at 01:11:27 AM, Chin Liang See wrote:
> > > > On
Hi!
> This patch has several effects:
>
> - it selects proper ARMv7 translation table level 1 bit definitions;
> - it provides proper ARMv7 definitions for WT/WB/WA;
> - it selects proper ARMv7 settings for TTBR0.
>
> All these are correct as per the docs I have (although I may have missed
> som
On Sat 2015-12-12 08:47:41, Chin Liang See wrote:
> Enabling the support of storing U-Boot environment
> within serial NOR flash. By default, its still
> store into SDMMC
>
> Signed-off-by: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Dinh Nguyen
> Cc: Pavel Machek
> Cc
On Fri 2015-12-11 17:15:50, Chin Liang See wrote:
> Enabling mtd partitioning layout which indicate partition
> for various boot partition
>
> Signed-off-by: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Dinh Nguyen
> Cc: Pavel Machek
> Cc: Marek Vasut
> Cc: Stefan Roes
Hi!
I'm getting quite crazy behaviour of variables in recent u-boot:
VERSION = 2016
PATCHLEVEL = 01
SUBLEVEL =
EXTRAVERSION = -rc1
Bytes transferred = 104656 (198d0 hex)
=> bootm_boot_mode=nonsec
=> echo $bootm_boot_mode
nonsec
=> prinetenv bootm_boot_mode
Unknown command 'prinetenv' - try 'hel
> > > > Usage:
> > > > ubifsmount
> > > >
> > > > - mount 'volume-name' volume
> > > >
> > > > In the mean time, I was not able to get ubifsmount works.
> > > > Appreciate
> > > > for any quick advise? Else will look into the code tomorrow as my
> > > > bed
> > > > is calling me :)
> > >
>
On Sun 2015-12-06 21:19:56, Thomas Chou wrote:
> Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB
> from legacy board header files.
>
> This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE
> are selected.
>
Acked-by: Pavel Machek
Tested-by: Pav
On Sat 2015-12-05 18:54:01, Marek Vasut wrote:
> On Saturday, December 05, 2015 at 06:25:19 PM, Pavel Machek wrote:
> > On Sat 2015-12-05 15:04:25, Marek Vasut wrote:
> > > On Saturday, December 05, 2015 at 08:50:39 AM, Pavel Machek wrote:
> > > > CONFIG_PHYLIB is al
On Sat 2015-12-05 15:04:25, Marek Vasut wrote:
> On Saturday, December 05, 2015 at 08:50:39 AM, Pavel Machek wrote:
> > CONFIG_PHYLIB is already set by the config system
>
> Where exactly is it set by the config system ?
>
> > don't set it again.
> > Avoids t
CONFIG_PHYLIB is already set by the config system, don't set it again.
Avoids ton of warnings.
Signed-off-by: Pavel Machek
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index b3f65b6..86eccba 100644
--- a/include/configs/socfpga_common.h
+++ b/in
On Wed 2015-12-02 13:31:27, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Add the defines for the reset manager and some basic reset functionality.
>
> Signed-off-by: Dinh Nguyen
> ---
> v4: rename mod_reset names to be used by both gen5 and a10
> v3: remove duplicate reset func
On Tue 2015-12-01 17:33:02, Dinh Nguyen wrote:
> On 12/01/2015 05:30 PM, Marek Vasut wrote:
> > On Wednesday, December 02, 2015 at 12:20:47 AM,
> > dingu...@opensource.altera.com
> > wrote:
> >> From: Dinh Nguyen
> >>
> >> Not sure what made this macro questionable, but edit the macro to be
> >>
> > +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > + puts("CPU : Altera SOCFPGA Arria 10 Platform\n");
>
> No FPGA type detection happens on A10 ? :) Also, CPU is not "Arria 10
> platform",
> CPU is still Altera SoCFPGA or possibly Altera SoCFPGA Arria 10 , right ?
>
Well. .. cpu is "gener
On Tue 2015-12-01 19:51:39, Marek Vasut wrote:
> On Tuesday, December 01, 2015 at 05:48:32 PM, dingu...@opensource.altera.com
> wrote:
> > From: Dinh Nguyen
> >
> > Add the defines for the reset manager and some basic reset functionality.
> >
> > Signed-off-by: Dinh Nguyen
> > ---
> > v2: inte
On Tue 2015-12-01 10:48:31, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Add system manager defines for Arria10.
>
> Signed-off-by: Dinh Nguyen
With whitespace cleaned up:
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
(cesky,
Hi!
> > > OK, this is bad. Originally, if we didn't specify these in the DT, we
> > > would
> > > use the default values of 0x3 and 0x0 , but now we do the
> > > calibration. I wonder,
> > > do we care about DT ABI compatibility on the U-Boot level or not ?
> >
> > If the compatibility failed, it
h Nguyen
> Cc: Dinh Nguyen
Acked-by: Pavel Machek
Notice that you sent two patches marked "v1".
Thanks,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.ka
Hi!
> > > > > One of the nice thing of U-Boot over SPL is the console support
> > > > > and
> > > > > ability to troubleshoot.
> > > > > This is possible with Arria 10 SoC as we have larger OCRAM (256kB
> > > > > vs CV
> > > > > SoC 64kB).
> > > >
> > > > OK, that's not really the point here -- t
Hi!
> > > > So what do I do if I want to boot arria10 from NAND ? UBI and UBIFS
> > > > won't
> > > > fit into 256kiB, so I think using SPL might be the sensible thing
> > > > afterall,
> > > > since you would be able to use arbitrarily-sized U-Boot.
> > >
> > > I hope Chin Liang can chime here,
On Thu 2015-11-19 17:28:47, Dinh Nguyen wrote:
> On 11/19/2015 04:45 PM, Marek Vasut wrote:
> > On Thursday, November 19, 2015 at 10:35:47 PM,
> > dingu...@opensource.altera.com
> > wrote:
> >> From: Dinh Nguyen
> >>
> >> Update Makefile to build Arria 10.
> >>
> >> Signed-off-by: Dinh Nguyen
>
Hi!
> index 000..86f9b78
> --- /dev/null
> +++ b/board/altera/arria10-socdk/Makefile
> @@ -0,0 +1,9 @@
> +#
> +# (C) Copyright 2001-2006
> +# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
> +# (C) Copyright 2010, Thomas Chou
> +#
You can delete these. There's nothing left of the ol
Hi!
> +union dramaddrw_reg {
> + struct {
> + u32 cfg_col_addr_width:5;
> + u32 cfg_row_addr_width:5;
> + u32 cfg_bank_addr_width:4;
> + u32 cfg_bank_group_addr_width:2;
> + u32 cfg_cs_addr_width:3;
> + u32 reserved:13;
>
On Wed 2015-11-18 11:06:09, Stefan Roese wrote:
> The SR1500 board is a CycloneV based board, similar to the EBV
> SoCrates, equipped with the following devices:
>
> - SPI NOR
> - eMMC
> - Ethernet
>
> Signed-off-by: Stefan Roese
> Reviewed-by: Marek Vas
On Mon 2015-10-12 11:59:04, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> We need "u-boot,dm-pre-reloc" in the socfpga_cyclone5_socdk.dts file in
> order for the SPL to use SD/MMC.
Acked-by: Pavel Machek
On Mon 2015-10-12 09:59:57, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Update the L2 AUX CTRL settings for the SoCFPGA.
>
> Enabling D and I prefetch bits helps improve SDRAM performance on the
> platform.
>
> Also, we need to enable bit 22 of the L2. By not having bit 22 set
On Mon 2015-10-12 09:59:56, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> s/L310_SHARED_ATT_OVERRIDE_ENABLE/PL310_SHARED_ATT_OVERRIDE_ENABLE
>
> Signed-off-by: Dinh Nguyen
Well, in kernel, pl310 -related registers also have L310 prefix (no
PL), so I'm not sure it was a typo...
Hi!
> From: Dinh Nguyen
>
> Enable the able to save the environment variables when SD/MMC is used.
>
> Signed-off-by: Dinh Nguyen
> ---
> v3: Only define ENV_IS_NOWHERE if env is not in MMC, NAND, FAT, and SPI_FLASH
> v2: Move this option to be on a per-board basis
> Add config for socfpga
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