> Subject: Re: RFC: Updating i.MX8M CPU thermal trip-point at runtime
>
> Hi Andrejs,
>
> +Cc: Jacky Bai
>
> Am 13.04.22 um 14:24 schrieb Andrejs Cainikovs:
> > [Sie erhalten nicht oft E-Mail von "andrejs.cainik...@toradex.com".
> > Weitere Inform
uld be ok before, and some community guys have used it
for their project for a while.
BR
Jacky Bai
> I am not following TF-A i.MX development in upstream, so I cannot comment
> myself.
>
> Added Jacky on Cc, who is involved with i.MX TF-A development and could
> probably explain.
> Sent: Monday, August 19, 2019 2:25 PM
> To: Troy Kisky ; Fabio Estevam
> ; Stefano Babic ;
> u-boot@lists.denx.de; Jacky Bai
> Subject: RE: imx: add i.MX8MQ EVK support
>
> Loop Jacky who has more knowledge in the ddr stuff.
>
> > Subject: re: imx: add i.MX8
>
> Peng,
>
> I have found one more piece that is missing from the lpddr4 initialization.
> We don't have a structure, or place to change the DDR PHY DQ lane to
> memory mapping registers. Our board requires this and was failing until I
> patched it in.
>
> According to the code generated from
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