> > Peng, > > I have found one more piece that is missing from the lpddr4 initialization. > We don't have a structure, or place to change the DDR PHY DQ lane to > memory mapping registers. Our board requires this and was failing until I > patched it in. > > According to the code generated from DDR tool this should happen after > /* step7 [0]--1: disable quasi-dynamic programming */ > Actually, the DQ lane config is part of ddrphy config. The DDR PHY DQ lane config will be put in the ddrphy_cfg array in latest DDR tool.
Jacky > -Jon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
