From: Mattijs Korpershoek
When booting Android with adtbo_idx set, we observe the
following crash:
** Booting bootflow 'mmc@fa1.bootdev.whole' with android
## Booting Android Image at 0x8200 ...
Kernel load addr 0x9200 size 20195 KiB
Kernel extra command line: console=tty
On 10/10/24 7:36 AM, Jan Kiszka wrote:
On 30.09.24 06:54, Jan Kiszka wrote:
On 09.08.24 17:19, Caleb Connolly wrote:
On 09/08/2024 07:19, Jan Kiszka wrote:
On 08.08.24 16:27, Caleb Connolly wrote:
Hi Jan,
On 08/08/2024 10:51, Jan Kiszka wrote:
From: Jan Kiszka
When DM_REGULATOR is disab
On Tue, Oct 8, 2024 at 6:56 PM Simon Glass wrote:
>
> Hi Tim,
>
> On Mon, 7 Oct 2024 at 14:16, Tim Harvey wrote:
> >
> > Greetings,
> >
> > I have a need to adjust the U-Boot device-tree live with some board
> > revision specific fixups. It would seem I need to enable OF_LIVE to do
> > so but whe
On Wed, 9 Oct 2024 at 17:49, Jerome Forissier
wrote:
>
> Prepare the introduction of the lwIP (lightweight IP) TCP/IP stack by
> adding a new net/lwip/ directory and the NET_LWIP symbol. Network
> support is either NO_NET, NET (legacy stack) or NET_LWIP. Subsequent
> commits will introduce the lwI
On Mon, 23 Sep 2024 21:11:31 +0800, Peng Fan (OSS) wrote:
> The pmic could be trimed with updated BUCK1 range, so update the range
> for trimed pmic. The default value of Toff_Deb is used to distinguish
> the non-trimed and trimed pmic.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Sun, 24 Sep 2023 18:30:22 -0400, Sidharth Prabukumar wrote:
> The MP5416 PMIC's LDO set-value formula is incorrect. This patch fixes
> it by using the correct formula.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Wed, 03 Jul 2024 05:09:33 +0400, Mikhail Kshevetskiy wrote:
> The patch fix a missprint introduced in commit 2e9fe73a883a ("spi: soft_spi:
> Support the recommended soft spi properties").
>
>
Applied to u-boot/master, thanks!
--
Tom
On Sun, Sep 29, 2024 at 11:19 PM Peng Fan (OSS) wrote:
> +static int pf0900_read(struct udevice *dev, uint reg, u8 *buff,
> + int len)
> +{
> + u8 crcBuf[3];
crc_buf[3] instead to avoid CamelCase.
On 10/10/24 1:50 PM, Simon Glass wrote:
Hi Neha,
On Thu, 10 Oct 2024 at 01:09, Neha Malcom Francis wrote:
The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
modify the message to show exactly what is meant:
"DRAM: 2 GiB (available for U-Boot out of total 32 GiB)"
Sign
On Thu, Oct 10, 2024 at 12:50:11PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 15 Aug 2024 at 13:58, Simon Glass wrote:
> >
> > This is quite a significant waste of time in the world builds as dtc is
> > built separately for each board. Skip this to speed up the builds.
> >
> > Unfortunately
On Thu, Oct 10, 2024 at 12:50:18PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Sat, 6 Jan 2024 at 10:41, Tom Rini wrote:
> >
> > On Thu, Jan 04, 2024 at 09:28:17PM +0800, Bin Meng wrote:
> >
> > > Since commit b45ab9ca6621 ("CI: Update to QEMU 8.0.3"), the manual
> > > patch applying was removed,
Hi Tom,
On Sat, 6 Jan 2024 at 10:41, Tom Rini wrote:
>
> On Thu, Jan 04, 2024 at 09:28:17PM +0800, Bin Meng wrote:
>
> > Since commit b45ab9ca6621 ("CI: Update to QEMU 8.0.3"), the manual
> > patch applying was removed, hence there is no need to do a git user
> > name and email configuration.
> >
On Thu, 4 Jan 2024 at 16:25, Bin Meng wrote:
>
> From: Bin Meng
>
> With latest coreboot (e.g.: v4.22.01), the instructions to enable
> graphics support has changed. Refresh the doc.
>
> Signed-off-by: Bin Meng
>
> ---
>
> doc/board/coreboot/coreboot.rst | 11 +--
> 1 file changed, 5 in
Hi Tom,
On Thu, 15 Aug 2024 at 13:58, Simon Glass wrote:
>
> This is quite a significant waste of time in the world builds as dtc is
> built separately for each board. Skip this to speed up the builds.
>
> Unfortunately the newer dtc produces a lot of warnings, which causes CI
> to fail. I am not
Hi Neha,
On Thu, 10 Oct 2024 at 01:09, Neha Malcom Francis wrote:
>
> The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
> modify the message to show exactly what is meant:
>
> "DRAM: 2 GiB (available for U-Boot out of total 32 GiB)"
>
> Signed-off-by: Neha Malcom Francis
On Mon, Sep 30, 2024 at 11:55:27AM +0800, Peng Fan (OSS) wrote:
> From: Joy Zou
>
> Support NXP pmic pf5300
>
> Signed-off-by: Joy Zou
> Reviewed-by: Ye Li
> Signed-off-by: Peng Fan
> ---
> drivers/power/pmic/Kconfig | 15
> drivers/power/pmic/Makefile | 1 +
> drivers/power/pmic/p
On Mon, Sep 30, 2024 at 11:22:43AM +0800, Peng Fan (OSS) wrote:
> From: Joy Zou
>
> Add regulator driver for NXP PF0900
>
> Signed-off-by: Joy Zou
> Reviewed-by: Ye Li
> Signed-off-by: Peng Fan
> ---
> drivers/power/regulator/Kconfig | 15 ++
> drivers/power/regulator/Makefile | 1 +
>
On Mon, Sep 30, 2024 at 11:22:42AM +0800, Peng Fan (OSS) wrote:
> From: Joy Zou
>
> Support NXP pmic pf0900
>
> Reviewed-by: Ye Li
> Signed-off-by: Joy Zou
> Signed-off-by: Peng Fan
> ---
> drivers/power/pmic/Kconfig | 15 ++
> drivers/power/pmic/Makefile | 1 +
> drivers/power/pmic/pf0
On Mon, Mar 04, 2024 at 05:16:05PM +0100, Marek Vasut wrote:
> Some Winbond SPI NORs have special SR3 register which is
> used among other things to control whether non-standard
> "Individual Block/Sector Write Protection" (WPS bit)
> locking scheme is activated. This non-standard locking
> scheme
On Thu, Oct 10, 2024 at 12:39:09PM +0530, Neha Malcom Francis wrote:
> The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
> modify the message to show exactly what is meant:
>
> "DRAM: 2 GiB (available for U-Boot out of total 32 GiB)"
>
> Signed-off-by: Neha Malcom Francis
On Fri, Sep 27, 2024 at 10:18:05AM +0900, tkuw584...@gmail.com wrote:
> From: Takahiro Kuwano
>
> Resent after modifying commit message in #5 (mention Linux commit first)
> and collecting A-b tags.
>
> This series is equivalent to the one for Linux MTD submitted by
> Pratyush Yadav.
>
> https:
On Fri, 27 Sep 2024 10:27:08 +0900, tkuw584...@gmail.com wrote:
> Infineon S28HS256T is 256Mb Octal SPI device which has same
> functionalities with 512Mb and 1Gb parts.
>
> Link:https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HL256T_256Mb_SEMPER_Flash_Octal_interface_1_8V_3-DataSheet-v02_00-
On Fri, 27 Sep 2024 10:24:14 +0900, tkuw584...@gmail.com wrote:
> From: Takahiro Kuwano
>
> S25HS02GT, S25HL02GT, and S28HS02GT are dual-die package parts and do
> not support chip erase.
>
> In v2, split the patch and add fixes tag.
>
> [...]
Applied to u-boot/master, thanks!
--
Tom
On Fri, 27 Sep 2024 10:11:16 +0900, tkuw584...@gmail.com wrote:
> From: Takahiro Kuwano
>
> The S25FS064S, S25FS128S, and S25FS256S are the same family of SPI NOR
> Flash devices with S25FS512S.
>
> Datasheets:
> https://www.infineon.com/dgdl/Infineon-S25FS064S_64_Mb_8_MB_FS-S_Flash_SPI_Multi-I
On Fri, 06 Sep 2024 23:10:42 +0200, Marek Vasut wrote:
> The w25q16cl does support locking the same way w25q16dw does,
> fill in the missing flags.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Fri, 06 Sep 2024 23:10:10 +0200, Marek Vasut wrote:
> The mx25u25635f entry exists twice in spi_nor_ids, remove the less
> complete variant of the entry and keep only one copy of it.
>
>
Applied to u-boot/master, thanks!
--
Tom
On Fri, 06 Sep 2024 23:09:16 +0200, Marek Vasut wrote:
> The w25q16dw entry exists twice in spi_nor_ids, remove the less
> complete variant of the entry and keep only one copy of it.
>
>
Applied to u-boot/master, thanks!
--
Tom
On 10/10/2024 12:39 PM, Neha Malcom Francis wrote:
The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
modify the message to show exactly what is meant:
"DRAM: 2 GiB (available for U-Boot out of total 32 GiB)"
Still confusing for me atleast :) can this be
"DRAM: 2 GiB
Hi Simon,
On Thu, 10 Oct 2024 at 18:10, Simon Glass wrote:
>
> Hi,
>
> On Thu, 10 Oct 2024 at 06:02, Ilias Apalodimas
> wrote:
> >
> > On Thu, 10 Oct 2024 at 01:39, Tom Rini wrote:
> > >
> > > On Wed, Oct 09, 2024 at 03:14:25PM -0600, Simon Glass wrote:
> > > > Hi Ilias,
> > > >
> > > > On Wed
Hi Mikhail,
On Wed, 9 Oct 2024 at 02:21, Mikhail Kshevetskiy
wrote:
>
> Will try to fix spelling. Unfortunately my english is not very well.
Your English is fine and we don't normally worry about that sort of
thing too much. It's just that they looked like typos rather than
grammar, etc.
>
> On
Hi,
On Thu, 10 Oct 2024 at 06:02, Ilias Apalodimas
wrote:
>
> On Thu, 10 Oct 2024 at 01:39, Tom Rini wrote:
> >
> > On Wed, Oct 09, 2024 at 03:14:25PM -0600, Simon Glass wrote:
> > > Hi Ilias,
> > >
> > > On Wed, 9 Oct 2024 at 04:41, Ilias Apalodimas
> > > wrote:
> > > >
> > > > Hi Simon,
> > >
On Wed, Oct 09, 2024 at 11:40:38PM +0200, Heinrich Schuchardt wrote:
> Dear Tom,
>
> The following changes since commit fbe16bc28014dc1ed957f5fee7e53d6eee781aa9:
>
> arch: arm: dts: k3-j7200-r5-evm: Enable AVS feature (2024-10-08 10:23:36
> -0600)
>
> are available in the Git repository at:
>
On 10/4/24 20:28, Tom Rini wrote:
> On Fri, Oct 04, 2024 at 02:55:58PM +0200, Jerome Forissier wrote:
>>
>>
>> On 10/4/24 14:04, Heinrich Schuchardt wrote:
>>> On 03.10.24 17:22, Jerome Forissier wrote:
Note: Patch posted separately [0].
[0]
https://patchwork.ozlabs.org/proj
The new i.MX8M Plus DHCOM rev.200 is populated with M24C32-D EEPROM
which contains additional write-lockable page called ID page, which
is populated with a structure containing the item and serial number.
Extend the support for parsing the item and serial number of the
EEPROM ID page. Write the it
The i.MX8M Plus DHCOM currently supports parsing ethernet MAC address
from multiple sources in the following priority order:
1) U-Boot environment 'ethaddr'/'eth1addr' environment variable
2) SoC OTP fuses
3) On-SoM EEPROM
The new i.MX8M Plus DHCOM rev.200 is populated with M24C32-D EEPROM
which
On 10/9/24 23:14, Simon Glass wrote:
Hi Michal,
On Wed, 9 Oct 2024 at 07:21, Michal Simek wrote:
Hi,
On 10/9/24 03:55, Simon Glass wrote:
Hi Michal,
On Mon, 7 Oct 2024 at 07:05, Michal Simek wrote:
Adding binman node with target images description can be unwanted feature
but as of to
Hi
The addition of the line
ret = device_chld_unbind(dev, NULL);
Broke booting from sata with qemu q35 with coreboot + u-boot for me.
Kind regards
On Tue, Oct 08, 2024 at 07:55:26PM -0600, Simon Glass wrote:
>
> WARNING: This email originated from outside of GE HealthCare. Please validate
> the sender's email address before clicking on links or attachments as they
> may not be safe.
>
> Hi Brian,
>
> On Mon, 7 Oct 2024 at 07:02, Brian Ru
Add coverage for IMX8M code siging. Create PKI tree and other assets
required by `cst' using `hab4_pki_tree.sh' script and `srktool' in
`cst_3.4.1' [1].
[1] https://www.nxp.com/webapp/Download?colCode=IMX_CST_TOOL_NEW
Signed-off-by: Brian Ruley
---
Changes for v2:
- Added missing *.pem files
- R
Right now, it is unclear where the certificates (and private keys) are
read from if environment variables are unset, and providing complete
paths in the device tree is not ideal. Naturally, it makes sense
to be able to decide where binman should look for the files, regardless
whether the keys are s
Hi Tom
On Wed, 9 Oct 2024 at 20:52, Tom Rini wrote:
>
> On Wed, Oct 09, 2024 at 08:32:29PM +0300, Ilias Apalodimas wrote:
> > On Wed, 9 Oct 2024 at 18:32, Raymond Mao wrote:
> > >
> > > Hi Tom,
> > >
> > > On Wed, 9 Oct 2024 at 10:38, Tom Rini wrote:
> > >>
> > >> On Thu, Oct 03, 2024 at 02:50:
On 10.10.24 13:48, Arthur Heymans wrote:
Hi
The addition of the line
ret = device_chld_unbind(dev, NULL);
Broke booting from sata with qemu q35 with coreboot + u-boot for me.
Kind regards
Hello Arthur,
Sorry to hear this. I would need a reproducible example for further
analysis.
Could y
Hi Dmitry,
On jeu., oct. 10, 2024 at 13:20, Dmitry Rokosov
wrote:
> On Wed, Oct 09, 2024 at 03:13:57PM -0600, Simon Glass wrote:
>> Hi Dmitry,
>>
>> On Wed, 9 Oct 2024 at 07:26, Dmitry Rokosov
>> wrote:
>> >
>> > Hello Simon,
>> >
>> > On Tue, Oct 08, 2024 at 07:57:15PM -0600, Simon Glass wr
On Thu, 10 Oct 2024 at 01:39, Tom Rini wrote:
>
> On Wed, Oct 09, 2024 at 03:14:25PM -0600, Simon Glass wrote:
> > Hi Ilias,
> >
> > On Wed, 9 Oct 2024 at 04:41, Ilias Apalodimas
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > We already have a mem info command, which is pretty useless. Can't we
> >
On Wed, Oct 09, 2024 at 03:13:57PM -0600, Simon Glass wrote:
> Hi Dmitry,
>
> On Wed, 9 Oct 2024 at 07:26, Dmitry Rokosov
> wrote:
> >
> > Hello Simon,
> >
> > On Tue, Oct 08, 2024 at 07:57:15PM -0600, Simon Glass wrote:
> > > On Tue, 8 Oct 2024 at 14:18, Dmitry Rokosov
> > > wrote:
> > > >
>
trying to load current flash.bin with uuu tool
leads in not booting U-Boot as missing some bytes.
Align flash.bin in this case to 0x800 bytes, to
make uuu and ROM api happy.
Signed-off-by: Heiko Schocher
---
I am unsure about the value of 0x800 which is twice the
value the code in spl_romapi_loa
Hi Jagan, Vignesh,
On mar., oct. 01, 2024 at 18:06, Neil Armstrong
wrote:
> To smoothly handle the transition from the legacy SPI FLASH
> API to the the driver model API, add the DM functions
> as dummy inline functions.
>
> Today, client code uses #if/#else conditionals, but it's better
> to u
Hi all,
I am searching for HW that supports both USB host & USB device/gadget
mode, on the same USB port, capable of switching between these modes
at runtime.
Preferably supported in upstream kernel.
Has anyone done this for example with Raspberry Pi?
Thanks.
Marek
The message "DRAM: 2 GiB (effective 32 GiB)" can be a little confusing,
modify the message to show exactly what is meant:
"DRAM: 2 GiB (available for U-Boot out of total 32 GiB)"
Signed-off-by: Neha Malcom Francis
---
common/board_f.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
dif
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