Hi Anup,
On Mon, Dec 24, 2018 at 3:23 PM Anup Patel wrote:
>
> On Mon, Dec 24, 2018 at 12:45 PM Bin Meng wrote:
> >
> > Hi Anup,
> >
> > On Mon, Dec 24, 2018 at 2:42 PM Anup Patel wrote:
> > >
> > > On Mon, Dec 24, 2018 at 12:01 PM Bin Meng wrote:
> > > >
> > > > Hi Anup,
> > > >
> > > > On Mo
On Mon, Dec 24, 2018 at 12:45 PM Bin Meng wrote:
>
> Hi Anup,
>
> On Mon, Dec 24, 2018 at 2:42 PM Anup Patel wrote:
> >
> > On Mon, Dec 24, 2018 at 12:01 PM Bin Meng wrote:
> > >
> > > Hi Anup,
> > >
> > > On Mon, Dec 24, 2018 at 1:41 PM Anup Patel wrote:
> > > >
> > > > On Mon, Dec 24, 2018 at
Hi Anup,
On Mon, Dec 24, 2018 at 2:42 PM Anup Patel wrote:
>
> On Mon, Dec 24, 2018 at 12:01 PM Bin Meng wrote:
> >
> > Hi Anup,
> >
> > On Mon, Dec 24, 2018 at 1:41 PM Anup Patel wrote:
> > >
> > > On Mon, Dec 24, 2018 at 6:59 AM Bin Meng wrote:
> > > >
> > > > Hi Anup,
> > > >
> > > > On Wed
On Mon, Dec 24, 2018 at 12:01 PM Bin Meng wrote:
>
> Hi Anup,
>
> On Mon, Dec 24, 2018 at 1:41 PM Anup Patel wrote:
> >
> > On Mon, Dec 24, 2018 at 6:59 AM Bin Meng wrote:
> > >
> > > Hi Anup,
> > >
> > > On Wed, Dec 19, 2018 at 5:05 PM Bin Meng wrote:
> > > >
> > > > Hi Anup,
> > > >
> > > > O
Hi Anup,
On Mon, Dec 24, 2018 at 1:41 PM Anup Patel wrote:
>
> On Mon, Dec 24, 2018 at 6:59 AM Bin Meng wrote:
> >
> > Hi Anup,
> >
> > On Wed, Dec 19, 2018 at 5:05 PM Bin Meng wrote:
> > >
> > > Hi Anup,
> > >
> > > On Wed, Dec 19, 2018 at 2:32 PM Anup Patel wrote:
> > > >
> > > > On Wed, Dec
On Mon, Dec 24, 2018 at 6:59 AM Bin Meng wrote:
>
> Hi Anup,
>
> On Wed, Dec 19, 2018 at 5:05 PM Bin Meng wrote:
> >
> > Hi Anup,
> >
> > On Wed, Dec 19, 2018 at 2:32 PM Anup Patel wrote:
> > >
> > > On Wed, Dec 19, 2018 at 11:02 AM Bin Meng wrote:
> > > >
> > > > Hi Anup,
> > > >
> > > > On We
Add i.MX8QM MEK board support.
Included a basic dts, enabled SPL FIT
Boot log as below:
U-Boot SPL 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800)
Normal Boot
Trying to boot from MMC2_2
U-Boot 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800)
CPU: NXP i.MX8QM RevB A53 a
eMMC 5.1+ supports HS400 Enhances Strobe mode without the need for
tuning procedure.
The flow is as following:
- set HS_TIMIMG (Highspeed)
- Host change freq to <= 52Mhz
- set the bus width to Enhanced strobe and DDR8Bit(CMD6),
EXT_CSD[183] = 0x86 instead of 0x80
- set HS_TIMING to 0x3 (HS40
Add i.MX8QM entry
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8/imx8-pins.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx8/imx8-pins.h
b/arch/arm/include/asm/arch-imx8/imx8-pins.h
index dcced1010b..2130298163 100644
--- a/arch/arm/include/asm/a
According to IMX8QXP/8QM config option, choose the clk/iomuxc
compatible.
Signed-off-by: Peng Fan
---
drivers/misc/imx8/scu.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/misc/imx8/scu.c b/drivers/misc/imx8/scu.c
index 1b9c49c99c..9ec00457b8 10064
To make it easy to add new clk driver for i.MX8, split
the code into common part and SoC specific part.
Make the get/set/enable non static and introduce a num_clks for
soc_clk_dump, because the arrays are moved to clk-imx8qxp.c.
Signed-off-by: Peng Fan
---
drivers/clk/imx/Makefile | 4 +
Add i.MX8QM clk driver, SDHC/FEC/UART/I2C supported.
Signed-off-by: Peng Fan
---
drivers/clk/imx/Makefile | 1 +
drivers/clk/imx/clk-imx8.c | 1 +
drivers/clk/imx/clk-imx8qm.c | 307 +++
3 files changed, 309 insertions(+)
create mode 100644 driv
Add cpu type and Kconfig entry
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx/cpu.h | 1 +
arch/arm/mach-imx/imx8/Kconfig | 5 +
arch/arm/mach-imx/imx8/cpu.c| 3 +++
3 files changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx/cpu.h
b/arch/arm/include
Add i.MX8QM clocks definition
Signed-off-by: Peng Fan
---
include/dt-bindings/clock/imx8qm-clock.h | 846 +++
1 file changed, 846 insertions(+)
create mode 100644 include/dt-bindings/clock/imx8qm-clock.h
diff --git a/include/dt-bindings/clock/imx8qm-clock.h
b/inclu
Introduce basic dtsi for i.MX8QM, only support SDHC/FEC/LPUART.
Signed-off-by: Peng Fan
---
arch/arm/dts/fsl-imx8qm.dtsi | 400 +++
1 file changed, 400 insertions(+)
create mode 100644 arch/arm/dts/fsl-imx8qm.dtsi
diff --git a/arch/arm/dts/fsl-imx8qm.dts
Add i.MX8QM pads definition
Signed-off-by: Peng Fan
---
include/dt-bindings/pinctrl/pads-imx8qm.h | 961 ++
1 file changed, 961 insertions(+)
create mode 100644 include/dt-bindings/pinctrl/pads-imx8qm.h
diff --git a/include/dt-bindings/pinctrl/pads-imx8qm.h
b/inclu
Add i.MX8QM compatible
Signed-off-by: Peng Fan
---
drivers/pinctrl/nxp/pinctrl-imx8.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/nxp/pinctrl-imx8.c
b/drivers/pinctrl/nxp/pinctrl-imx8.c
index 0738da0ebe..c1b0ca438a 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx8.c
+++ b/dr
On Sat, 2018-12-22 at 13:51 -0700, Simon Glass wrote:
> Hi Tien,
>
> On Fri, 21 Dec 2018 at 10:50, Chee, Tien Fong om> wrote:
> >
> >
> > On Fri, 2018-12-21 at 10:16 -0700, Simon Glass wrote:
> > >
> > > Hi,
> > >
> > > On Fri, 21 Dec 2018 at 01:25, Chee, Tien Fong > > el.c
> > > om> wrote:
Hi Anup,
On Wed, Dec 19, 2018 at 5:05 PM Bin Meng wrote:
>
> Hi Anup,
>
> On Wed, Dec 19, 2018 at 2:32 PM Anup Patel wrote:
> >
> > On Wed, Dec 19, 2018 at 11:02 AM Bin Meng wrote:
> > >
> > > Hi Anup,
> > >
> > > On Wed, Dec 19, 2018 at 12:41 PM Anup Patel wrote:
> > > >
> > > > On Tue, Dec 1
Most of the memory is being consumed by device binding code,
more space needed for other data structures.
Z-turn board has already hit the limit, others may follow soon.
Signed-off-by: Anton Gerasimov
---
arch/arm/mach-zynq/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
On Mon, Dec 24, 2018 at 02:49:30AM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this as part of v2019.01 release.
>
> thanks,
> Jagan.
>
> The following changes since commit 562a63e86bc7b308a328a7bbdf0db237855c39a8:
>
> Merge git://git.denx.de/u-boot-marvell (2018-12-21 13:38:09 -0500)
On Fri, Dec 21, 2018 at 2:20 PM Jean-Jacques Hiblot wrote:
>
Better to have proper commit head that tells the real issue.
> Fixes commit 013116243950 ("dm: usb: create a new UCLASS ID for USB gadget
> devices")
>
> The UCLASS_DRIVER for id UCLASS_USB_GADGET_GENERIC needs to be declared
> even fo
Tom,
Forgot to include once patch, please ignore this will send v2.
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Hi all,
I'm observing that the said A20-onlinuxino-micro board hangs in U-boot
in probing USB2 (see example below) in case it is powered by connecting
its mini-usb connector to a computer. The problem does not happen if 12V
power connector is also empoyed. (Note: the example attached below is
Hi again,
The following commit (titled "use PIO instead of DMA") apparently broke
actual reading of nand pages in SPL at least for A20:
http://git.denx.de/?p=u-boot.git;a=commit;h=6ddbb1e936c78cdef1e7395039fa7020c5c75326
Instead of reading page contents, non-dma (current) version just feeds
Hi Tom,
Please pull this as part of v2019.01 release.
thanks,
Jagan.
The following changes since commit 562a63e86bc7b308a328a7bbdf0db237855c39a8:
Merge git://git.denx.de/u-boot-marvell (2018-12-21 13:38:09 -0500)
are available in the Git repository at:
git://git.denx.de/u-boot-spi.git mas
On Thu, Dec 20, 2018 at 6:28 PM Ramon Fried wrote:
>
> Some architectures(MIPS) requires real mapping of IOMEM,
> other just define it as identity mapping. fix it.
Hope it wouldn't break anything, will push after release?
>
> Signed-off-by: Ramon Fried
Reviewed-by: Jagan Teki
23.12.2018 21:58, I wrote:
[...]
Regarding the sunxi_nand_spl.c module, I can not find any mention if it
implies NAND_ECC_HW, NAND_ECC_HW_SYNDROME, or rather some other mode, or
if these modes are irrelevant in this case?
So far I'm observing that sunxi_nand_spl module refuses to load erased
n
On Wed, Dec 19, 2018 at 8:40 PM Horatiu Vultur
wrote:
>
> When probing soft_spi the result of dev_get_parent_priv(dev) in probe
> function is null ptr because the spi is on the ahb bus which has
> per_child_auto_alloc_size set to 0. Therefore it would generate an Ooops
> messages when accessing sp
Hi again,
23.12.2018 21:11, I wrote:
[...]
Indeed, its an index, and therefore it appears SPL's detection actually
gives correct values! Nevertheless, SPL reads all zeroes from nand.
Regarding the sunxi_nand_spl.c module, I can not find any mention if it
implies NAND_ECC_HW, NAND_ECC_HW_SYNDR
Hi Michael,
23.12.2018 18:54, Michael Nazzareno Trimarchi:
[...]
Considering ecc_size=1024, ecc_strength=4 good(b).
Considering addr_cycles=5, page_size=8192 accepted.
I'm almost 100% sure that correct config would be page_size=8192,
ecc_size=1024, ecc_strength=40 (from nand chip identificat
Hi all,
Could some kind soul please add this id attached below?
Maybe even for 2019.01 if possible?
Otherwise nand is totally unaccessible in u-boot on some older
A20-olinuxino-micro board with this bloody old Hynix chip.
Thank you,
Regards,
Nikolai
On Fri, Dec 21, 2018 at 04:31:20PM +0100, Stefan Roese wrote:
> Hi Tom,
>
> please pull the following minor, local changes and fixes:
>
Applied to u-boot/master, thanks!
--
Tom
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On Fri, Dec 21, 2018 at 01:42:50PM +0100, Marek Vasut wrote:
> The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:
>
> Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)
>
> are available in the Git repository at:
>
> git://git.denx.de/u-boot-socfpga.git master
>
> f
On Wed, Dec 19, 2018 at 04:26:24PM +0100, Neil Armstrong wrote:
> Hi Tom,
>
> Here is single U-Boot DT fixup for the S400 board.
>
> Thanks,
> Neil
>
> The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad:
>
> Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500)
>
> are a
On Wed, Dec 19, 2018 at 03:52:09PM +0100, Daniel Schwierzeck wrote:
> Hi Tom,
>
> though it's a little big for rc2, it's beside some bugfixes almost only new
> code which is isolated to drivers and MIPS. The patches were on the list for
> several weeks/months but the review process took a bit lon
On Tue, Dec 18, 2018 at 06:09:33PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv update:
> 1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes.
> 2. Support SiFive UART
> 3. Rename ax25-ae350 defconfig
>
> https://travis-ci.org/rickchen36/u-boot-riscv/
Hi
On Sun, Dec 23, 2018 at 4:46 PM Nikolai Zhubr wrote:
>
> Hi again,
>
> 23.12.2018 16:29, I wrote:
> > > U-Boot SPL 2019.01-rc2 (Dec 20 2018 - 16:30:46 +0300)
> > > CPU: 91200Hz, AXI/AHB/APB: 3/2/2
> > > DRAM: 1024 MiB
> > > Trying to boot from NAND
> >
>
> Ok, discovered a special SPL-
Hi again,
23.12.2018 16:29, I wrote:
> U-Boot SPL 2019.01-rc2 (Dec 20 2018 - 16:30:46 +0300)
> CPU: 91200Hz, AXI/AHB/APB: 3/2/2
> DRAM: 1024 MiB
> Trying to boot from NAND
Ok, discovered a special SPL-only sunxi_nand_spl variant, added some
debugging, so the detection is visible:
I
Hi Andre,
On Sat, Dec 22, 2018 at 7:07 PM Andre Heider wrote:
>
> Hi Bin,
>
> this patch reminds me of one I sent some time ago:
> http://patchwork.ozlabs.org/patch/873666/
>
> I forgot about it, so didn't follow up on the comments, but iirc this
> fixed a 'Bad CBFS file' error for me too. Does t
Hi all,
While fighting with this A20-olinuxino nand boot process I've initially
found that some essential nand-related parameters are apparently missing
by default, preventing reasonable nand operation, so I started debugging
this gradually.
> U-Boot SPL 2019.01-rc2 (Dec 20 2018 - 16:30:46 +
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