Hi On Sun, Dec 23, 2018 at 4:46 PM Nikolai Zhubr <n-a-zh...@yandex.ru> wrote: > > Hi again, > > 23.12.2018 16:29, I wrote: > > > U-Boot SPL 2019.01-rc2 (Dec 20 2018 - 16:30:46 +0300) > > > CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 > > > DRAM: 1024 MiB > > > Trying to boot from NAND > > > > Ok, discovered a special SPL-only sunxi_nand_spl variant, added some > debugging, so the detection is visible: > > In nand_detect_config(), start detection... > Considering addr_cycles=5, page_size=2048 > Considering ecc_size=1024, ecc_strength=0 failed(a). > Considering addr_cycles=5, page_size=2048 rejected. > Considering addr_cycles=5, page_size=4096 > Considering ecc_size=1024, ecc_strength=3 failed(a). > Considering addr_cycles=5, page_size=4096 rejected. > Considering addr_cycles=5, page_size=8192 > Considering ecc_size=1024, ecc_strength=4 good(b). > Considering addr_cycles=5, page_size=8192 accepted. > > I'm almost 100% sure that correct config would be page_size=8192, > ecc_size=1024, ecc_strength=40 (from nand chip identification structure > for regular linux kernel)
That is an index on an array. Am I wrong? so the max is 74 Michael > > Now the detection routine in sunxi_nand_spl apparently comes up with a > value of ecc_strength=4 instead... Why is that? n - 1 using an index, if the code that I have is aligned so Michael > > > Thank you, > > Regards, > Nikolai > > > > > > > > Thank you, > > > > Regards, > > Nikolai > > _______________________________________________ > > U-Boot mailing list > > U-Boot@lists.denx.de > > https://lists.denx.de/listinfo/u-boot > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot -- | Michael Nazzareno Trimarchi Amarula Solutions BV | | COO - Founder Cruquiuskade 47 | | +31(0)851119172 Amsterdam 1018 AM NL | | [`as] http://www.amarulasolutions.com | _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
