On Tue, Dec 18, 2018 at 06:09:33PM +0800, ub...@andestech.com wrote: > Hi Tom, > > Please pull some riscv update: > 1. Add DM drivers to support RISC-V CPU and timer, plus some bug fixes. > 2. Support SiFive UART > 3. Rename ax25-ae350 defconfig > > https://travis-ci.org/rickchen36/u-boot-riscv/builds/469364551 > > Thanks > > Rick > > > The following changes since commit 1f2e948d6d53f77a2ddb2dde3531b0d5bc2815ad: > > Prepare v2019.01-rc2 (2018-12-17 20:25:24 -0500) > > are available in the Git repository at: > > git://git.denx.de/u-boot-riscv.git > > for you to fetch changes up to 368ff57805b03bebf99e97e703ce07aec721bc71: > > doc: README.ae350: Sync for ax25-ae350 rename (2018-12-18 13:26:02 +0800) >
Applied to u-boot/master, thanks! -- Tom
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