> -Original Message-
> From: Troy Kisky [mailto:troy.ki...@boundarydevices.com]
> Sent: 2018年7月28日 1:58
> To: Peng Fan ; sba...@denx.de; Fabio Estevam
> ; Anatolij Gustschin
> Cc: u-boot@lists.denx.de; dl-linux-imx
> Subject: Re: [PATCH V2 00/32] i.MX: Add i.MX8QXP support
>
> On 7/27/
sata_probe returns 1 for failure, so don't checkout for < 0
fixes: f19f1ecb6025 dm: sata: Support driver model with the 'sata' command
Signed-off-by: Troy Kisky
diff --git a/cmd/sata.c b/cmd/sata.c
index cc12afb07e..4f0c6e0137 100644
--- a/cmd/sata.c
+++ b/cmd/sata.c
@@ -107,8 +107,8 @@ static
On 7/27/2018 12:54 AM, Peng Fan wrote:
> Hi All,
>
> I plan to send out V3 early next week. QXP BETA2 has been external released,
> so there will be update in README including link to scfw images.
> Paste the link here first:
> https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-0.7.bin, u
On Thu, Jul 26, 2018 at 02:12:06PM -0500, Joe Hershberger wrote:
> Hi Tom,
>
> All tests are passing: https://travis-ci.org/jhershbe/u-boot/builds/408198713
>
> The following changes since commit 08fcdd332f3d6bc7842e21a97c80789d9233e147:
>
> Makefile: Fix 'clean' target (2018-07-26 07:12:31 -
On Fri, Jul 27, 2018 at 07:59:31AM -0400, Tom Rini wrote:
> With some recent changes to relevant drivers here the openrd board
> (openrd_client in this case) does not fit within its size constraint.
> We can however drop the slightly extended baudrate table and then the
> duplication of mtdparts/m
On Thu, Jul 26, 2018 at 06:36:12PM -0600, Simon Glass wrote:
> Hi Tom,
>
> Just a few small things.
>
>
> The following changes since commit 0dd1fc09bb16869fd8adaaad082cd554c60b2c1a:
>
> board/imgtec/boston: Add new defconfigs to the MAINTAINERS list
> (2018-07-20 15:55:10 -0400)
>
> are av
On Thu, Jul 26, 2018 at 02:08:33PM -0700, Tom Warren wrote:
> Tom,
>
> Please pull u-boot-tegra/master into U-Boot/master. Thanks!
>
> All Tegra builds are OK, and Stephen's automated test system reports that
> all tests pass.
>
> The following changes since commit 2547e91dc15e5203e15d4ebde917
Sometimes when a monitor without EDID information is plugged, the DE2
won't be probed (because of lack of timing information), but the HDMI
node is probed, thus a SimpleFB node with invalid information will be
populated.
Also detect whether DE2 is probed when creating SimpleFB node.
Fixes: be5b96
Tom,
The following changes since commit 08fcdd332f3d6bc7842e21a97c80789d9233e147:
Makefile: Fix 'clean' target (2018-07-26 07:12:31 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git
for you to fetch changes up to 86b840b78d0eba652f65841a870d232ab743612e:
On 06/26/2018 02:49 PM, York Sun wrote:
> A new defconfig is introduced to support SPL boot from QSPI NOR
> flash. This is to support falcon mode for faster booting into
> Linux.
>
> Signed-off-by: York Sun
> ---
Applied to fsl-qoriq, awaiting upstream.
York
___
On 06/26/2018 02:49 PM, York Sun wrote:
> To get full access of QSPI space, initialize AHB interface.
>
> Signed-off-by: York Sun
> ---
Applied to fsl-qoriq, awaiting upstream.
York
___
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U-Boot@lists.denx.de
https://lists.denx.de/li
U-Boot fails to load read-only variables from storage after a reset. It
happens because the environment hash table prevents creating read-only
variables unless the H_FORCE flag is passed.
In the following example, the variable "test" is set to read-only in the
board header file (#define CONFIG_ENV
On 06/14/2018 02:39 PM, York Sun wrote:
> Some legacy boards use RAW image for SPL boot. Add Kconfig option
> SPL_PAYLOAD to set alternative image.
>
> Signed-off-by: York Sun
>
> ---
Applied to fsl-qoriq, awaiting upstream.
York
___
U-Boot mailing l
On 06/26/2018 09:42 AM, York Sun wrote:
> Instead of defining Kconfig macros in header file, move them to
> defconfig files.
>
> Signed-off-by: York Sun
> ---
Applied to fsl-qoriq, awaiting upstream.
York
___
U-Boot mailing list
U-Boot@lists.denx.d
On 06/14/2018 02:26 PM, York Sun wrote:
> For SoCs with PBL, u-boot-with-spl-pbl.bin is the final image for
> SPL boot. Drop unused u-boot-with-spl.bin.
>
> Signed-off-by: York Sun
> CC: Ashish Kumar
> CC: Ruchika Gupta
> CC: Priyanka Jain
> CC: Shengzhou Liu
>
Applied to fsl-qoriq, awaitin
On 06/14/2018 02:26 PM, York Sun wrote:
> For SPL boot with PBL, u-boot-with-spl-pbl.bin is the final image.
> Drop unused u-boot-with-spl.bin.
>
> Signed-off-by: York Sun
> CC: Mingkai Hu
> CC: Ruchika Gupta
> CC: Prabhakar Kushwaha
> CC: Udit Agarwal
> CC: Sumit Garg
> CC: Priyanka Jain
>
On 06/08/2018 04:38 PM, York Sun wrote:
> Commit a52ff334c5b1 ("armv8: ls1046ardb: SPL size reduction") reduced
> image size for SPL. IFC was disabled. If PPA is loaded in SPL, MMU is
> enabled as a result. Removing IFC skips IFC region in the MMU table,
> causing later failure in RAM version U-boo
On 07/20/2018 03:00 PM, Jeremy Gebben wrote:
> Pass an empty buffer instead of NULL if the hwconfig environment
> variable isn't set.
>
> Signed-off-by: Jeremy Gebben
> Cc: Stefano Babic
> Cc: York Sun
> ---
Applied to fsl-qoriq, awaiting upstream.
Thanks.
York
On 07/13/2018 02:27 AM, andy.t...@nxp.com wrote:
> From: Yuantian Tang
>
> Remove the old implementation in order to enable DM for sata
>
> Signed-off-by: Tang Yuantian
> ---
> v3:
> - rebase to latest code
> v2:
> - no changes
>
This set has been pplied to fsl-qoriq, awaiting upstrea
On 06/26/2018 02:26 PM, York Sun wrote:
> Enable I-cache for SPL boot to boost performance. Earlier MMU was
> enabled only for LS2080A and has since been dropped by commit
> f539c8a4a7a5 ("armv8: ls2080a: Drop early MMU for SPL build").
>
> Signed-off-by: York Sun
> ---
Applied to fsl-qoriq, awa
On 06/26/2018 04:21 AM, Ashish Kumar wrote:
> Move CONFIG_SPI_FLASH_SPANSION, CONFIG_SPI_FLASH, to defconfig.
> Also disable disable 4K erase size option.
>
> Signed-off-by: Ashish Kumar
> ---
Applied to fsl-qoriq, awaiting upstream.
Thanks.
York
__
On 06/26/2018 02:19 AM, Ashish Kumar wrote:
> 4K erase size is used only in case of hydrid mode which is not
> supported on any NXP platform with flash "s25fs512s".
> Supported mode is uniform sector, with erase size 256kiB.
>
> Signed-off-by: Ashish Kumar
> ---
> v2:
> 1. use make savedefconfig
On 06/20/2018 06:34 AM, Vinitha V Pillai wrote:
> Change address of DPL header in SD
>
> Signed-off-by: Vinitha V Pillai
> ---
Applied to fsl-qoriq, awaiting upstream.
Thanks.
York
___
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On 06/18/2018 05:26 AM, Alison Wang wrote:
> This patch updates the copyright claim for the issues reported by Legal
> Review.
>
> Signed-off-by: Alison Wang
> ---
Applied to fsl-qoriq, awaiting upstream.
Thanks.
York
___
U-Boot mailing list
U-Boot@li
On 06/06/2018 09:40 PM, Vinitha V Pillai wrote:
> CONFIG_SPL_FSL_LS_PPA is needed only in case of falcon boot
> Support for this is not present in PPA currently, so
> removing the default option from defconfig
>
> Signed-off-by: Vinitha V Pillai
> Signed-off-by: Ruchika Gupta
> ---
Applied to f
On 06/04/2018 09:36 AM, Jagdish Gediya wrote:
> use "fsl_mc lazyapply dpl addr" instead of "fsl_mc apply dpl addr"
>
> change dpl load addr to 0x80001000 from 0x8020 because dpl gets
> corrupted at 0x8020 during bootm command excecution.
>
> Signed-off-by: Jagdish Gediya
> ---
> Changes
Initialize the led with the default state defined in device tree
in board_init and solve issue with test for led default state.
Reviewed-by: Simon Glass
Signed-off-by: Patrick Delaunay
---
Led default-state is correctly handle in Sandbox, tested with:
./u-boot -d ./arch/sandbox/dts/test.dtb
Hi,
The commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7
introduce auto probe of LED in binding function
but that cause issue on my board.
This first patch of this patchset activateis the LED on my board
to explain the issue, the second patch revert this commit and
the third one propose an other
Initialize the led with the default state defined in device tree.
Reviewed-by: Simon Glass
Signed-off-by: Patrick Delaunay
---
Changes in v4: None
Changes in v3:
- minor update after Simon review
- include led.h to avoid compilation warning on stm32mp1 board
Changes in v2: None
board/st/stm
This patch save common LED property "default-state" value
in post bind of LED uclass.
The configuration for this default state is only performed when
led_default_state() is called;
It can be called in your board_init()
or it could added in init_sequence_r[] in future.
Signed-off-by: Patrick Delaun
This patch add the 4 LED available on the ED1 board and activated
gpio led driver.
Reviewed-by: Simon Glass
Signed-off-by: Patrick Delaunay
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 24
configs/stm32mp15
This reverts commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7.
because this patch adds the probe of LED driver during the
binding phasis. It is not allowed in driver model because
the drivers (clock, pincontrol) needed by the LED driver can
be also probed before the binding of all the device and
it
Hi Simon,
On Fri, Jul 27, 2018 at 11:51 AM, Bin Meng wrote:
> Hi Simon,
>
> On Fri, Jul 27, 2018 at 8:35 AM, Simon Glass wrote:
>> On 25 July 2018 at 03:39, Bin Meng wrote:
>>> The correct driver data comes from the matching 'id' instead of
>>> 'find_id' in pci_find_and_bind_driver().
>>>
>>> S
Hi Patrick,
> From: Patrick Brünn
> Sent: jeudi 26 juillet 2018 12:40
>
> Hi Patrick,
> sorry, for responding so late, I am in the middle of a vacation at the moment.
It is normal in summer time,
I will be also in holiday at end of next week.
> >From: Patrick Delaunay [mailto:patrick.delau...
Hi
On 07/26/2018 05:14 PM, Tom Rini wrote:
> On Thu, Jul 26, 2018 at 09:35:54AM +0200, Marek Vasut wrote:
>
>> The following changes since commit 323a73adc9a1bf2de43fe03bdd9c3038ce7c2784:
>>
>>mtd: nand: add new enum for storing ECC algorithm (2018-07-23 14:33:21
>> -0400)
>>
>> are available
On 7/27/2018 2:18 PM, Bharat Bhushan wrote:
>
>
>> -Original Message-
>> From: laurentiu.tu...@nxp.com [mailto:laurentiu.tu...@nxp.com]
>> Sent: Friday, July 27, 2018 3:28 PM
>> To: u-boot@lists.denx.de; Prabhakar Kushwaha
>> ; York Sun
>> Cc: Bharat Bhushan ; Horia Geanta
>> ; Laurentiu
On Thu, Jul 26, 2018 at 12:35 PM, Icenowy Zheng wrote:
>
>
> 于 2018年7月26日 GMT+08:00 下午3:02:50, Jagan Teki 写到:
>>On Sat, Jul 21, 2018 at 1:50 PM, Icenowy Zheng wrote:
>>> This patchset trys to add support for Allwinner H6 SoC to U-Boot.
>>>
>>> Allwinner H6 is a quite new Allwinner SoC, with seve
With some recent changes to relevant drivers here the openrd board
(openrd_client in this case) does not fit within its size constraint.
We can however drop the slightly extended baudrate table and then the
duplication of mtdparts/mtdids in the default environment. These
defaults are set in the en
On Fri, Jul 27, 2018 at 11:59:32AM +0200, Lukasz Majewski wrote:
> On Thu, 26 Jul 2018 23:14:01 +0200
> Marek Vasut wrote:
>
> > On 07/26/2018 11:08 PM, Lukasz Majewski wrote:
> > > On Thu, 26 Jul 2018 21:25:02 +0200
> > > Marek Vasut wrote:
> > >
> > >> On 07/26/2018 05:14 PM, Tom Rini wrote
> -Original Message-
> From: laurentiu.tu...@nxp.com [mailto:laurentiu.tu...@nxp.com]
> Sent: Friday, July 27, 2018 3:28 PM
> To: u-boot@lists.denx.de; Prabhakar Kushwaha
> ; York Sun
> Cc: Bharat Bhushan ; Horia Geanta
> ; Laurentiu Tudor
> Subject: [PATCH v5 8/8] armv8: ls1046a: setup
On Thu, 26 Jul 2018 23:14:01 +0200
Marek Vasut wrote:
> On 07/26/2018 11:08 PM, Lukasz Majewski wrote:
> > On Thu, 26 Jul 2018 21:25:02 +0200
> > Marek Vasut wrote:
> >
> >> On 07/26/2018 05:14 PM, Tom Rini wrote:
> >>> On Thu, Jul 26, 2018 at 09:35:54AM +0200, Marek Vasut wrote:
> >>>
From: Laurentiu Tudor
Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.
Signed-off-by: Laurentiu Tudor
---
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 16 +++
.../asm/arch-fsl-layerscape/fsl_portals.h
From: Laurentiu Tudor
Add support for SEC ICID configuration and apply it for ls1046a.
Also add code to make the necessary device tree fixups.
Signed-off-by: Laurentiu Tudor
---
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 14 +++
.../asm/arch-fsl-layerscape/fsl_icid.h| 25 +
From: Laurentiu Tudor
Add infrastructure for ICID setup and device tree fixup on ARM
platforms. This include basic ICID setup for several devices.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/Makefile| 1 +
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 110 +
From: Laurentiu Tudor
Add support for ICID setting of fman ports and the required device
tree fixups.
Signed-off-by: Laurentiu Tudor
---
arch/arm/cpu/armv8/fsl-layerscape/icid.c | 82 +++
.../arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 30 +++
.../asm/arch-fsl-layersca
From: Laurentiu Tudor
Add a define with a value for the missing debug stream ID.
Signed-off-by: Laurentiu Tudor
---
arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch2.h
b/arch/
From: Laurentiu Tudor
QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.
Signed-off-by: Laurentiu Tudor
---
arch/
From: Laurentiu Tudor
The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.
Signed-off-by: Laurentiu Tudor
---
arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscap
From: Laurentiu Tudor
Add defines for the edma and qdma register block base addresses.
Signed-off-by: Laurentiu Tudor
---
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arc
From: Laurentiu Tudor
This patch series adds the required devices setup and device tree
fixups for SMMU enablement on NXP LS1046A chips. The approach taken
tries to mimic the implementation of PAMU LIODN setup on booke powerpc.
First 4 patches contain some fixes and add some missing bits & piece
On Fri, 27 Jul 2018 14:42:32 +0530
Anand Moon wrote:
> Hi Lukasz,
>
> On 27 July 2018 at 13:54, Lukasz Majewski wrote:
> > On Fri, 27 Jul 2018 08:34:15 +0530
> > Anand Moon wrote:
> >
> >> Hi Lukasz,
> >>
> >> On 26 July 2018 at 21:23, Lukasz Majewski wrote:
> >> > Hi Anand,
> >> >
> >>
We've been chasing a problem for a while where we've got USB3 devices
plugged in (on AM3352 board), this is using the musb-new driver.
The symptoms are you plug in a device in and run `usb start` and get
`USB0: Port not available.`, having watched the timings (and from
our reading of the USB spe
> On 27 Jul 2018, at 11:16, Philipp Tomsich
> wrote:
>
> gd->ram_top is assigned to twice on consecutive lines and the compiler
> won't be able to tell that the first assignment is dead (including its
> r-value) due to the r-value containing a (side-effect free) function
> call.
>
> This drops
On Fri, Jul 27, 2018 at 5:16 PM, Philipp Tomsich
wrote:
> gd->ram_top is assigned to twice on consecutive lines and the compiler
> won't be able to tell that the first assignment is dead (including its
> r-value) due to the r-value containing a (side-effect free) function
> call.
>
> This drops th
gd->ram_top is assigned to twice on consecutive lines and the compiler
won't be able to tell that the first assignment is dead (including its
r-value) due to the r-value containing a (side-effect free) function
call.
This drops the first assignment.
Signed-off-by: Philipp Tomsich
---
common/bo
Am 27.07.2018 um 08:42 schrieb Michal Simek:
On 26.7.2018 22:04, Stefan Herbrechtsmeier wrote:
Am 26.07.2018 um 10:22 schrieb Michal Simek:
On 25.7.2018 21:17, Stefan Herbrechtsmeier wrote:
Am 25.07.2018 um 08:07 schrieb Michal Simek:
On 24.7.2018 21:39, Stefan Herbrechtsmeier wrote:
Am 24.0
Hi Lukasz,
On 27 July 2018 at 13:54, Lukasz Majewski wrote:
> On Fri, 27 Jul 2018 08:34:15 +0530
> Anand Moon wrote:
>
>> Hi Lukasz,
>>
>> On 26 July 2018 at 21:23, Lukasz Majewski wrote:
>> > Hi Anand,
>> >
>> >> Hi Lukasz,
>> >>
>> >> On 26 July 2018 at 03:55, Lukasz Majewski wrote:
>> >> >
> On 27 Jul 2018, at 09:50, Carlo Caione wrote:
>
> On Fri, 2018-07-27 at 00:54 +0200, Dr. Philipp Tomsich wrote:
>>> On 26 Jul 2018, at 22:05, Carlo Caione wrote:
>>>
>>> On Thu, 2018-07-26 at 15:59 +0200, Philipp Tomsich wrote:
The calculation in `rockchip_sdram_size` would overflow for
On Thu, 2018-07-26 at 10:10 +0200, Marek Vasut wrote:
> On 07/26/2018 09:54 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Signed-off-by: Tien Fong Chee
> > ---
> > arch/arm/dts/socfpga_arria10.dtsi| 12
> > arch/arm/dts/socfpga_arria10_socd
Add a flash node to fix the detection of the memory IC.
With the changes introduced with commit 8fee8845e754
("enf_sf: reuse setup_flash_device instead of open coding it")
the SPI speed is now read from device-tree or a default value
is applied. This replaced the old behavior of setting the
SPI spe
Am 27.07.2018 um 09:05 schrieb Michal Simek:
On 26.7.2018 21:46, Stefan Herbrechtsmeier wrote:
Am 26.07.2018 um 10:41 schrieb Michal Simek:
On 25.7.2018 20:21, Stefan Herbrechtsmeier wrote:
Am 25.07.2018 um 08:39 schrieb Michal Simek:
On 24.7.2018 21:56, Stefan Herbrechtsmeier wrote:
Am 24.0
On Thu, 2018-07-26 at 11:03 +0200, Michal Simek wrote:
> On 25.7.2018 18:03, Tom Rini wrote:
> >
> > On Wed, Jul 25, 2018 at 09:47:17AM -0600, Simon Glass wrote:
> > >
> > > Hi,
> > >
> > > On 25 July 2018 at 03:48, Michal Simek
> > > wrote:
> > > >
> > > >
> > > > On 25.7.2018 08:31, Chee, T
On Fri, 27 Jul 2018 08:34:15 +0530
Anand Moon wrote:
> Hi Lukasz,
>
> On 26 July 2018 at 21:23, Lukasz Majewski wrote:
> > Hi Anand,
> >
> >> Hi Lukasz,
> >>
> >> On 26 July 2018 at 03:55, Lukasz Majewski wrote:
> >> > This commit allows by default booting Odroid XU3 from the SD card
> >>
On Thu, 2018-07-26 at 12:29 +0200, Michal Simek wrote:
> On 26.7.2018 11:23, Chee, Tien Fong wrote:
> >
> > On Wed, 2018-07-25 at 11:48 +0200, Michal Simek wrote:
> > >
> > > On 25.7.2018 08:31, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Wed, 2018-07-18 at 16:48 +0200, Michal Simek wrote
On Fri, Jul 27, 2018 at 1:26 AM Tom Rini wrote:
>
> On Thu, Jul 26, 2018 at 09:31:08AM +0100, Alex Kiernan wrote:
> > On Fri, Jul 20, 2018 at 11:34 PM Tom Rini wrote:
> > >
> > > On Thu, Jul 05, 2018 at 12:38:15PM +, Alex Kiernan wrote:
> > >
> > > > The test for (CONFIG_BOOTDELAY >= 0) has b
Hi Tom,
On gio, 2018-07-26 at 20:29 -0400, Tom Rini wrote:
> On Thu, Jul 26, 2018 at 10:16:01PM +0200, Goldschmidt Simon wrote:
>
> >
> > + Tom:
> >
> > I don't know via which tree this would go in. I think you took the
> > last env
> > changes directly?
> >
> > v1..v4 are detached threads, I
Hi All,
I plan to send out V3 early next week. QXP BETA2 has been external released, so
there will be update in README including link to scfw images.
Paste the link here first:
https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-0.7.bin, use
mx8qx-mek-scfw-tcm.bin for b0 chip.
Troy, Fabi
On Fri, 2018-07-27 at 00:54 +0200, Dr. Philipp Tomsich wrote:
> > On 26 Jul 2018, at 22:05, Carlo Caione wrote:
> >
> > On Thu, 2018-07-26 at 15:59 +0200, Philipp Tomsich wrote:
> > > The calculation in `rockchip_sdram_size` would overflow for 4GB
> > > on
> > > 32bit systems (i.e. when PHYS_64BI
On 26.7.2018 21:46, Stefan Herbrechtsmeier wrote:
> Am 26.07.2018 um 10:41 schrieb Michal Simek:
>> On 25.7.2018 20:21, Stefan Herbrechtsmeier wrote:
>>> Am 25.07.2018 um 08:39 schrieb Michal Simek:
On 24.7.2018 21:56, Stefan Herbrechtsmeier wrote:
> Am 24.07.2018 um 12:31 schrieb Michal S
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