Hi, Stefan,
Thank you for review and sorry for missing your earlier notes.
It was not intentional.
I will prepare a new patch version with all the fixes.
Regards
Kosta
-Original Message-
From: Stefan Roese [mailto:s...@denx.de]
Sent: Tuesday, December 06, 2016 08:22
To: Kostya Porotchki
From: Tien Fong Chee
This is initial version of device tree for the Intel socfpga arria10
development kit with sdmmc.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh Nguyen
Cc: Chin Liang See
Cc: Tien Fong
---
arch/arm/dts/Makefile |3 +-
arch/arm/dts/s
From: Hou Zhiqiang
The unit-address should be the same as the I2C address of the device.
Signed-off-by: Hou Zhiqiang
---
arch/arm/dts/fsl-ls1043a-rdb.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1043a-rdb.dts b/arch/arm/dts/fsl-ls1043a-rdb.dts
From: Hou Zhiqiang
Corrected the ranges table of the IFC node.
Signed-off-by: Hou Zhiqiang
---
arch/arm/dts/fsl-ls1043a-qds.dtsi | 12 ++--
arch/arm/dts/fsl-ls1043a-rdb.dts | 4 ++--
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi
b/a
On 04.12.2016 17:12, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Add pin control nodes to APN806, CP-master, CP-slave and
Armada-7040 and Armada-8040 boards DTS files
Changes for v2:
- Remove Gerrit Change ID
- Fix comments
- Fix wrong function values
- Add missing cpm_i2c0 node to a
Hi Tom,
2016-12-06 1:02 GMT+09:00 Tom Rini :
> On Sun, Dec 04, 2016 at 10:23:10PM +0900, Masahiro Yamada wrote:
>
>> Commit 7a777f6d6f35 ("mmc: Add generic Kconfig option") created
>> a Kconfig entry for this option without any actual moves, then
>> commit 44c798799f66 ("sunxi: Use Kconfig CONFIG_
On 04.12.2016 17:12, kos...@marvell.com wrote:
> From: Konstantin Porotchkin
>
> Add support for mvebu bubt command for flash image
> load, check and burn on boot device.
>
> Changes for v2:
> - Add "bubt" documentation
> - Fix code syntax
>
> Signed-off-by: Konstantin Porotchkin
> Cc: Stefan
Hi Kosta,
On 04.12.2016 17:12, kos...@marvell.com wrote:
From: Konstantin Porotchkin
Align the Armada-8040-db and Armada-7040-db SPI and I2C
DTS settings with latest DB settings:
- 8040-db: disable i2c0 and spi0 on AP (MPPs are reserved for SDIO)
- 8040-db: disable cps_i2c0 on CP1
- 8040-db: e
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
arch/arm/dts/fsl-ls1046a.dtsi | 49 +++
1 file changed, 49 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
arch/arm/dts/fsl-ls1012a.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 024527e..c4ca9c1 100644
---
From: Minghuan Lian
There may be multiple PCIe controllers in a SoC.
It is not correct that always calling pci_bus_to_hose(0) to get
the first PCIe controller for the PCIe device connected other
controllers. We just remove this calling because hose always point
the correct PCIe controller.
Signe
Hi,
On Thursday 01 December 2016 09:41 AM, Vignesh R wrote:
[...]
>>> Data slave port does accept byte, half-word and word access, there
>>> are
>>> no data aborts. But indirect write controller seems to have
>>> limitation(as documented in section 11.15.4.9.2) couping with non 32-
>>> bit
>>> dat
From: Minghuan Lian
All Layerscape SoCs have supported new PCIe driver based on DM.
The lagecy PCIe driver code is unused and can be removed.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- Generated the patch based on the updated code.
drivers/pci/pcie_layerscape.c
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
V4:
- New patch
arch/arm/cpu/armv7/ls102xa/Kconfig| 8
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 11 +++
drivers/pci/pcie_layerscape_fixup.c | 8
include/configs/ls1012aqds.h | 1 -
in
From: Minghuan Lian
The patch enables PCIe and E1000 in ls1046a related defconfigs.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
configs/ls1046aqds_defconfig | 6 ++
configs/ls1046aqds_nand_defconfig| 6 ++
configs/ls1046aqds_qspi_
From: Minghuan Lian
The patch enables PCIe in ls2080a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
.../include/asm/arch-fsl-layerscape/immap_lsch3.h | 8
configs/ls2080aqds_SECURE_BOOT_defco
From: Minghuan Lian
The patch enables PCIe and E1000 in ls1043a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
configs/ls1043aqds_defconfig | 7 ++-
configs/ls1043aqds_lpuart_defconfig
From: Minghuan Lian
The patch enables PCIe and E1000 in ls1012a defconfigs and
removes unused PCIe related macro defines
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
configs/ls1012afrdm_qspi_defconfig | 5 +
configs/ls1012aqds_qspi_defconfig | 5 -
From: Minghuan Lian
The patch enables PCIe in ls1021a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- Added ls1021aiot boards support.
configs/ls1021aiot_qspi_defconfig | 4
configs/ls1021ai
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
arch/arm/dts/fsl-ls2080a.dtsi | 60 +++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index
From: Minghuan Lian
There are more than five kinds of Layerscape SoCs. unfortunately,
PCIe controller of each SoC is a little bit different. In order
to avoid too many macro definitions, the patch addes a new
implementation of PCIe driver based on DM. PCIe dts node is
used to describe the differe
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
arch/arm/dts/ls1021a.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 37be169..c40d87c 100644
From: Minghuan Lian
for the legacy PCI driver, the function pci_bus_to_hose() returns
the real PCIe controller. To keep consistency, this function is
changed to return the PCIe controller pointer of the root bus
instead of the current PCIe bus.
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zh
From: Minghuan Lian
Signed-off-by: Minghuan Lian
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
arch/arm/dts/fsl-ls1043a.dtsi | 46 +++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index
From: Hou Zhiqiang
Enable DT to support Driver Model.
Signed-off-by: Hou Zhiqiang
---
V4:
- No change
configs/ls1021aqds_nand_defconfig | 3 +++
configs/ls1021aqds_nor_SECURE_BOOT_defconfig| 2 ++
configs/ls1021atwr_nor_SECURE_BOOT_defconfig| 2 ++
configs/l
The following changes since commit 3cfb67d0419c645998b440592d8c2ce010134b8e:
Prepare v2017.01-rc1 (2016-12-05 18:36:23 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-socfpga.git master
for you to fetch changes up to f22dede20bb57195330ef11e148ca2b5f1280b2e:
MAINT
The following changes since commit 3cfb67d0419c645998b440592d8c2ce010134b8e:
Prepare v2017.01-rc1 (2016-12-05 18:36:23 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-usb.git master
for you to fetch changes up to 555a347209000f8655ca637a5a04f7275a2fb999:
usb: xhci
Hi Heiko,
Thanks again for the help.
Been testing the RK3288 Ethernet and it works pretty good. One
thing I was wondering about was that I seemed to have to have:
CONFIG_NET_RANDOM_ETHADDR=y
or I get:
Error: ethernet@ff29 address not set.
Is there a better way?
Another issue w
On Mon, Dec 05, 2016 at 04:21:26PM -0600, Andrew F. Davis wrote:
> Currently we let U-Boot find a spot at the end of DRAM at runtime, this
> forces us to build an OPTEE image based on the size of DRAM for an EVM.
> Add a default address that works across all current AM57xx EVMs.
>
> Signed-off-by
On Mon, Dec 05, 2016 at 04:21:25PM -0600, Andrew F. Davis wrote:
> Currently we let U-Boot find a spot at the end of DRAM at runtime, this
> forces us to build an OPTEE image based on the size of DRAM for an EVM.
> Add a default address that works across all current DRA7xx EVMs.
>
> Signed-off-by
Hey all,
It's release day and v2017.01-rc1 is out and the merge window is closed.
I've updated git and the tarballs are also up now.
I plan on doing -rc2 on the 19th. My queue is, I think, looking good
but I'll take another good hard look at things soon.
Thanks all!
--
Tom
signature.asc
Des
On Mon, Dec 05, 2016 at 07:39:09PM +, york sun wrote:
> Tom,
>
> The following changes since commit 5102af4d2f53ec8d76ce60d103c65ae062b9c8fe:
>
>sata: sata_mv: Fix misaligned cache warnings (2016-12-05 13:53:42 +0100)
>
> are available in the git repository at:
>
>git://git.denx.de
On Mon, Dec 05, 2016 at 04:15:37PM +0100, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-i2c.git master
>
> The following changes since commit 194eded14ccb40af18e1a9fb8ab85903ee0803ef:
>
> Merge git://git.denx.de/u-boot-mpc85xx (2016-12-04 13:55:15 -0500)
>
> are available in
On Mon, Dec 05, 2016 at 01:52:28AM +, Andre Przywara wrote:
> Since the SPL FIT loader can now differentiate between different
> architectures, teach it how to tell arm and arm64 apart when a FIT
> image is used.
> We just support those two for now, as these are so far the only sensible
> alte
On Mon, Dec 05, 2016 at 01:52:27AM +, Andre Przywara wrote:
> At the moment we use the arch/arm directory for arm64 boards as well,
> so the Makefile will pick up the "arm" name for the architecture to use
> for tagging binaries in U-Boot image files.
> Differentiate between the two by looking
Hi Stefano,
On Mon, Dec 5, 2016 at 1:01 PM, Stefano Babic wrote:
> Hi Jagan,
>
> On 02/12/2016 14:57, Jagan Teki wrote:
>> Hi Stefano,
>>
>> On Tue, Nov 29, 2016 at 11:22 PM, Stefano Babic wrote:
>>> Hi Jagan,
>>>
>>> On 28/10/2016 15:57, Jagan Teki wrote:
From: Jagan Teki
Added
From: Jagan Teki
Add I2C support for Engicam i.CoreM6 qdl board.
icorem6qdl> i2c bus
Bus 0: i2c@021a
Bus 1: i2c@021a4000
Bus 2: i2c@021a8000
icorem6qdl> i2c dev 2
Setting bus to 2
icorem6qdl> i2c speed 10
Setting bus speed to 10 Hz
icorem6qdl> i2c probe
Valid chip addresses: 2C
ic
From: Jagan Teki
Better to print the hex value for bus address instead of
decimal, for more readbility on bus addressing.
Before:
--
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 35274752, no gpio pinctrl state.
After:
--
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 0x21a4000, no g
From: Jagan Teki
Add custom splashscreen, engicam.bmp support for
Engicam i.CoreM6 qdl board.
Cc: Anatolij Gustschin
Cc: Stefano Babic
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
include/configs/imx6qdl_icore.h | 2 ++
tools/logos/engicam.bmp | Bin 0 -> 60
From: Jagan Teki
Some I2C bus devicetree nodes, doesn't require to have
gpio pinctrl so replace the dev_info to debug so the
print never comes on the console and for bus that uses
gpio pinctrl anyway have dev_err.
Before:
--
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 0x21a4000, no gpio
From: Jagan Teki
Added kconfig entry for CONFIG_VIDEO_IPV3 driver.
Cc: Anatolij Gustschin
Cc: Stefano Babic
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
drivers/video/Kconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/video/Kconfig b/drivers/v
From: Jagan Teki
Add IPUv3 framebuffer support for Engicam i.CoreM6 qdl board.
Cc: Anatolij Gustschin
Cc: Stefano Babic
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
board/engicam/icorem6/icorem6.c | 113 +++
configs/imx6qdl_icore_
From: Jagan Teki
Use CONFIG_DM_ETH and remove board_eth_init code
from board files.
Cc: Joe Hershberger
Cc: Peng Fan
Cc: Stefano Babic
Cc: Michael Trimarchi
Acked-by: Joe Hershberger
Signed-off-by: Jagan Teki
---
arch/arm/cpu/armv7/mx6/Kconfig | 1 +
board/engicam/icorem6/icorem6.c
From: Jagan Teki
Added kconfig for SYS_I2C_MXC driver.
Cc: Stefano Babic
Cc: Heiko Schocher
Cc: Matteo Lisi
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
drivers/i2c/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 15
From: Jagan Teki
Add FEC dts support for Engicam i.CoreM6 dql modules.
Cc: Stefano Babic
Cc: Matteo Lisi
Cc: Michael Trimarchi
Acked-by: Joe Hershberger
Signed-off-by: Jagan Teki
---
arch/arm/dts/imx6qdl-icore.dtsi | 24
1 file changed, 24 insertions(+)
diff --git
From: Jagan Teki
- Remove exctra space
- Add space
- Add tab space
- Fix single line comments quotes
- Fix 'CHECK: Avoid CamelCase'
- Fix 'CHECK: Alignment should match open parenthesis'
- Fix 'WARNING: line over 80 characters'
- Re-arrage header include files
Cc: Simon Glass
Cc: Peng Fan
Cc:
From: Jagan Teki
Add .read_rom_hwaddr on dm eth_ops.
Cc: Stefano Babic
Cc: Matteo Lisi
Cc: Michael Trimarchi
Acked-by: Joe Hershberger
Signed-off-by: Jagan Teki
---
drivers/net/fec_mxc.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/net/fec_
From: Jagan Teki
This patch add driver model support for fec_mxc driver.
Cc: Simon Glass
Cc: Joe Hershberger
Cc: Peng Fan
Cc: Stefano Babic
Cc: Michael Trimarchi
Signed-off-by: Jagan Teki
---
Changes for v3:
- Removed the stub functions[1] and revert back to previous changes where
#ifdef
From: Jagan Teki
fec_get_hwaddr never used eth_device argument, hence removed.
Cc: Simon Glass
Cc: Peng Fan
Cc: Stefano Babic
Cc: Michael Trimarchi
Acked-by: Joe Hershberger
Signed-off-by: Jagan Teki
---
drivers/net/fec_mxc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
dif
From: Jagan Teki
This series support framebuffer and I2C on top of u-boot-imx.git with
latest u-boot.git merge.
fec_mxc dm driver on previous version series trigger an issues with
when DM_ETH not-defined so, this series have fixes for non-dm builds
as well.
Changes for v3:
- Fix fec_mxc driver
On Mon, Dec 05, 2016 at 01:52:26AM +, Andre Przywara wrote:
> Read the specified "arch" value from a legacy or FIT U-Boot image and
> store it in our SPL data structure.
> This allows loaders to take the target architecture in account for
> custom loading procedures.
> Having the complete stri
Hi Simon,
On 11/23/2016 10:34 PM, Simon Glass wrote:
> Driver-model I2C support was added about 2 years ago. So far a little over
> half of the driveres have been converted. This series sets a timeline for
> conversion of the rest by June next year.
>
> The Samsung I2C driver was one of the first
On 11/14/2016 06:33 PM, Simon Glass wrote:
> Hi Andrew,
>
> On 14 November 2016 at 15:05, Andrew F. Davis wrote:
>> On 11/14/2016 02:44 PM, Simon Glass wrote:
>>> Hi Andrew,
>>>
>>> On 14 November 2016 at 12:14, Andrew F. Davis wrote:
Introduce CONFIG_SPL_ABORT_ON_NON_FIT_IMAGE. An SPL whic
On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
> From: Stefan Herbrechtsmeier
>
> The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base
> clock frequency but this clock is not fixed and depends on the hardware
> configuration. Additionally the value of CONF
On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
> From: Stefan Herbrechtsmeier
>
> The maximum supported peripheral clock frequency of the zynq depends on
> the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz
> respectively 25 MHz. Use the max-frequency val
On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
> From: Stefan Herbrechtsmeier
>
> The index of the zynq serial driver is always zero and could be removed.
>
> Signed-off-by: Stefan Herbrechtsmeier
> Acked-by: Michal Simek
Even if this patch is delegated to Michal, i pic
On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
> From: Stefan Herbrechtsmeier
>
> The sdhci controller assumes that the base clock frequency is fully supported
> by
> the peripheral and doesn't support hardware limitations. The Linux kernel
> distinguishes between base cloc
Currently we let U-Boot find a spot at the end of DRAM at runtime, this
forces us to build an OPTEE image based on the size of DRAM for an EVM.
Add a default address that works across all current AM57xx EVMs.
Signed-off-by: Andrew F. Davis
---
configs/am57xx_hs_evm_defconfig | 3 +++
1 file chan
Currently we let U-Boot find a spot at the end of DRAM at runtime, this
forces us to build an OPTEE image based on the size of DRAM for an EVM.
Add a default address that works across all current DRA7xx EVMs.
Signed-off-by: Andrew F. Davis
---
configs/dra7xx_hs_evm_defconfig | 3 +++
1 file chan
2016-12-05 17:34 GMT+01:00 Tom Rini :
> On Sun, Dec 04, 2016 at 08:52:35PM +0100, Mirza Krak wrote:
>> Hi.
>>
>> Recently a check was added to if new ad-hoc CONFIG options where added
>> and produced an error. The exact commit is [1].
>>
>> While building (2016.11) with some out of tree files in in
On Mon, Dec 05, 2016 at 01:52:13AM +, Andre Przywara wrote:
> Since entry_point and load_addr are addresses, they should be
> represented as longs to cover the whole address space and to avoid
> warning when compiling the SPL in 64-bit.
> Also adjust debug prints to add the 'l' specifier, wher
On Mon, Dec 05, 2016 at 01:52:09AM +, Andre Przywara wrote:
> The predominantely 32-bit ARM targets try to compile the SPL in Thumb
> mode to reduce code size.
> The 64-bit AArch64 instruction set does not know an alternative, concise
> encoding, so the Thumb build option should only be set fo
On Mon, Dec 05, 2016 at 01:52:10AM +, Andre Przywara wrote:
> For boards that call s_init() when the SPL runs, we are expected to
> setup an early stack before calling this C function.
> Implement the proper AArch64 version of this based on the ARMv7 code.
> This allows sunxi boards to setup t
On 11/30/2016 06:27 PM, Yuan Yao wrote:
> From: Yuan Yao
>
> The default configuration for QSPI AHB bus can't support 16MB+.
> But some flash on NXP layerscape board are more than 16MB.
>
> Signed-off-by: Yuan Yao
> ---
> Changed in v3:
> Rename the CONFIG_SYS_QSPI_ADDR to SYS_FSL_QSPI_ADDR
On 11/20/2016 07:49 PM, Shengzhou Liu wrote:
> Fix following warning in case multiple erratum macro was not defined.
> warning: unused variable 'tmp'
> warning: unused variable 'ddr_freq'
>
> Signed-off-by: Shengzhou Liu
> ---
> v2: fix compile issue on some platforms.
>
> drivers/ddr/fsl/fsl_ddr
Hi Maxime,
On Sun, Dec 4, 2016 at 8:19 AM, Jagan Teki wrote:
> On Tue, Nov 22, 2016 at 6:08 PM, Maxime Ripard
> wrote:
>> The CHIP Pro is a SoM made by NextThing Co, and that embeds a GR8 SIP, an
>> AXP209 PMIC, a WiFi BT chip and a 512MB SLC NAND.
>>
>> Since the first Allwinner device coming w
On 11/29/2016 07:39 PM, Yuan Yao wrote:
> From: Yuan Yao
>
> Add the name for register space and memory space.
> <0x155 0x1 > is the QSPI register space.
> <0x4000 0x400> is the QSPI memory space.
>
> Signed-off-by: Yuan Yao
> ---
> Changed in v2:
> Updated the commit messag
On 11/29/16 at 05:25pm, Tom Rini wrote:
> On Tue, Nov 29, 2016 at 10:17:42PM +0100, Maxime Ripard wrote:
> > Hi Tom,
> >
> > On Tue, Nov 29, 2016 at 04:11:38PM -0500, Tom Rini wrote:
> > > On Tue, Nov 29, 2016 at 09:39:32PM +0100, Maxime Ripard wrote:
> > > > On Mon, Nov 28, 2016 at 02:20:10PM +01
On 11/30/2016 08:00 PM, Changming Huang wrote:
> Enable the errata-a005697 for ls1012a
>
> Signed-off-by: Changming Huang
> ---
> changes in v2:
> - change the macro to ARM64
>
Applied to fsl-qoriq master, awaiting upstream. Thanks.
York
___
U-Boot
On 11/29/2016 03:15 AM, Priyanka Jain wrote:
> Signed-off-by: Priyanka Jain
> ---
> arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
Applied to fsl-qoriq master, awaiting upstream. Thanks.
York
__
On 11/20/2016 07:49 PM, Shengzhou Liu wrote:
> - add additional function erratum_a009942_check_cpo to check if the
> board needs tuning CPO calibration for optimal setting.
> - move ERRATUM_A009942(with revision to check cpo_sample option) from
> fsl_ddr_gen4.c to ctrl_regs.c for reuse on all D
Tom,
The following changes since commit 5102af4d2f53ec8d76ce60d103c65ae062b9c8fe:
sata: sata_mv: Fix misaligned cache warnings (2016-12-05 13:53:42 +0100)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git
for you to fetch changes up to dd2ad2f1318975da1cf64cf
On Sun, Dec 04, 2016 at 10:23:14PM +0900, Masahiro Yamada wrote:
> This is an user-unconfigurable option that is selected by the
> drivers that need to overwrite SDHCI IO memory accessors.
> (BCM2835 SDHCI seems the only driver that needs to do so.)
>
> Signed-off-by: Masahiro Yamada
Reviewed-b
On Sun, Dec 04, 2016 at 10:23:11PM +0900, Masahiro Yamada wrote:
> Currently, CONFIG_MMC is not related to any other options by
> "depends on" or "select". One of big advantages of using Kconfig
> is automatic dependency tracking, but the current state is lacking
> it. As the first step, make th
On Sun, Dec 04, 2016 at 10:23:13PM +0900, Masahiro Yamada wrote:
> While I moved the options, I also renamed them so that they are all
> prefixed with MMC_SDHCI_.
[snip]
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 8e9fa2d..4785d71 100644
> --- a/drivers/mmc/Kconfig
> +++ b/dri
On Mon, Dec 05, 2016 at 07:15:21PM +0100, Fabien Parent wrote:
> The configuration used to error correction was not in line with what
> linux and the ROM code is using. Fix it by using the correct
> configuration. Now u-boot and the SPL are able to read correctly
> anything written by them.
>
> S
On Mon, Dec 05, 2016 at 07:15:20PM +0100, Fabien Parent wrote:
> A size of 0x200 seems way too short for u-boot. Increase the size
> to 512k.
>
> Signed-off-by: Fabien Parent
Reviewed-by: Tom Rini
--
Tom
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On Mon, Dec 05, 2016 at 07:11:34PM +0100, Fabien Parent wrote:
> Stop booting legacy uImage and now boot zImage.
>
> Signed-off-by: Fabien Parent
> ---
> configs/omapl138_lcdk_defconfig | 1 +
> include/configs/omapl138_lcdk.h | 8
> 2 files changed, 5 insertions(+), 4 deletions(-)
>
>
On Mon, Dec 05, 2016 at 06:01:48PM +, Ryan Harkin wrote:
> Hi Tom,
>
[snip]
> At the moment, the BASE_FVP_DRAM version is a clone of the BASE_FVP
> code, just with a different bootcmd. Now the AARCH32 is another clone
> with CPU_V7 and bootz instead of booti.
>
> I'd be interested to know if
The nanopi already had the CONFIG_SUN8I_EMAC=y enabled in it's defconfig
file, but was missing the &emac the device tree entry.
Signed-off-by: Jelle van der Waa
---
arch/arm/dts/sun8i-h3-nanopi-neo.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/dts/sun8i-h3-nanopi-
Hi Michael,
> -Original Message-
> From: Michael Kurz [mailto:michi.k...@gmail.com]
> Sent: Monday, December 05, 2016 9:21 AM
> To: Vikas MANOCHA
> Cc: Joe Hershberger ; Michael Kurz
> ; u-boot@lists.denx.de; Toshifumi
> NISHINAGA ; Albert Aribaud
> ; Joe Hershberger
> ; Kamil Lulko
>
The configuration used to error correction was not in line with what
linux and the ROM code is using. Fix it by using the correct
configuration. Now u-boot and the SPL are able to read correctly
anything written by them.
Signed-off-by: Fabien Parent
---
include/configs/omapl138_lcdk.h | 10 +
A couple of issue made the NAND accesses unreliable. This patchset aims to
fix all the NAND issues with the OMAP-L138-LCDK.
Fabien Parent (2):
davinci: omapl138_lcdk: increase u-boot load size
davinci: omapl138_lcdk: fix bad NAND ECC config
include/configs/omapl138_lcdk.h | 12 ++--
A size of 0x200 seems way too short for u-boot. Increase the size
to 512k.
Signed-off-by: Fabien Parent
---
include/configs/omapl138_lcdk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index 9e11f7dc95..2101
Stop booting legacy uImage and now boot zImage.
Signed-off-by: Fabien Parent
---
configs/omapl138_lcdk_defconfig | 1 +
include/configs/omapl138_lcdk.h | 8
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
i
In spi_flash_scan, 'ret' is initialled to -1, but 'ret' is not always
used to store a return value, in that case, even when the function
succeed, an error (-1) will be returned.
Lets just return 0 if we hit the end of the function.
Signed-off-by: Fabien Parent
---
drivers/mtd/spi/spi_flash.c | 4
Hi Tom,
On 5 December 2016 at 17:13, Tom Rini wrote:
> On Mon, Dec 05, 2016 at 04:11:45PM +, Ryan Harkin wrote:
>
>> The ARM AEMv8 FVP model can be run in Aarch64 or Aarch32 mode. Aarch32
>> support is enable per-CPU when launching the model, eg:
>>
>> -C cluster0.cpu0.CONFIG64=0
>>
>> This p
Hi Michael,
> -Original Message-
> From: Michael Kurz [mailto:michi.k...@gmail.com]
> Sent: Monday, December 05, 2016 9:37 AM
> To: Vikas MANOCHA
> Cc: Michael Kurz ; u-boot@lists.denx.de; Simon Glass
> ; Albert Aribaud
> ; Toshifumi NISHINAGA ;
> Joe Hershberger
> Subject: Re: [PATCH
Hi Vikas,
On Thu, 1 Dec 2016, vikas wrote:
Hi,
On 11/24/2016 11:10 AM, Michael Kurz wrote:
This patch adds glue code required for enabling the designware
mac on stm32f7 devices.
ethernet is not working at my end, is it working at your end.
Just tested it again with a clean clone of u-bo
Hi Michael,
> -Original Message-
> From: Michael Kurz [mailto:michi.k...@gmail.com]
> Sent: Monday, December 05, 2016 9:04 AM
> To: Vikas MANOCHA
> Cc: Michael Kurz ; u-boot@lists.denx.de; Heiko Schocher
> ; Simon Glass ;
> Masahiro Yamada ; York Sun ;
> Lokesh Vutla ; Ian
> Campbell ;
Hi Vikas,
On Thu, 1 Dec 2016, Vikas MANOCHA wrote:
Thanks Joe for your feedback,
-Original Message-
From: Joe Hershberger [mailto:joe.hershber...@gmail.com]
Sent: Thursday, December 01, 2016 11:13 AM
To: Vikas MANOCHA
Cc: Michael Kurz ; u-boot@lists.denx.de; Toshifumi NISHINAGA
; A
On Mon, Dec 05, 2016 at 04:11:45PM +, Ryan Harkin wrote:
> The ARM AEMv8 FVP model can be run in Aarch64 or Aarch32 mode. Aarch32
> support is enable per-CPU when launching the model, eg:
>
> -C cluster0.cpu0.CONFIG64=0
>
> This patch adds a new defconfig and some variant specific selections
Hi Vikas,
On Thu, 1 Dec 2016, vikas wrote:
Hi Michael,
On 11/24/2016 11:10 AM, Michael Kurz wrote:
This patch adds the DTS source files needed for stm32f746-disco board
The files are based on the stm32f429/469 files from current linux
kernel.
Signed-off-by: Michael Kurz
Acked-by: Vikas MANO
On Mon, Dec 05, 2016 at 01:23:08PM +0100, Christian Gmeiner wrote:
> The section header address is a VMA whereas the address found in
> the program header is a physical one. With this change it is
> possible to load and start a vx7 intel generic based image.
>
> $ readelf -l /tmp/vx7
>
> Elf fil
Hi Vikas,
On Wed, 30 Nov 2016, Vikas MANOCHA wrote:
Hi Michael,
-Original Message-
From: Michael Kurz [mailto:michi.k...@gmail.com]
Sent: Thursday, November 24, 2016 11:11 AM
To: u-boot@lists.denx.de
Cc: Michael Kurz ; Albert Aribaud ;
Vikas MANOCHA
Subject: [PATCH v3 1/9] ARM: DTS:
On Thu, Dec 1, 2016 at 4:37 PM, Breno Lima wrote:
> Add thermal support on the Kconfig file.
>
> Signed-off-by: Breno Lima
Reviewed-by: Fabio Estevam
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On Thu, Dec 1, 2016 at 4:37 PM, Breno Lima wrote:
> It's not necessary to define the console option as we use the distro config.
>
> Signed-off-by: Breno Lima
Reviewed-by: Fabio Estevam
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On Thu, Dec 1, 2016 at 4:37 PM, Breno Lima wrote:
> It's not necessary to define the mmcautodetect as it is not used anywhere.
>
> Signed-off-by: Breno Lima
Reviewed-by: Fabio Estevam
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On Thu, Dec 1, 2016 at 4:37 PM, Breno Lima wrote:
> Change board_string() function to static because it's being used locally.
>
> Signed-off-by: Breno Lima
Reviewed-by: Fabio Estevam
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On Thu, Dec 1, 2016 at 4:37 PM, Breno Lima wrote:
> It's not necessary to support USDHC3 in U-Boot as it's being used for
> the WLAN.
>
> Signed-off-by: Breno Lima
Reviewed-by: Fabio Estevam
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