Hi York,
On Wed, Jan 13, 2016 at 1:52 AM, York Sun wrote:
>
>
> On 01/11/2016 10:38 PM, Bin Meng wrote:
>> Before we switch to use driver model ethernet support, disable
>> CONFIG_E1000 temporarily as with driver model ethernet, E1000
>> driver depends on driver model PCI which is not ready on th
Hi Bhuvan,
On Wed, Jan 13, 2016 at 1:49 PM, Bhuvanchandra DV
wrote:
> Hi Bin,
>
> With reference to the discussion here[1].
>
> Unfortunately the lpuart driver is now broken for legacy code and also
> the driver doesn't
> work with serial driver model enabled on Toradex Colibri VF50/VF61,
> Frees
Hi Simon,
Just know our guys are upstreaming our reboot mode support with our
legacy reboot mode definitions(in our legacy loader & kernel):
https://lkml.org/lkml/2015/12/21/161
and that serial seems close to get accepted, so i think maybe i should
use that definitions too...
On 2016-1-8 18
Hello Albert,
Am 12.01.2016 um 15:25 schrieb Albert ARIBAUD:
Hello Heiko,
On Tue, 12 Jan 2016 11:48:17 +0100, Heiko Schocher wrote:
Hello Albert,
Am 12.01.2016 um 11:26 schrieb Albert ARIBAUD:
(cc:ing Heiko as the maintainer for axm/taurus)
Hello,
AXM is currently the only board failing '
Hello Ladislav,
Am 12.01.2016 um 23:17 schrieb Ladislav Michl:
Hi Heiko,
On Tue, Jan 12, 2016 at 10:08:21AM +0100, Heiko Schocher wrote:
Am 11.01.2016 um 13:58 schrieb Ladislav Michl:
On Mon, Jan 11, 2016 at 07:20:06AM +0100, Heiko Schocher wrote:
Beside of that, this patch does not apply ..
This driver is designed so generic that clock should also be handled
in a generic way.
Like the one in Linux (drivers/usb/host/ehci-platform.c), get and
enable clock(s) via Device Tree if present.
Signed-off-by: Masahiro Yamada
---
This patch depends on new features that are still under review:
Masahiro Yamada (6):
clk: fix comments in include/clk.h
clk: add needed include and declaration to include/clk.h
clk: add static qualifier to local functions
clk: change the type of return value to long
clk: add API to enable clock
clk: add device tree support for clock framework
dr
The comments in include/clk.h state "or -ve error code" for these
functions, and actually the functions return negative error code
here and there. Returning unsigned value is not suitable.
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/clk/clk-uclass.c | 8
drivers/
This header uses ulong, so it needs to include .
Likewise, "struct udevice" must be declared before it is used.
Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
---
Changes in v2: None
include/clk.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/clk.h b/include/clk.h
inde
The comment about get_periph_rate() is the same as that of
set_periph_rate().
I am fixing typos here and there while I am in this file.
Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
---
Changes in v2: None
include/clk.h | 20 ++--
1 file changed, 10 insertions(+), 10 d
Add device tree binding support for the clock uclass. This allows
clock consumers to get the peripheral ID based on the "clocks"
property in the device tree.
Usage:
Assume the following device tree:
clk: myclock {
compatible = "myclocktype";
#clock-cells = <1>;
};
uart
Signed-off-by: Masahiro Yamada
---
Changes in v2: None
drivers/clk/clk_rk3036.c | 2 +-
drivers/clk/clk_rk3288.c | 2 +-
drivers/clk/clk_sandbox.c | 5 +++--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk_rk3036.c b/drivers/clk/clk_rk3036.c
index 6c802b6..f6508
The most basic thing for clock is to enable it, but it is missing
in this uclass.
Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
---
Changes in v2:
- Add clk_enable() function
drivers/clk/clk-uclass.c | 10 ++
include/clk.h| 18 ++
2 files changed,
On Tuesday, January 05, 2016 at 05:16:05 PM, Marek Vasut wrote:
> On Tuesday, January 05, 2016 at 04:51:47 PM, Chin Liang See wrote:
> > On Tue, 2016-01-05 at 15:36 +0100, Marek Vasut wrote:
> > > On Tuesday, January 05, 2016 at 06:00:04 AM, Chin Liang See wrote:
> > > > Per DesignWare USB OTG data
On Wednesday, January 13, 2016 at 03:45:46 AM, Chin Liang See wrote:
> On Wed, 2016-01-13 at 03:34 +0100, Marek Vasut wrote:
> > On Wednesday, January 13, 2016 at 03:23:38 AM, Chin Liang See wrote:
> > > On Wed, 2016-01-13 at 03:07 +0100, Marek Vasut wrote:
> > > > On Wednesday, January 13, 2016 at
On Wed, 2016-01-13 at 03:34 +0100, Marek Vasut wrote:
> On Wednesday, January 13, 2016 at 03:23:38 AM, Chin Liang See wrote:
> > On Wed, 2016-01-13 at 03:07 +0100, Marek Vasut wrote:
> > > On Wednesday, January 13, 2016 at 03:05:40 AM, Chin Liang See
> > > wrote:
> > > > On Tue, 2016-01-12 at 03:48
On Mon, Jan 11, 2016 at 12:16:44AM +0100, Ladislav Michl wrote:
> From: Thomas Gleixner
>
> To support UBI in SPL we need a simple NAND read function. Add one to
> nand_spl_simple and keep it as simple as it goes.
>
> Signed-off-by: Thomas Gleixner
> Signed-off-by: Ladislav Michl
> Acked-by:
On Mon, Jan 11, 2016 at 12:17:28AM +0100, Ladislav Michl wrote:
> From: Thomas Gleixner
>
> Booting a payload out of NAND FLASH from the SPL is a crux today, as
> it requires hard partioned FLASH. Not a brilliant idea with the
> reliability of todays NAND FLASH chips.
>
> The upstream UBI + UBI
On Mon, Jan 11, 2016 at 12:15:42AM +0100, Ladislav Michl wrote:
> Signed-off-by: Ladislav Michl
Reviewed-by: Tom Rini
--
Tom
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On Wednesday, January 13, 2016 at 03:23:38 AM, Chin Liang See wrote:
> On Wed, 2016-01-13 at 03:07 +0100, Marek Vasut wrote:
> > On Wednesday, January 13, 2016 at 03:05:40 AM, Chin Liang See wrote:
> > > On Tue, 2016-01-12 at 03:48 +0100, Marek Vasut wrote:
> > > > On Tuesday, January 12, 2016 at 0
On Tue, Jan 12, 2016 at 04:05:42PM -0700, Simon Glass wrote:
> Hi Tom,
>
> This mainly includes various PCI improvements. I have not been keeping up
> with applying things to dm/next, so will have to start pulling in patches
> quickly.
>
>
> The following changes since commit fa85e826c16b9ce1ad
On Wed, 2016-01-13 at 03:07 +0100, Marek Vasut wrote:
> On Wednesday, January 13, 2016 at 03:05:40 AM, Chin Liang See wrote:
> > On Tue, 2016-01-12 at 03:48 +0100, Marek Vasut wrote:
> > > On Tuesday, January 12, 2016 at 01:50:18 AM, Chin Liang See
> > > wrote:
> > > > On Tue, 2016-01-12 at 01:31 +
Call dm_scan_fdt_node() in rk3036 pinctrl uclass binding.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
drivers/pinctrl/rockchip/pinctrl_rk3036.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3036.c
We will save boot mode flag in grf's os_reg[0], if fastboot
requested or fastboot key pressed, try to enter fastboot mode
at preboot stage.
Signed-off-by: Jeffy Chen
---
Changes in v3:
Use rockchip's legacy reboot mode definitions.
Changes in v2: None
board/kylin/kylin_rk3036/kylin_rk3036.c
We are porting android to kylin board now.
This series could let it boot up with android's boot image.
Changes in v3:
Use rockchip's legacy reboot mode definitions.
Changes in v2:
Add comments.
Jeffy Chen (6):
common/image-fdt.c: Make boot_get_fdt() perform a check for Android
images
ARM
The android kernel is using appended dtb by default, and store
ramdisk right after kernel & dtb.
So we needs to relocate ramdisk, and use atags to pass params.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
include/configs/kylin_rk3036.h | 23 +
Add default android gpt partition table for kylin board.
Use "gpt write mmc 0 $partitions" to apply.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
include/configs/kylin_rk3036.h | 29 +
1 file changed, 29 insertions(+)
Android images don't have a fdt.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
common/image-fdt.c | 4
1 file changed, 4 insertions(+)
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 5e4e5bd..41aaa0d 100644
--- a/common/image-fdt.
After boot_ramdisk_high(), ramdisk would be relocated to
initrd_start & initrd_end, so use them instead of rd_start & rd_end.
Signed-off-by: Jeffy Chen
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2:
Add comments.
arch/arm/lib/bootm.c | 12 +++-
1 file changed, 11 insert
On Wednesday, January 13, 2016 at 03:05:40 AM, Chin Liang See wrote:
> On Tue, 2016-01-12 at 03:48 +0100, Marek Vasut wrote:
> > On Tuesday, January 12, 2016 at 01:50:18 AM, Chin Liang See wrote:
> > > On Tue, 2016-01-12 at 01:31 +0100, Marek Vasut wrote:
> > > > On Tuesday, January 12, 2016 at 01:
On Tue, 2016-01-12 at 03:48 +0100, Marek Vasut wrote:
> On Tuesday, January 12, 2016 at 01:50:18 AM, Chin Liang See wrote:
> > On Tue, 2016-01-12 at 01:31 +0100, Marek Vasut wrote:
> > > On Tuesday, January 12, 2016 at 01:26:58 AM, Chin Liang See
> > > wrote:
> > > > On Mon, 2016-01-11 at 15:33 -08
On Wednesday, January 13, 2016 at 02:58:42 AM, Chin Liang See wrote:
> On Tue, 2016-01-12 at 23:16 +0100, Marek Vasut wrote:
> > On Tuesday, January 12, 2016 at 11:11:42 PM, Dinh Nguyen wrote:
> > > On 01/12/2016 04:02 PM, Marek Vasut wrote:
> > > > On Tuesday, January 12, 2016 at 09:56:42 PM,
> >
On Tue, 2016-01-12 at 23:16 +0100, Marek Vasut wrote:
> On Tuesday, January 12, 2016 at 11:11:42 PM, Dinh Nguyen wrote:
> > On 01/12/2016 04:02 PM, Marek Vasut wrote:
> > > On Tuesday, January 12, 2016 at 09:56:42 PM,
> > > dingu...@opensource.altera.com
> > >
> > > wrote:
> > > > From: Dinh Nguye
On Montag, 11. Januar 2016 09:59:09 CET Simon Glass wrote:
> Hi Josh,
>
> On 8 January 2016 at 06:27, Josh Sanford wrote:
> > Thanks Simon,
> >
> > I've been looking through the code you referenced. So these patches are
> > just standalone snippets and not yet part of any branch? (I'm just not
Hi Heiko,
just one more thing I forgot to mention...
On Tue, Jan 12, 2016 at 10:08:21AM +0100, Heiko Schocher wrote:
> Am 11.01.2016 um 13:58 schrieb Ladislav Michl:
[...]
> >All that ubispl_info structure is board specific and there is not much left
> >besides initializing it. Also volumes can d
Hi Tom,
This mainly includes various PCI improvements. I have not been keeping up
with applying things to dm/next, so will have to start pulling in patches
quickly.
The following changes since commit fa85e826c16b9ce1ad302a57e9c4b24db0d8b930:
Prepare v2016.01 (2016-01-12 09:06:54 -0500)
are a
Hi Heiko,
On Tue, Jan 12, 2016 at 10:08:21AM +0100, Heiko Schocher wrote:
> Am 11.01.2016 um 13:58 schrieb Ladislav Michl:
> >On Mon, Jan 11, 2016 at 07:20:06AM +0100, Heiko Schocher wrote:
> >>Beside of that, this patch does not apply ...
> >
> >Ah, igep00x0 part is based on top of this:
> >http:
On Tuesday, January 12, 2016 at 11:11:42 PM, Dinh Nguyen wrote:
> On 01/12/2016 04:02 PM, Marek Vasut wrote:
> > On Tuesday, January 12, 2016 at 09:56:42 PM,
> > dingu...@opensource.altera.com
> >
> > wrote:
> >> From: Dinh Nguyen
> >>
> >> Add the Arria10 reset manager defines that is used in L
On 01/12/2016 04:02 PM, Marek Vasut wrote:
> On Tuesday, January 12, 2016 at 09:56:42 PM, dingu...@opensource.altera.com
> wrote:
>> From: Dinh Nguyen
>>
>> Add the Arria10 reset manager defines that is used in Linux. Change the
>> license to SPDX.
>>
>> [commit 007bb689b3dbad83cdab0ad192bc6ed0
On Tuesday, January 12, 2016 at 09:56:42 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add the Arria10 reset manager defines that is used in Linux. Change the
> license to SPDX.
>
> [commit 007bb689b3dbad83cdab0ad192bc6ed0162451e0 from the Linux kernel]
>
> Signed-off-by: D
From: Dinh Nguyen
On the Arria10, the EMAC phy mode configuration for each EMACs is located
in separate registers versus being in 1 register for the GEN5 devices. The
Arria10 also has 3 EMACs compared to 2 for the GEN5 devices.
Update the dwmac_deassert_reset function to support both GEN5 and Ar
From: Dinh Nguyen
Add the Arria10 reset manager defines that is used in Linux. Change the
license to SPDX.
[commit 007bb689b3dbad83cdab0ad192bc6ed0162451e0 from the Linux kernel]
Signed-off-by: Dinh Nguyen
---
v2: Add commit hash-id for original commit from Linux kernel
---
include/dt-binding
From: Dinh Nguyen
There is no dependency on doing a separate clrbits first in the
dwmac_deassert_reset function. Combine them into a single
clrsetbits call.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/misc.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/
Add support for functions clrbits_X(), setbits_X() and clrsetbits_X()
on MIPS.
Signed-off-by: Daniel Schwierzeck
---
Changes in v3: None
Changes in v2: None
arch/mips/include/asm/io.h | 54 ++
1 file changed, 54 insertions(+)
diff --git a/arch/mips/
Add a SPDX license identifier to MIPS header files where it is
still missing.
Signed-off-by: Daniel Schwierzeck
---
Changes in v3: None
Changes in v2: None
arch/mips/include/asm/addrspace.h | 6 ++
arch/mips/include/asm/bitops.h | 6 ++
arch/mips/include/asm/byteorder.h | 6 ++
Test patch for compile testing and disassembly analysis of
the updated and new I/O accessors.
Signed-off-by: Daniel Schwierzeck
---
Changes in v3:
- rebased to u-boot-mips/next
Changes in v2: None
arch/mips/lib/io.c | 183 +
1 file changed,
Mainly sync asm/io.h to get a working ioremap() implementation
as well as the full set of I/O accessors. Pull in additional
header files to make this work.
Furthermore port over the directory 'arch/mips/include/asm/mach-generic/'
with contains default definitions for I/O and memory spaces and defa
pci_virt_to_mem() uses virt_to_phys() to get the physical address.
But pci_virt_to_mem() is also called with uncached addresses which
is wrong according to the documentation of virt_to_phys().
Refactor the PCI_TO_MEM() macro to optionally map an uncached address
back to a cached one before calling
Update definitions for processor, registers as well as assemby
macros.
Signed-off-by: Daniel Schwierzeck
---
Changes in v3: None
Changes in v2: None
arch/mips/include/asm/asm.h | 126 ++--
arch/mips/include/asm/isadep.h|6 +-
arch/mips/include/asm/mipsregs.h | 1495 +++
This patch series updates all MIPS asm header files containing
I/O code as well as processor, register and assembly definitions.
The source of the update are the MIPS asm header files of linux-4.4.
The main goal is to get a complete set of I/O accessors on MIPS and
to support platform-specific add
On Wed, Jan 13, 2016 at 02:05:28AM +0900, Masahiro Yamada wrote:
> Hi Tom,
>
> U-Boot 2016.01 is out and it means the MW is open.
> Excuse my haste, but here is the first pull-req for the 2016.04.
> Please pull!
Happy to get one so early :)
>
>
> The following changes since commit fa85e826c16
Prepare sub-folder for device-tree files. Make support for
device-tree on MIPS available in Kbuild/Kconfig.
Signed-off-by: Daniel Schwierzeck
Signed-off-by: Purna Chandra Mandal
---
Changes in v4:
- add directory arch/mips/dts/include/
- add symlink arch/mips/dts/include/dt-bindings/
Changes in
On 01/11/2016 10:38 PM, Bin Meng wrote:
> Before we switch to use driver model ethernet support, disable
> CONFIG_E1000 temporarily as with driver model ethernet, E1000
> driver depends on driver model PCI which is not ready on this
> board yet.
>
Any idea when PCI/E1000 can be enabled?
York
Hi Tom,
U-Boot 2016.01 is out and it means the MW is open.
Excuse my haste, but here is the first pull-req for the 2016.04.
Please pull!
The following changes since commit fa85e826c16b9ce1ad302a57e9c4b24db0d8b930:
Prepare v2016.01 (2016-01-12 09:06:54 -0500)
are available in the git reposito
2016-01-09 1:51 GMT+09:00 Masahiro Yamada :
> This series includes a set of clean-ups, new features.
> I want to merge them when the merge window opens.
>
>
>
> Masahiro Yamada (7):
> ARM: uniphier: kill bogus header includes
> ARM: uniphier: move cmd_ddrphy.c to dram subdirectory
> ARM: unip
On 01/12/2016 03:25 AM, Przemyslaw Marczak wrote:
Hello Stephen,
On 01/11/2016 05:47 PM, Stephen Warren wrote:
On 01/11/2016 04:21 AM, Przemyslaw Marczak wrote:
Hello Stephen,
On 01/07/2016 07:25 PM, Stephen Warren wrote:
On 01/07/2016 04:40 AM, Przemyslaw Marczak wrote:
The present impleme
Hey all,
I've pushed v2016.01 out to the git servers and the tarballs are now
available at both:
ftp://ftp.denx.de/pub/u-boot/
https://www.amazon.com/clouddrive/share/iQRojZzxJnhZwGGUcyDdQDl6E5MAlTEeVwuCDdgUDo8?_encoding=UTF8&mgh=1&ref_=cd_ph_share_link_copy
We've got the usual level of Kconfig a
Hello Kevin Alexander,
On 01/11/2016 03:13 PM, Kevin Alexander wrote:
Hello
I am making a bigeffort to try to acquire knowledge regarding embedded Linux.
A big effort is a great idea. A long association is also beneficial as a
lot of stuff happens that is not documented well (or at all) and
Ping yet again!?
Stefan
> "Stefan" == Stefan Monnier writes:
> Signed-off-by: Stefan Monnier
> ---
> disk/part_dos.c | 29 +
> include/ide.h | 8
> 2 files changed, 21 insertions(+), 16 deletions(-)
> diff --git a/disk/part_dos.c b/disk/pa
Hi Przemyslaw,
On 12 January 2016 at 07:22, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 01/12/2016 02:57 PM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 12 January 2016 at 03:25, Przemyslaw Marczak
>> wrote:
>>>
>>>
>>> Hello Stephen,
>>>
>>>
>>> On 01/11/2016 05:47 PM, Stephen Warren
This change is required to avoid warnings about invalid
size-cells defined in device-tree pinctrl nodes for Exynos.
Tested on:
- Odroid U3
- Odroid XU3
Signed-off-by: Przemyslaw Marczak
Cc: Stefan Roese
Cc: Tom Rini
Cc: Simon Glass
Cc: Stephen Warren
Cc: Stephen Warren
---
arch/arm/dts/exy
Globally enabled CONFIG_OF_TRANSLATE causes, that function dev_get_addr()
returns a different result for a node with: 'size-cells = <0>'.
The above change, breaks the Exynos boards for a long time, because of GPIO
driver, which uses the fdt in a non standard way.
After sending few approaches with
On 19.12.2015 23:23, Simon Glass wrote:
On 14 December 2015 at 08:18, Stefan Roese wrote:
Some platforms need to ability to configure an offset to the standard
addresses extracted from the device-tree. This patch allows this by
adding a function to DM to configure this offset (if needed).
Sign
This reverts commit 71105f50fedddfa5b0535d102c3d5078671721ad.
The reverted commit was applied for a temporary to unbreak
few Exynos boards on the release.
After the discussion about the change, this commit should be avoided.
Fixed device-tree for Exynos, allows reverting it without any issues.
S
Hello Simon,
On 01/12/2016 02:59 PM, Simon Glass wrote:
Hi Przemyslaw,
On 12 January 2016 at 03:49, Przemyslaw Marczak wrote:
Hello Simon,
On 01/11/2016 05:59 PM, Simon Glass wrote:
Hi Przemyslaw,
On 8 January 2016 at 05:01, Przemyslaw Marczak
wrote:
Hello Simon,
On 01/07/2016 08:24
Hello Heiko,
On Tue, 12 Jan 2016 11:48:17 +0100, Heiko Schocher wrote:
> Hello Albert,
>
> Am 12.01.2016 um 11:26 schrieb Albert ARIBAUD:
> > (cc:ing Heiko as the maintainer for axm/taurus)
> >
> > Hello,
> >
> > AXM is currently the only board failing 'buildman arm aarch64':
> >
> > +arm-unknow
Hello Simon,
On 01/12/2016 02:57 PM, Simon Glass wrote:
Hi Przemyslaw,
On 12 January 2016 at 03:25, Przemyslaw Marczak wrote:
Hello Stephen,
On 01/11/2016 05:47 PM, Stephen Warren wrote:
On 01/11/2016 04:21 AM, Przemyslaw Marczak wrote:
Hello Stephen,
On 01/07/2016 07:25 PM, Stephen W
On Tuesday, January 12, 2016 at 03:20:43 AM, Dalon Westergreen wrote:
> The hps_isw_handoff and bsp/generated folders are typically not in the same
> path.This patch adds support for specifying the different input directories
> for the bsp and quartus projects.
>
> Signed-off-by: Dalon Westergreen
On Tuesday, January 12, 2016 at 08:57:01 AM, Peng Fan wrote:
> From: Peng Fan
>
> We support max USB_MAXENDPOINTS, so need to use
> "epno >= USB_MAXENDPOINTS", but not "epno > USB_MAXENDPOINTS".
> If use ">", we may exceeds the array of if_desc->ep_desc.
>
> Signed-off-by: Peng Fan
> Cc: Simon
Hi Przemyslaw,
On 12 January 2016 at 03:49, Przemyslaw Marczak wrote:
> Hello Simon,
>
>
> On 01/11/2016 05:59 PM, Simon Glass wrote:
>>
>> Hi Przemyslaw,
>>
>> On 8 January 2016 at 05:01, Przemyslaw Marczak
>> wrote:
>>>
>>> Hello Simon,
>>>
>>>
>>> On 01/07/2016 08:24 PM, Simon Glass wrote:
>>
Hi Przemyslaw,
On 12 January 2016 at 03:25, Przemyslaw Marczak wrote:
>
> Hello Stephen,
>
>
> On 01/11/2016 05:47 PM, Stephen Warren wrote:
>>
>> On 01/11/2016 04:21 AM, Przemyslaw Marczak wrote:
>>>
>>> Hello Stephen,
>>>
>>> On 01/07/2016 07:25 PM, Stephen Warren wrote:
On 01/07/2016
On Tuesday, January 12, 2016 at 01:50:18 AM, Chin Liang See wrote:
> On Tue, 2016-01-12 at 01:31 +0100, Marek Vasut wrote:
> > On Tuesday, January 12, 2016 at 01:26:58 AM, Chin Liang See wrote:
> > > On Mon, 2016-01-11 at 15:33 -0800, Dalon Westergreen wrote:
> [...]
>
> > btw. Completely off-topi
2016-01-12 11:18 GMT+01:00 Purna Chandra Mandal :
> Create initial directory, Kconfigs needed for PIC32 architecture
> support. Also add PIC32 specific register definition required for drivers.
>
> Signed-off-by: Purna Chandra Mandal
maybe you could use ioremap() in pic32_get_syscfg_base(), apart
2016-01-12 11:18 GMT+01:00 Purna Chandra Mandal :
> Signed-off-by: Purna Chandra Mandal
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/mips/cpu/start.S | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
> index e95cdca..35d9650 1
Hello Simon,
On 01/11/2016 05:59 PM, Simon Glass wrote:
Hi Przemyslaw,
On 8 January 2016 at 05:01, Przemyslaw Marczak wrote:
Hello Simon,
On 01/07/2016 08:24 PM, Simon Glass wrote:
+Stephen
On 4 January 2016 at 17:59, Simon Glass wrote:
Hi Przemyslaw,
On 5 November 2015 at 23:47, Ste
Hello Albert,
Am 12.01.2016 um 11:26 schrieb Albert ARIBAUD:
(cc:ing Heiko as the maintainer for axm/taurus)
Hello,
AXM is currently the only board failing 'buildman arm aarch64':
+arm-unknown-linux-gnueabi-ld.bfd: SPL image too big
+make[2]: *** [spl/u-boot-spl] Error 1
+make[1]: *** [spl/u-
This patch series adds support for Microchip PIC32MZ[DA] MIPS microcontroller
platform.
All drivers required to boot from MMC uSD card and network are included in it;
clock,
pinctrl, gpio, DDR2, serial, SDHCI, ethernet.
This series is tested on PIC32MZ[DA] Starter Kit.
This series is generated o
From: Shaohui Xie
Cortine phy cannot support soft reset, this commit implements probe
for Cortina PHY to tell phylib to skip phy soft reset by setting
PHY_BROKEN_RESET in flags.
Signed-off-by: Shaohui Xie
---
drivers/net/phy/cortina.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/
From: Shaohui Xie
Current driver always performs a phy soft reset when connecting the phy
device, but soft reset is not always supported by a phy device, so
introduce a quirk PHY_BROKEN_RESET to let such a phy device to skip soft
reset. This commit uses 'flags' of phy device structure to store th
(cc:ing Heiko as the maintainer for axm/taurus)
Hello,
AXM is currently the only board failing 'buildman arm aarch64':
+arm-unknown-linux-gnueabi-ld.bfd: SPL image too big
+make[2]: *** [spl/u-boot-spl] Error 1
+make[1]: *** [spl/u-boot-spl] Error 2
+make: *** [sub-make] Error 2
Apparently SPL
Hello Stephen,
On 01/11/2016 05:47 PM, Stephen Warren wrote:
On 01/11/2016 04:21 AM, Przemyslaw Marczak wrote:
Hello Stephen,
On 01/07/2016 07:25 PM, Stephen Warren wrote:
On 01/07/2016 04:40 AM, Przemyslaw Marczak wrote:
The present implementation of __of_translate_address() taken
from the
This adds ethernet, TFTP support for PIC32MZ[DA] Starter Kit. Also
custom environment variables/scripts are added to help boot from network.
Signed-off-by: Purna Chandra Mandal
---
Changes in v3: None
Changes in v2:
- replace unbounded loop with wait_for_bit()
- replace register access as readl
This driver implements MAC and MII layer of the ethernet controller.
Network data transfer is handled by controller internal DMA engine.
Ethernet controller is configurable through device-tree file.
Signed-off-by: Purna Chandra Mandal
---
Changes in v3:
- merge wrappers with eth operation call
Add SMSC LAN8740 Phy support required for PIC32MZDA devices.
Signed-off-by: Purna Chandra Mandal
---
Changes in v3: None
Changes in v2: None
drivers/net/phy/smsc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c
index bfd9815..34
This adds support for Microchip PIC32MZ[DA] StarterKit board
based on a PIC32MZ[DA] family of microcontroller.
Signed-off-by: Purna Chandra Mandal
---
Changes in v3:
- drop SKIP_LOWLEVEL_INIT, GBL_DATA_OFFSET from config header
- move CMD_MEMTEST, CMD_MEMINFO to defconfig
- increase SYS_MALLOC
From: Andrei Pistirica
This driver implements platform specific glue and fixups for
PIC32 internal SDHCI controller.
Signed-off-by: Andrei Pistirica
Signed-off-by: Sandeep Sheriker Mallikarjun
Signed-off-by: Purna Chandra Mandal
---
Changes in v3:
- remove ofdata_to_platdata, and replace p
Enable MMC, SDHCI, FAT FS, EXT4 FS support for PIC32MZ[DA] StarterKit.
Also add custom scripts, rules to boot Linux from microSD card.
Signed-off-by: Purna Chandra Mandal
---
Changes in v3: None
Changes in v2:
- drop shared bus (shared pin selection) configuration.
arch/mips/dts/pic32mzda.dts
Add Microchip PIC32MZ[DA] SoC family support.
Signed-off-by: Purna Chandra Mandal
---
Changes in v3:
- drop forcing CONFIG_MIPS_BOOT_* selection in mach-pic32/Kconfig
- indent assembly instructions in delay slot
- made GPIO-nodes child of pinctrl-node in devicetree
- replace pic32_ioremap() wit
From: Paul Thacker
This adds PIC32 UART controller support based on driver model.
Signed-off-by: Paul Thacker
Signed-off-by: Purna Chandra Mandal
---
Changes in v3:
- remove ofdata_to_platdata, and replace platdata with priv
- remove special handling of '\r' as being handled by serial-uclas
This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy
module.
DDR2 controller operates in half-rate mode (upto 533MHZ frequency).
Signed-off-by: Paul Thacker
Signed-off-by: Purna Chandra Mandal
---
Changes in v3:
- annotating fixed table with const
- fix camel-case in ddr
In PIC32 GPIO controller is part of PIC32 pin controller.
PIC32 has ten independently programmable ports and each with multiple pins.
Each of these pins can be configured and used as GPIO, provided they
are not in use for other peripherals.
Signed-off-by: Purna Chandra Mandal
---
Changes in v3:
In PIC32 pin-controller is a combined gpio-controller, pin-mux and
pin-config module. Remappable peripherals are assigned pins through
per-pin based muxing logic. And pin configuration are performed on
specific port registers which are shared along with gpio controller.
Note, non-remappable periphe
PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers
and dividers capable of supplying clock to various controllers
on or off-chip.
Signed-off-by: Purna Chandra Mandal
Reviewed-by: Simon Glass
---
Changes in v3:
- rename clk-pic32.c to clk_pic32.c
- update clock binding docum
Signed-off-by: Purna Chandra Mandal
---
Changes in v3: None
Changes in v2: None
arch/mips/cpu/start.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
index e95cdca..35d9650 100644
--- a/arch/mips/cpu/start.S
+++ b/arch/mips/cpu/start.S
@@ -185
Create initial directory, Kconfigs needed for PIC32 architecture
support. Also add PIC32 specific register definition required for drivers.
Signed-off-by: Purna Chandra Mandal
---
Changes in v3:
- drop empty choices in mach-pic32/Kconfig
- add pic32_get_syscfg_base() for device-config registers
From: Peng Fan
Define CONFIG_SYS_VSNPRINTF to use snprintf. If not define
CONFIG_SYS_VSNPRINTF, snprintf is sprintf.
Report by Coverity:
pass string init_val of unknown size to sprintf
Signed-off-by: Peng Fan
Cc: Peter Robinson
Cc: Fabio Estevam
Cc: Adrian Alonso
Cc: Stefano Babic
---
inc
From: Peng Fan
We should use ARRAY_SIZE, but not sizeof. The size of
env_flags_varaccess_mask is 16bytes, but we only need 4 loops.
If using 16 as the end condition, we may access memory that
not belong to array env_flags_varaccess_mask.
Signed-off-by: Peng Fan
Cc: Joe Hershberger
Cc: York Sun
Hi Bin,
On 01/12/2016 12:21 PM, Bin Meng wrote:
Hi Bhuvanchandra,
On Tue, Jan 12, 2016 at 2:43 PM, Bhuvanchandra DV
wrote:
Hi Bin,
On 01/12/2016 11:05 AM, Bin Meng wrote:
Hi Bhuvanchandra,
On Tue, Jan 12, 2016 at 12:28 PM, Bhuvanchandra DV
wrote:
- Convert lpuart driver to driver mode
Hello Ladislav,
Am 11.01.2016 um 13:58 schrieb Ladislav Michl:
Hi Heiko,
On Mon, Jan 11, 2016 at 07:20:06AM +0100, Heiko Schocher wrote:
[...]
Could you seperate common changes in "common/*" and your special
board changes?
It is done bellow, just common/* part to start discussion...
;-)
From: Peng Fan
We support max USB_MAXENDPOINTS, so need to use
"epno >= USB_MAXENDPOINTS", but not "epno > USB_MAXENDPOINTS".
If use ">", we may exceeds the array of if_desc->ep_desc.
Signed-off-by: Peng Fan
Cc: Simon Glass
Cc: Hans de Goede
Cc: Marek Vasut
Cc: Paul Kocialkowski
Cc: "Stefan
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