Android's tool chain enable the -mandroid at default.
This option will enable the -fpic, which cause uboot compilation
failure:
"
LD u-boot
u-boot contains unexpected relocations: R_ARM_ABS32
R_ARM_RELATIVE
"
In my testcase, arm-linux-androideabi-gcc-4.9 internally
enables '-fpic', so when
CONFIG_PHYLIB is already set by the config system, don't set it again.
Avoids ton of warnings.
Signed-off-by: Pavel Machek
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index b3f65b6..86eccba 100644
--- a/include/configs/socfpga_common.h
+++ b/include/conf
On 04/12/2015 14:09, Stefan Roese wrote:
> Hi Stefano,
>
> On 04.12.2015 12:49, Stefano Babic wrote:
>> On 04/12/2015 11:51, Fabio Estevam wrote:
>>> Hi Stefano,
>>>
>>> On Fri, Dec 4, 2015 at 7:02 AM, Stefano Babic wrote:
Check for bmode before reading the boot device
to check if a s
As the errata A008336 and A008514 do not apply to all LS series SoCs
(such as LS1021A, LS1043A) we move them to an soc specific file
Signed-off-by: Yuan Yao
---
Changed in v3:
Fix a typo issue.
In function "erratum_a008514"
"#ifdef CONFIG_SYS_FSL_DCSR_DDR2_ADDR" should be
This is a workaround for hardware erratum.
Write the value of 63b2_0042h to EDDRTQCFG will optimal the
memory controller performance.
The value: 63b2_0042h comes from the hardware team.
Signed-off-by: Yuan Yao
---
Changed in v2:
Update the write value to 63b2_0042h;
---
arch/arm/cpu/ar
arm: ls1021a: merge SoC specific code in a separate file
arm: ls102xa: enable all the snoop signal for masters.
ls102xa: Enable snoop and DVM message requests.
armv7/fsl-ls102xa: Workaround for DDR erratum A008514
Changed in v2:
Update the write value to 63b2_0042h;
move erratum a008336 an
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv7/ls102xa/soc.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 6036473..97ba6d5 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv
Enable the IP feature's snoop signal to support
hardware snoop for cache coherence.
SNPCNFGCR contains the bits to drive snoop signal
for various masters.
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv7/ls102xa/soc.c | 8
arch/arm/include/asm/arch-ls102xa/immap_ls102xa
Create a soc.c file to put the code for soc special settings.
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv7/ls102xa/Makefile | 1 +
arch/arm/cpu/armv7/ls102xa/soc.c| 66 +
arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h | 12 +
board/fre
On 12/05/2015 01:12 AM, York Sun wrote:
> On 12/04/2015 01:37 AM, Yuan Yao wrote:
> > As the errata A008336 and A008514 do not apply to all LS series SoCs
> > (such as LS1021A, LS1043A) we move them to an soc specific file
> >
> > Signed-off-by: Yuan Yao
> > ---
> > Changed in v2:
> > Update t
On 2015年12月04日 23:58, Simon Glass wrote:
This is currently broken since it does not have the reg-shift property for
the UART in the device tree. Fix it.
Reported-by: Yegor Yefremov
Signed-off-by: Simon Glass
---
arch/arm/dts/am33xx.dtsi | 6 ++
1 file changed, 6 insertions(+)
Acke
On 2015年12月04日 23:58, Simon Glass wrote:
At present an incorrect #if term is preventing this data from being compiled
in. All tegra boards use driver model for serial, so we can just drop this.
Signed-off-by: Simon Glass
Reported-by: Stephen Warren
---
arch/arm/mach-tegra/board.c | 2 +-
On 2015年12月04日 23:58, Simon Glass wrote:
For platforms that don't use device tree in SPL the only way to mark this
driver as 'required by relocation' is with the DM_FLAG_PRE_RELOC flag. Add
this to ensure that the driver is bound.
Signed-off-by: Simon Glass
Reported-by: Stephen Warren
---
On 2015年12月04日 23:58, Simon Glass wrote:
These were added by mistake in commit fde7e189. They cause a warning when
configuring the boards. Remove them.
Signed-off-by: Simon Glass
Reported-by: Stephen Warren
---
configs/beaver_defconfig | 3 ---
configs/cardhu_defconfig | 3 ---
co
There are two numbering schemes for the RPi revision values; old and new
scheme. The values within each scheme overlap. Hence, it doesn't make
sense to have absolute/global names for the revision IDs. Get rid of the
names and just use the raw revision/type values to set up the array of
per-revision
The RPi has two different schemes for encoding board revision values.
When adding RPi 2 support, I thought that the conflicting type field
values were to be interpreted based on bcm2835-vs-bcm2836. In fact, the
scheme bit determines the encoding. The RPi Zero uses the bcm2835 yet
uses the new encod
For U-Boot's purposes, at present all we care about is ensuring there's
a model table entry.
Signed-off-by: Stephen Warren
---
board/raspberrypi/rpi/rpi.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 2ad972802881..4b80d7
HI Stuart
> -Original Message-
> From: York Sun [mailto:york...@freescale.com]
> Sent: Saturday, December 05, 2015 1:35 AM
> To: Yoder Stuart-B08248 ; Kushwaha
> Prabhakar-B32579
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH] driver: net: fsl-mc: remove MC firmware version check
>
>
Hi Eric,
On Fri, Dec 4, 2015 at 8:42 PM, Eric Nelson wrote:
> I've figured out a way to repeat this on my machine.
>
> If I write 0xff's to the eMMC blocks, then issue an erase for the same,
> I get the problem with each MMC_ERASE command.
>
> I've also found something that fixes the issue in my
On Wed, Dec 02, 2015 at 03:54:03PM +0100, Anatolij Gustschin wrote:
> Hi Tom,
>
> The following changes since commit be30dfbabbee12770221f434d2aa08627e712b97:
>
> iocon: Disable FIT_VERBOSE (2015-12-01 15:49:42 -0500)
>
> are available in the git repository at:
>
> git://git.denx.de/u-boot
On Fri, Dec 04, 2015 at 12:57:22PM +0100, Stefano Babic wrote:
> Hi Tom,
>
> please pull from u-boot-imx, thanks !
>
> The following changes since commit 1d149eddcc0661b683002f76a8240491eba00dbb:
>
> dm: Add timeline and guide for porting serial drivers (2015-11-20
> 13:59:54 -0500)
>
> are
On Thu, Dec 03, 2015 at 12:34:56PM +, Francois Retief wrote:
> Hello Tom,
>
> Please pull from u-boot-sparc master:
>
> The following changes since commit be30dfbabbee12770221f434d2aa08627e712b97:
>
> iocon: Disable FIT_VERBOSE (2015-12-01 15:49:42 -0500)
>
> are available in the git rep
Hi all,
On 12/04/2015 09:35 AM, Eric Nelson wrote:
> Hi Fabio,
>
> On 12/02/2015 12:53 PM, Fabio Estevam wrote:
>> On Wed, Dec 2, 2015 at 5:28 PM, Eric Nelson wrote:
>>
> ...
>>>
>>> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
>>> index 53084a7..8f5d9e1 100644
>>> --- a/drivers/mmc/mmc.c
Switch to using tiny-printf for the firefly SPL, this reduces the SPL by
around 1800 bytes bringing it back under the 32k limit for both gcc 4.9
and gcc 5.
Signed-off-by: Sjoerd Simons
---
configs/firefly-rk3288_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/firefly-rk32
For a simple static string, use panic_str() which prevents calling
printf needlessly.
Signed-off-by: Sjoerd Simons
---
common/spl/spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 7a393dc..6e6dee7 100644
--- a/common/spl/spl.c
++
Implement both printf and vprintf for a bit more flexibility, e.g.
allows the panic() function to work with tiny-printf.
Signed-off-by: Sjoerd Simons
---
lib/tiny-printf.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/lib/tiny-printf.c b/lib/tiny-printf
The Rockchip rk3288 SPL was always too close to the 32k limit, either
needing gcc 5 or a patched gcc (with some constant string GC fixes) to
actually stay (just) below 32k. With recent changes, it unfortunatly
went over with common gcc versions.
This serie switches the firefly SPL to use tiny-pri
To allow the various string to number conversion functions to be used
when using tiny-printf,split them out into their own file which gets
build regardless of what printf implementation is used.
Signed-off-by: Sjoerd Simons
---
lib/Makefile | 6 +-
lib/strto.c| 174 +
gcc fails to work out that the mmc variable will only ever be used if it
has been initialized by spl_mmc_get_device_index and throws the
following error:
common/spl/spl_mmc.c: In function ‘spl_mmc_load_image’:
common/spl/spl_mmc.c:31:24: warning: ‘mmc’ may be used uninitialized in this
function [
To allow panic and panic_str to still be used when using tiny-printf,
split them out into their own file which gets build regardless of what
printf implementation is used.
Signed-off-by: Sjoerd Simons
---
lib/Makefile | 6 +++---
lib/panic.c| 45 ++
There is no sprintf implementation in tiny-printf, so don't try to use
it when tiny-printf if used.
Signed-off-by: Sjoerd Simons
---
drivers/mmc/mmc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 2a58702..3a34028 100644
--- a
On 12/04/2015 12:54 PM, Fabio Estevam wrote:
> On Wed, Nov 4, 2015 at 6:19 AM, Alexander Stein
> wrote:
>> When reading a large blob. e.g. a linux kernel (several MiBs) a watchdog
>> timeout might occur meanwhile. So pet the watchdog while operating on
>> the flash.
>
> I guess the same problem
On Wed, Nov 4, 2015 at 6:19 AM, Alexander Stein
wrote:
> When reading a large blob. e.g. a linux kernel (several MiBs) a watchdog
> timeout might occur meanwhile. So pet the watchdog while operating on
> the flash.
I guess the same problem would occur when you do long file transfers
via TFTP, via
Dear Nishanth Menon,
In message <1449255744-25787-1-git-send-email...@ti.com> you wrote:
> When we use the following in bootargs:
> v1=abc
> v2=123-${v1}
> echo ${v2}
> we get 123-${v1}
> when we should have got
> 123-abc
> This is because we do not recursively check to see if v2 by itself has
> a
Dear Nishanth Menon,
In message <1449249451-8945-1-git-send-email...@ti.com> you wrote:
> When we use the following in bootargs:
> v1=abc
> v2=123-${v1}
> echo $v2
> we get 123-${v1}
> This is because we do not recursively check to see if v2 by itself has
> a hidden variable. Fix the same with rec
On 12/03/2015 05:56 PM, Wang Huan-B18965 wrote:
>> On 12/03/2015 01:49 AM, Wang Huan-B18965 wrote:
>>
>>
>>
The actual command which results in a watchdog reset is 'sf read
0x8104 0x20 0x40'. Please note that this uses an external
watchdog which is enabled by defa
On 12/04/2015 10:25 AM, Simon Glass wrote:
Hi Stephen,
On 4 December 2015 at 10:16, Stephen Warren wrote:
On 12/04/2015 08:58 AM, Simon Glass wrote:
These were added by mistake in commit fde7e189. They cause a warning when
configuring the boards. Remove them.
Patches 1-3,
Tested-by: Steph
Hi Fabio and Hector,
On 12/04/2015 10:43 AM, Eric Nelson wrote:
> On 12/04/2015 10:38 AM, Eric Nelson wrote:
>> On 12/04/2015 10:32 AM, Eric Nelson wrote:
>>> The low four bits of the SYSCTL register are reserved on the USDHC
>>> controller on i.MX6 and i.MX7 processors, but are used for clocking
This set is to change MMU tables so DDR is in non-secure mode that
non-secure master such as SDHC DMA can access the data. To mix
secure and non-secure MMU entries, the MMU tables themselves have
to be in secure memory. A small portion memory is reserved at the
end of DDR (before debug server and M
Prabhakar,
On 12/03/2015 01:14 PM, Stuart Yoder wrote:
> The MC version numbers provide no meaningful information
> about binary interface compatibility, so remove the
> check which refuses to start the MC unless a specific
> version is found.
>
> Version checking is supposed to be done at the in
DDR has been set as secure in MMU tables. Non-secure master such
as SDHC DMA cannot access data correctly. Mixing secure and non-
secure MMU entries requirs the MMU tables themselves in secure
memory. This patch moves MMU tables into a secure DDR area.
Early MMU tables are changed to set DDR as no
Secure memory is at the end of memory, separated and reserved
from OS, tracked by gd->secure_ram. Secure memory can host
MMU tables, security monitor, etc. This is different from PRAM
used to reserve private memory. PRAM offers memory at the top
of u-boot memory, not necessarily the real end of mem
On Fri, Dec 4, 2015 at 5:32 PM, Eric Nelson wrote:
> The low four bits of the SYSCTL register are reserved on the USDHC
> controller on i.MX6 and i.MX7 processors, but are used for clocking
> operations on earlier models.
>
> Guard against their usage by hiding the bit mask macros on those
> proce
The low four bits of the SYSCTL register are reserved on the USDHC
controller on i.MX6 and i.MX7 processors, but are used for clocking
operations on earlier models.
Guard against their usage by hiding the bit mask macros on those
processors.
These bits are used to prevent glitches when changing c
The low four bits of the SYSCTL register are reserved on the USDHC
controller on i.MX6 and i.MX7 processors, but are used for clocking
operations on earlier models.
Guard against their usage by hiding the bit mask macros on those
processors.
These bits are used to prevent glitches when changing c
Thanks Hector,
On 12/04/2015 11:51 AM, Hector Palacios wrote:
> On 12/04/2015 07:33 PM, Eric Nelson wrote:
>> On 12/04/2015 10:43 AM, Eric Nelson wrote:
...
>> From what I can tell, the linux kernel doesn't do this test and
>> doesn't appear to have any trouble.
>>
>> What code base are you runni
When we use the following in bootargs:
v1=abc
v2=123-${v1}
echo ${v2}
we get 123-${v1}
when we should have got
123-abc
This is because we do not recursively check to see if v2 by itself has
a hidden variable. Fix the same with recursive call.
NOTE: this is a limited implementation as the next leve
Correct the spelling for character..
Signed-off-by: Nishanth Menon
---
common/cli_hush.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cli_hush.c b/common/cli_hush.c
index a7cac4fcb9df..5a26af80c758 100644
--- a/common/cli_hush.c
+++ b/common/cli_hush.c
@@ -3503
Thanks Hector,
On 12/04/2015 11:39 AM, Hector Palacios wrote:
> Hi,
>
> On 12/04/2015 06:32 PM, Eric Nelson wrote:
>> The low four bits of the SYSCTL register are reserved on the USDHC
>> controller on i.MX6 and i.MX7 processors, but are used for clocking
>> operations on earlier models.
>>
>> Gu
Hi Eric,
On 12/04/2015 07:33 PM, Eric Nelson wrote:
> Hi Fabio and Hector,
>
> On 12/04/2015 10:43 AM, Eric Nelson wrote:
>> On 12/04/2015 10:38 AM, Eric Nelson wrote:
>>> On 12/04/2015 10:32 AM, Eric Nelson wrote:
The low four bits of the SYSCTL register are reserved on the USDHC
contr
Hi,
On 12/04/2015 06:32 PM, Eric Nelson wrote:
> The low four bits of the SYSCTL register are reserved on the USDHC
> controller on i.MX6 and i.MX7 processors, but are used for clocking
> operations on earlier models.
>
> Guard against their usage by hiding the bit mask macros on those
> processo
On Friday, December 04, 2015 at 10:36:34 AM, Frank Wang wrote:
> Used s3c usb otg device driver frame and added USB PHY handle function.
>
> Signed-off-by: Frank Wang
> ---
> board/evb_rk3036/evb_rk3036/evb_rk3036.c | 27 ++
> drivers/usb/gadget/Makefile |1
Hi Eric,
On 12/04/2015 06:43 PM, Eric Nelson wrote:
> On 12/04/2015 10:38 AM, Eric Nelson wrote:
>> On 12/04/2015 10:32 AM, Eric Nelson wrote:
>>> The low four bits of the SYSCTL register are reserved on the USDHC
>>> controller on i.MX6 and i.MX7 processors, but are used for clocking
>>> operatio
On Friday, December 04, 2015 at 10:36:32 AM, Frank Wang wrote:
> This series adds support for fastboot related to USB.
>
> [PATCH 1/2] fixed max packet size check error for ep_in in high speed
> condition
>
> [PATCH 2/2] add usb phy control to support fastboot for rk3036
>
> Tested on RK3036 SDK
On Fri, Dec 4, 2015 at 3:43 PM, Eric Nelson wrote:
> Fabio, I haven't been able to reproduce the "mmc erase/ENGcm03648"
> issue (with or without a code change) for a couple of hours now.
>
> Can you give this a spin?
Sure, just gave it a try and the 'mmc erase' issue still happens.
I think your
Hi Michael,
On 12/04/2015 10:40 AM, Michael Trimarchi wrote:
> On Fri, Dec 4, 2015 at 6:32 PM, Eric Nelson wrote:
...
>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>> index c5054d6..1ccc576 100644
>> --- a/drivers/mmc/fsl_esdhc.c
>> +++ b/drivers/mmc/fsl_esdhc.c
>> @@ -502,15
Hi
On Fri, Dec 4, 2015 at 6:49 PM, Eric Nelson wrote:
> Hi Michael,
>
> On 12/04/2015 10:40 AM, Michael Trimarchi wrote:
>> On Fri, Dec 4, 2015 at 6:32 PM, Eric Nelson wrote:
> ...
>
>>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>>> index c5054d6..1ccc576 100644
>>> --- a/dr
On 12/04/2015 10:38 AM, Eric Nelson wrote:
> On 12/04/2015 10:32 AM, Eric Nelson wrote:
>> The low four bits of the SYSCTL register are reserved on the USDHC
>> controller on i.MX6 and i.MX7 processors, but are used for clocking
>> operations on earlier models.
>>
>> Guard against their usage by hi
Hi
On Fri, Dec 4, 2015 at 6:32 PM, Eric Nelson wrote:
> The low four bits of the SYSCTL register are reserved on the USDHC
> controller on i.MX6 and i.MX7 processors, but are used for clocking
> operations on earlier models.
>
> Guard against their usage by hiding the bit mask macros on those
> p
On 12/04/2015 10:32 AM, Eric Nelson wrote:
> The low four bits of the SYSCTL register are reserved on the USDHC
> controller on i.MX6 and i.MX7 processors, but are used for clocking
> operations on earlier models.
>
> Guard against their usage by hiding the bit mask macros on those
> processors.
>
Hi Stephen,
On 4 December 2015 at 10:16, Stephen Warren wrote:
> On 12/04/2015 08:58 AM, Simon Glass wrote:
>>
>> These were added by mistake in commit fde7e189. They cause a warning when
>> configuring the boards. Remove them.
>
>
> Patches 1-3,
> Tested-by: Stephen Warren
>
> It would be usefu
On 12/03/2015 06:47 PM, Tang Yuantian-B29983 wrote:
> Hi York,
>
> Please see my explanation inline.
>
>> -Original Message-
>> From: York Sun [mailto:york...@freescale.com]
>> Sent: Friday, December 04, 2015 12:27 AM
>> To: Tang Yuantian-B29983
>> Cc: u-boot@lists.denx.de; si...@write
On 12/04/2015 01:37 AM, Yuan Yao wrote:
> As the errata A008336 and A008514 do not apply to all LS series SoCs
> (such as LS1021A, LS1043A) we move them to an soc specific file
>
> Signed-off-by: Yuan Yao
> ---
> Changed in v2:
> Update the patch commit message.
> ---
>
> arch/arm/cpu/a
When we use the following in bootargs:
v1=abc
v2=123-${v1}
echo $v2
we get 123-${v1}
This is because we do not recursively check to see if v2 by itself has
a hidden variable. Fix the same with recursive call
Signed-off-by: Nishanth Menon
---
Testing with sandbox: http://pastebin.ubuntu.com/13672
On 12/04/2015 08:58 AM, Simon Glass wrote:
These were added by mistake in commit fde7e189. They cause a warning when
configuring the boards. Remove them.
Patches 1-3,
Tested-by: Stephen Warren
It would be useful to include the appropriate Fixes: tags in the commit
message, and this issue was
Hi
On Dec 4, 2015 5:50 PM, "Eric Nelson" wrote:
>
> Hi all,
>
> On 12/04/2015 09:08 AM, Eric Nelson wrote:
> ...
> >
> > I think you're onto something.
> >
> > According to the i.MX35 reference manual, which I think was the origin
> > of this patch, the low four bits of the SYSCTL register of the
Hi all,
On 12/04/2015 09:08 AM, Eric Nelson wrote:
...
>
> I think you're onto something.
>
> According to the i.MX35 reference manual, which I think was the origin
> of this patch, the low four bits of the SYSCTL register of the SDHC5
> 3 - SDCLKEN
> 2 - PEREN
> 1
Hi Eric,
On Fri, Dec 4, 2015 at 2:35 PM, Eric Nelson wrote:
> How easy is this for you to reproduce?
Very easy as it happens 100% of the times I run 'mmc erase' on a revC2
or revC4 board.
Thanks
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lis
Hi Fabio,
On 12/02/2015 12:53 PM, Fabio Estevam wrote:
> On Wed, Dec 2, 2015 at 5:28 PM, Eric Nelson wrote:
>
...
>>
>> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
>> index 53084a7..8f5d9e1 100644
>> --- a/drivers/mmc/mmc.c
>> +++ b/drivers/mmc/mmc.c
>> @@ -105,6 +105,9 @@ int mmc_send_cm
Hi Michael,
On 12/02/2015 01:00 PM, Michael Trimarchi wrote:
> Hi
>
> On Wed, Dec 2, 2015 at 8:54 PM, Fabio Estevam wrote:
>> Hi Michael,
>>
>> On Wed, Dec 2, 2015 at 5:37 PM, Michael Trimarchi
>> wrote:
>>
>>> Can you print the sysctl & 0xF? I want to check if this workaround is
>>> really app
Subcommands contain pointers to functions which are not updated when
MANUAL_REALOC is enabled. This patch fix it.
Signed-off-by: Michal Simek
---
common/cmd_i2c.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 3d0d
Subcommands contain pointers to functions which are not updated when
MANUAL_REALOC is enabled. This patch fix it.
Signed-off-by: Michal Simek
---
test/dm/cmd_dm.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/test/dm/cmd_dm.c b/test/dm/cmd_dm.c
index caff49aa4f62..b6e71091
For platforms that don't use device tree in SPL the only way to mark this
driver as 'required by relocation' is with the DM_FLAG_PRE_RELOC flag. Add
this to ensure that the driver is bound.
Signed-off-by: Simon Glass
Reported-by: Stephen Warren
---
drivers/serial/ns16550.c | 1 +
1 file change
These were added by mistake in commit fde7e189. They cause a warning when
configuring the boards. Remove them.
Signed-off-by: Simon Glass
Reported-by: Stephen Warren
---
configs/beaver_defconfig | 3 ---
configs/cardhu_defconfig | 3 ---
configs/jetson-tk1_defconfig | 3 ---
configs/tr
This is currently broken since it does not have the reg-shift property for
the UART in the device tree. Fix it.
Reported-by: Yegor Yefremov
Signed-off-by: Simon Glass
---
arch/arm/dts/am33xx.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/
At present an incorrect #if term is preventing this data from being compiled
in. All tegra boards use driver model for serial, so we can just drop this.
Signed-off-by: Simon Glass
Reported-by: Stephen Warren
---
arch/arm/mach-tegra/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Hi,
On 4 December 2015 at 07:09, Tom Rini wrote:
> On Fri, Dec 04, 2015 at 03:10:14PM +0100, Yegor Yefremov wrote:
>> On Fri, Dec 4, 2015 at 2:59 PM, Thomas Chou wrote:
>> > Hi Stephen,
>> >
>> >
>> > On 2015年12月04日 06:55, Stephen Warren wrote:
>> >>
>> >> The patch below appears to solve the pr
On Friday, December 04, 2015 at 04:12:18 PM, Lukasz Majewski wrote:
> Hi Marek,
Hi,
> > On Friday, December 04, 2015 at 10:09:19 AM, Lukasz Majewski wrote:
> > > Hi Marek,
> >
> > Hi!
> >
> > > > The driver is for the dwc2 otg block , so rename it accordingly
> > > > finally.
> > >
> > > Yeah
Hi Marek,
> On Friday, December 04, 2015 at 10:09:19 AM, Lukasz Majewski wrote:
> > Hi Marek,
>
> Hi!
>
> > > The driver is for the dwc2 otg block , so rename it accordingly
> > > finally.
> >
> > Yeah finally ...
> >
> > And neither me nor Przemek added to CC
>
> You were CCed on all the
On Fri, Dec 04, 2015 at 03:10:14PM +0100, Yegor Yefremov wrote:
> On Fri, Dec 4, 2015 at 2:59 PM, Thomas Chou wrote:
> > Hi Stephen,
> >
> >
> > On 2015年12月04日 06:55, Stephen Warren wrote:
> >>
> >> The patch below appears to solve the problem. Any ideas how to fix this
> >> cleanly? I don't think
Hi Stefan,
On Fri, Dec 4, 2015 at 3:52 PM, Stefan Roese wrote:
> Hi Bin,
>
>
> On 04.12.2015 07:17, Bin Meng wrote:
>>
>> Hi,
>>
>> On Fri, Dec 4, 2015 at 1:31 PM, Bin Meng wrote:
>>>
>>> Hi Stefan,
>>>
>>> On Thu, Dec 3, 2015 at 10:12 PM, Stefan Roese wrote:
Hi Bin,
On
On Fri, Dec 4, 2015 at 5:09 AM, Stefan Roese wrote:
> Hi Stefano,
>
>
> On 04.12.2015 12:49, Stefano Babic wrote:
>>
>> On 04/12/2015 11:51, Fabio Estevam wrote:
>>>
>>> Hi Stefano,
>>>
>>> On Fri, Dec 4, 2015 at 7:02 AM, Stefano Babic wrote:
Check for bmode before reading the boot devi
On Fri, Dec 4, 2015 at 2:59 PM, Thomas Chou wrote:
> Hi Stephen,
>
>
> On 2015年12月04日 06:55, Stephen Warren wrote:
>>
>> The patch below appears to solve the problem. Any ideas how to fix this
>> cleanly? I don't think we want to introduce a CONFIG_SPL_xxx for every
>> CONFIG_xxx, yet CONFIG_IS_EN
Hi Stephen,
On 2015年12月04日 06:55, Stephen Warren wrote:
The patch below appears to solve the problem. Any ideas how to fix this
cleanly? I don't think we want to introduce a CONFIG_SPL_xxx for every
CONFIG_xxx, yet CONFIG_IS_ENABLED() (e.g. used around
arch/arm/mach-tegra/board.c's U_BOOT_DEVICE
On Friday, December 04, 2015 at 10:09:19 AM, Lukasz Majewski wrote:
> Hi Marek,
Hi!
> > The driver is for the dwc2 otg block , so rename it accordingly
> > finally.
>
> Yeah finally ...
>
> And neither me nor Przemek added to CC
You were CCed on all the patches though ... do you prefer you
Hi Stefano,
On Mon, Nov 23, 2015 at 4:18 PM, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
> registered") Ethernet is no longer functional.
>
> This commit does not have an issue in itself, but it revelead a problem
> with t
Hi Stefano,
On 04.12.2015 12:49, Stefano Babic wrote:
On 04/12/2015 11:51, Fabio Estevam wrote:
Hi Stefano,
On Fri, Dec 4, 2015 at 7:02 AM, Stefano Babic wrote:
Check for bmode before reading the boot device
to check if a serial downloader is started,
and returns UART if the serial downloade
LS1043ARDB Secure Boot Target from NOR has been added.
- Configs defined to enable esbc_validate.
- ESBC Address in header is made 64 bit.
- SMMU is re-configured in Bypass mode.
Signed-off-by: Aneesh Bansal
---
Changes in v4:
- Fixed compilation break for LS1021AQDS
arch/arm/include/asm/arch-f
On Friday 04 December 2015 05:26 PM, Stefano Babic wrote:
On 04/12/2015 12:25, Jagan Teki wrote:
On Friday 04 December 2015 04:52 PM, Fabio Estevam wrote:
Hi Jagan,
On Fri, Dec 4, 2015 at 6:44 AM, Jagan Teki wrote:
Applied to u-boot-spi/master
Not sure why you applied this into u-boot-spi
Hi Tom,
please pull from u-boot-imx, thanks !
The following changes since commit 1d149eddcc0661b683002f76a8240491eba00dbb:
dm: Add timeline and guide for porting serial drivers (2015-11-20
13:59:54 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git master
On 04/12/2015 12:25, Jagan Teki wrote:
> On Friday 04 December 2015 04:52 PM, Fabio Estevam wrote:
>> Hi Jagan,
>>
>> On Fri, Dec 4, 2015 at 6:44 AM, Jagan Teki wrote:
>>
>>> Applied to u-boot-spi/master
>>
>> Not sure why you applied this into u-boot-spi.
>
> Because these two are SPI/SPI-NOR re
Hi Fabio,
On 04/12/2015 11:51, Fabio Estevam wrote:
> Hi Stefano,
>
> On Fri, Dec 4, 2015 at 7:02 AM, Stefano Babic wrote:
>> Check for bmode before reading the boot device
>> to check if a serial downloader is started,
>> and returns UART if the serial downloader is set,
>> letting SPL to wait
On Friday 04 December 2015 04:52 PM, Fabio Estevam wrote:
Hi Jagan,
On Fri, Dec 4, 2015 at 6:44 AM, Jagan Teki wrote:
Applied to u-boot-spi/master
Not sure why you applied this into u-boot-spi.
Because these two are SPI/SPI-NOR related - not so big deal as these
were first two patches fr
Hi Jagan,
On Fri, Dec 4, 2015 at 6:44 AM, Jagan Teki wrote:
> Applied to u-boot-spi/master
Not sure why you applied this into u-boot-spi.
This is i.MX board related code and has already been applied into
Stefano's tree:
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=71bcdafe73255d6
Hi Stefano,
On Fri, Dec 4, 2015 at 7:02 AM, Stefano Babic wrote:
> Check for bmode before reading the boot device
> to check if a serial downloader is started,
> and returns UART if the serial downloader is set,
> letting SPL to wait for an image if
> CONFIG_SPL_YMODEM_SUPPORT is set.
>
> This al
This series adds support for fastboot related to USB.
[PATCH 1/2] fixed max packet size check error for ep_in in high speed condition
[PATCH 2/2] add usb phy control to support fastboot for rk3036
Tested on RK3036 SDK board, it works Okay.
board/evb_rk3036/evb_rk3036/evb_rk3036.c | 27 ++
In current fastboot frame, both full and high speed use 'fs_ep_in',
but fs_ep_in.wMaxPacketSize is configurated 64 bytes as default,
I do not understand why high speed TX max packet size is also set as
64 bytes, so I changed the condition from '!=' to '>' as a workaround.
Signed-off-by: Frank Wan
Used s3c usb otg device driver frame and added USB PHY handle function.
Signed-off-by: Frank Wang
---
board/evb_rk3036/evb_rk3036/evb_rk3036.c | 27 ++
drivers/usb/gadget/Makefile |1 +
drivers/usb/gadget/rk_udc_otg_phy.c | 36 +++
Hey Julian
On December 4, 2015 12:01:27 AM CET, Julian Calaby
wrote:
>Hi Oliver,
>
>On Fri, Dec 4, 2015 at 9:57 AM, Julian Calaby
>wrote:
>> Hi Oliver,
>>
>> On Fri, Dec 4, 2015 at 3:49 AM, Olliver Schinagl
>wrote:
>>> From: Olliver Schinagl
>>>
>>> Commit 6c739c5d added code to enable i2c bu
Create a soc.c file to put the code for soc special settings.
Signed-off-by: Yuan Yao
---
arch/arm/cpu/armv7/ls102xa/Makefile | 1 +
arch/arm/cpu/armv7/ls102xa/soc.c| 66 +
arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h | 12 +
board/fre
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