On 12/04/2015 10:32 AM, Eric Nelson wrote: > The low four bits of the SYSCTL register are reserved on the USDHC > controller on i.MX6 and i.MX7 processors, but are used for clocking > operations on earlier models. > > Guard against their usage by hiding the bit mask macros on those > processors. > > These bits are used to prevent glitches when changing clocks on > i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7. > > From the i.MX6DQ RM: > To prevent possible glitch on the card clock, clear the > FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS > or DVS in System Control Register) or setting RSTA bit. > > Signed-off-by: Eric Nelson <[email protected]>
I forgot to add an in-reply-to header. http://lists.denx.de/pipermail/u-boot/2015-December/thread.html#236651 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
