Hi,
I was using buildman to get toolchains from kernel.org to build U-Boot
for as many boards as possible. But I still see some boards do not
build. Are these build failures a known issue? Error log below:
blackfin: + cm-bf561 blackstamp bct-brettl2 cm-bf527 bf506f-ezkit
ip04 bf527-sdp bf537
On Tuesday, September 22, 2015 at 05:52:58 AM, Thomas Chou wrote:
> Hi Marek,
Hi,
> On 09/22/2015 08:10 AM, Marek Vasut wrote:
> > I suspect you might want to tweak the core code to check if those
> > .set_speed and .set_mode are assigned in dm_spi_ops structure and
> > if not, don't call them.
>
Hi Hans,
On 13 September 2015 at 09:42, Hans de Goede wrote:
> common/dlmalloc.c is quite big, both in .text and .data usage, therefor
> on some boards the SPL is build to use only malloc_simple.c and not the
> dlmalloc.c code. This is done in various include/configs/foo.h with the
> following co
Hi Masahiro,
On 13 September 2015 at 09:00, Masahiro Yamada
wrote:
> Simon,
>
>
>
> 2015-09-04 10:10 GMT+09:00 Simon Glass :
>> On 31 August 2015 at 07:22, Simon Glass wrote:
>>> On 31 August 2015 at 04:36, Masahiro Yamada
>>> wrote:
These properties are necessary to use full-featured pinc
Hi Hans,
On 13 September 2015 at 09:42, Hans de Goede wrote:
> malloc_simple uses a part of the stack as heap, initially it uses
> SYS_MALLOC_F_LEN bytes which typically is quite small as the initial
> stacks sits in SRAM and we do not have that much SRAM to work with.
>
> When DRAM becomes avail
On 13 September 2015 at 09:42, Hans de Goede wrote:
> From: Philipp Rosenberger
>
> The gd->malloc_ptr and the gd->malloc_limit are offsets to gd->malloc_base.
> But the addr variable contains the absolute address. The new_ptr must be:
> addr + bytes - gd->malloc_base.
>
> Signed-off-by: Philipp
Hi Hans,
On 13 September 2015 at 09:42, Hans de Goede wrote:
>
> spl_relocate_stack_gd only gets called from arch/arm/lib/crt0.S which
> clears the bss directly after calling it, so there is no need to clear
> it from spl_relocate_stack_gd.
>
> Signed-off-by: Hans de Goede
> ---
> common/spl/sp
On Fri, Sep 18, 2015 at 6:21 PM, Fabio Estevam wrote:
> Copying data from PC to DFU device
> Download[=] 100% 478208 bytes
> Download done.
> state(7) = dfuMANIFEST, status(0) = No error condition is present
> state(10) = dfuERROR, status(14) = Something went wro
From: Fabio Estevam
SPI NOR flashes need to erase the entire sector size and we cannot pass
any arbitrary length for the erase operation.
To illustrate the problem:
Copying data from PC to DFU device
Download[=] 100% 478208 bytes
Download done.
state(7) = dfuMA
Hi Marek,
On 09/22/2015 08:10 AM, Marek Vasut wrote:
I suspect you might want to tweak the core code to check if those
.set_speed and .set_mode are assigned in dm_spi_ops structure and
if not, don't call them.
I wonder if this worths, as altera_spi is the only one that cannot set
speed and mo
Hi Joe,
On Tue, Sep 15, 2015 at 10:46 AM, Bin Meng wrote:
> Hi Joe,
>
> On Sat, Sep 12, 2015 at 3:44 AM, Joe Hershberger
> wrote:
>> Hi Bin,
>>
>> On Fri, Sep 4, 2015 at 6:56 AM, Bin Meng wrote:
>>> In get_phy_device_by_mask(), when no phy is found, we should not
>>> create any phy device.
>>>
On Tue, Sep 22, 2015 at 12:23 AM, Stephen Warren wrote:
> Oh good:-)
>
> I was going to give you my dfu_alt_info, but it's at work right now, so
> I was waiting until tomorrow. I did try to repro this, but I was having
> a lot of trouble with both the two boards I have that have SPI, so
> wasn't
On 09/21/2015 08:55 PM, Fabio Estevam wrote:
> On Mon, Sep 21, 2015 at 10:50 PM, Fabio Estevam wrote:
>> Stephen,
>>
>> On Mon, Sep 21, 2015 at 2:37 PM, Fabio Estevam wrote:
>>> On Mon, Sep 21, 2015 at 2:31 PM, Stephen Warren
>>> wrote:
>>>
I haven't tested SF support recently (only MMC).
> -Original Message-
> From: Sun York-R58495
> Sent: Tuesday, September 22, 2015 1:27 AM
> To: Gong Qianyu-B52263; u-boot@lists.denx.de
> Cc: Hu Mingkai-B21284; Sun York-R58495; Hou Zhiqiang-B48286; Xie Shaohui-
> B21989; Song Wenbin-B53747; Wood Scott-B07421
> Subject: Re: [Patch v2 02/16
On Mon, Sep 21, 2015 at 10:50 PM, Fabio Estevam wrote:
> Stephen,
>
> On Mon, Sep 21, 2015 at 2:37 PM, Fabio Estevam wrote:
>> On Mon, Sep 21, 2015 at 2:31 PM, Stephen Warren
>> wrote:
>>
>>> I haven't tested SF support recently (only MMC). However, it should still
>>> work:-) Are you using ci_
Hi Peter,
On 17 September 2015 at 21:54, Simon Glass wrote:
>
> Hi Peter,
>
> On 9 September 2015 at 15:13, Peter Griffin wrote:
> > The README had a few mistakes, and one of the URL's
> > had changed. Also update the boot log with the latest
> > boot trace from ATF, which now includes the mcuim
Hi Simon,
On Tue, Sep 22, 2015 at 3:41 AM, Simon Glass wrote:
> Hi Bin,
>
> On 14 September 2015 at 20:30, Bin Meng wrote:
>>
>> Hi Simon,
>>
>> On Tue, Sep 15, 2015 at 10:15 AM, Simon Glass wrote:
>> > Hi Bin,
>> >
>> > On 14 September 2015 at 20:06, Bin Meng wrote:
>> >>
>> >> Hi Simon,
>> >
Stephen,
On Mon, Sep 21, 2015 at 2:37 PM, Fabio Estevam wrote:
> On Mon, Sep 21, 2015 at 2:31 PM, Stephen Warren wrote:
>
>> I haven't tested SF support recently (only MMC). However, it should still
>> work:-) Are you using ci_udc? If so, make sure you have this very recent
>> patch:
>>
>>> comm
Hi Stefano, Benoit,
On Mon, Sep 21, 2015 at 10:13:42PM +0200, Stefano Babic wrote:
>Hi Benoit, Peng,
>
>On 21/09/2015 20:41, Benoît Thébaudeau wrote:
>> Hi Peng,
>>
>> On Mon, Sep 21, 2015 at 3:05 AM, Peng Fan wrote:
>>> On Sun, Sep 20, 2015 at 05:02:58PM +0200, Benoît Thébaudeau wrote:
On
Hi Tom.
This doesn't break anything and makes the pinctrl behaviour correct, so it
is good to get it into this release.
The following changes since commit 1fb8d7933924aa5deb7e722d64c1d9fc7f0b2b82:
Merge git://git.denx.de/u-boot-x86 (2015-09-17 17:00:08 -0400)
are available in the git reposit
On Monday, September 21, 2015 at 02:58:31 PM, Thomas Chou wrote:
> Convert altera_spi to driver model
>
> Signed-off-by: Thomas Chou
Hi!
> ---
> drivers/spi/Kconfig | 8 ++
> drivers/spi/altera_spi.c | 197
> ++- 2 files changed, 119
> insertio
From: Stephen Warren
In order to avoid any assumptions about any device connected to
P2371-2180's expansion connector, the latest pinmux spreadsheet
configures all muxable pins on that connector to be GPIO inputs, with
on-chip pulls where appropriate.
Signed-off-by: Stephen Warren
---
board/nv
Signed-off-by: Troy Kisky
---
tools/imximage.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/imximage.c b/tools/imximage.c
index 97a6880..7c21922 100644
--- a/tools/imximage.c
+++ b/tools/imximage.c
@@ -396,8 +396,8 @@ static void print_hdr_v2(struct imx_header *im
On 9/20/2015 1:59 AM, Stefano Babic wrote:
> Hi Troy,
>
> On 15/09/2015 03:06, Troy Kisky wrote:
>> When CHECK_BITS_SET was added, they forgot to add
>> a new command table, and instead overwrote the
>> previous table.
>>
>> Signed-off-by: Troy Kisky
>>
>> ---
>>
>
> This patch breaks building b
Signed-off-by: Adrian Alonso
---
arch/arm/cpu/armv7/mx6/Makefile | 1 -
arch/arm/cpu/armv7/mx6/hab.c| 502 ---
arch/arm/imx-common/Makefile| 1 +
arch/arm/imx-common/hab.c | 515
include/imx_hab.h
Move common chip revision id's to main cpu header file
mx25 generic include cpu header for chip revision
Signed-off-by: Adrian Alonso
---
arch/arm/cpu/arm926ejs/mx25/generic.c | 1 +
arch/arm/include/asm/arch-imx/cpu.h | 12
arch/arm/include/asm/arch-mx25/imx-regs.h | 4
Add secure boot support for mx7dsabresd target board
Signed-off-by: Adrian Alonso
---
board/freescale/mx7dsabresd/imximage.cfg | 7 +++
include/configs/mx7dsabresd.h| 4
2 files changed, 11 insertions(+)
diff --git a/board/freescale/mx7dsabresd/imximage.cfg
b/board/freesca
Devices supported are:
- NFC (NAND FLASH)
- MMC
- QSPI (SPI NOR FLASH)
- I2C (only bus 2)
- I2C RTC
- I2C EEPROM
- FEC
Patch-series: 2
- remove useless CONFIG_SYS_SPD_BUS_NUM from config
- remove include of config_cmd_default.h
- remove duplicate CONFIG_CMD_NET
Signed-off-by: Albert ARIBAUD (3ADE
The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.
Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.
To make the change binary-invariant, declare I2
The VF610 DDRMC driver code contains settings which are
board-specific. Move these out to boards so that new boards
can define their own without having to modify the driver.
Signed-off-by: Albert ARIBAUD (3ADEV)
---
Changes in v2:
- reverted from all-custom to JEDEC+PHY+custom settings
arch/ar
Hi Benoit, Peng,
On 21/09/2015 20:41, Benoît Thébaudeau wrote:
> Hi Peng,
>
> On Mon, Sep 21, 2015 at 3:05 AM, Peng Fan wrote:
>> On Sun, Sep 20, 2015 at 05:02:58PM +0200, Benoît Thébaudeau wrote:
>>> On Sun, Sep 20, 2015 at 3:02 PM, Peng Fan wrote:
On Sun, Sep 20, 2015 at 01:33:20PM +0200
Hi Otavio, Jagan,
On 21/09/2015 20:36, Otavio Salvador wrote:
> On Mon, Sep 21, 2015 at 3:21 PM, Jagan Teki wrote:
>> On 21 September 2015 at 23:43, Otavio Salvador
>> wrote:
>>> Hello Jagan,
>>>
>>> I sent the new revision of the protective SPI NOR patches; is it
>>> possible for you to review
Hi Bin,
On 14 September 2015 at 20:30, Bin Meng wrote:
>
> Hi Simon,
>
> On Tue, Sep 15, 2015 at 10:15 AM, Simon Glass wrote:
> > Hi Bin,
> >
> > On 14 September 2015 at 20:06, Bin Meng wrote:
> >>
> >> Hi Simon,
> >>
> >> On Tue, Sep 15, 2015 at 9:52 AM, Simon Glass wrote:
> >> > Hi Bin,
> >>
On 22 September 2015 at 00:06, Otavio Salvador
wrote:
> On Mon, Sep 21, 2015 at 3:21 PM, Jagan Teki wrote:
>> On 21 September 2015 at 23:43, Otavio Salvador
>> wrote:
>>> Hello Jagan,
>>>
>>> I sent the new revision of the protective SPI NOR patches; is it
>>> possible for you to review them? I
Hi Peng,
On Mon, Sep 21, 2015 at 3:05 AM, Peng Fan wrote:
> On Sun, Sep 20, 2015 at 05:02:58PM +0200, Benoît Thébaudeau wrote:
>>On Sun, Sep 20, 2015 at 3:02 PM, Peng Fan wrote:
>>> On Sun, Sep 20, 2015 at 01:33:20PM +0200, Benoît Thébaudeau wrote:
>> Also If still checking mux_ctrl_ofs, we
On Mon, Sep 21, 2015 at 3:21 PM, Jagan Teki wrote:
> On 21 September 2015 at 23:43, Otavio Salvador
> wrote:
>> Hello Jagan,
>>
>> I sent the new revision of the protective SPI NOR patches; is it
>> possible for you to review them? I would like to get them applied for
>> 2015.10 as they are block
Hi Michal,
On 19 September 2015 at 06:38, Michal Simek wrote:
> On 09/19/2015 02:55 AM, Michal Simek wrote:
>> On 09/16/2015 09:20 AM, Jagan Teki wrote:
>>> Hi Michal,
>>>
>>> On 15 September 2015 at 18:58, Simon Glass wrote:
Hi Jagan,
On 15 September 2015 at 02:13, Jagan Teki wr
On 09/17/2015 04:46 PM, Hans de Goede wrote:
This is not necessary / useful when not building with CONFIG_SANDBOX and
with the addition of ubifs support to the generic fs commands it actually
gets in the way, since both operate on a fake / NULL blkdev.
Acked-by: Stephen Warren
On 21 September 2015 at 23:43, Otavio Salvador
wrote:
> Hello Jagan,
>
> I sent the new revision of the protective SPI NOR patches; is it
> possible for you to review them? I would like to get them applied for
> 2015.10 as they are blocking the Congatec patches.
Out of all protection bit changes
On 09/13/2015 11:25 PM, Stefan Roese wrote:
Hi Stephen,
On 11.09.2015 19:07, Stephen Warren wrote:
On 09/09/2015 11:07 AM, Simon Glass wrote:
+Stephen
Hi Stefan,
On Thursday, 3 September 2015, Stefan Roese wrote:
The current "simple" address translation simple_bus_translate() is not
worki
Hello Jagan,
I sent the new revision of the protective SPI NOR patches; is it
possible for you to review them? I would like to get them applied for
2015.10 as they are blocking the Congatec patches.
--
Otavio Salvador O.S. Systems
http://www.ossystems.com.brht
On 09/14/2015 11:35 AM, Hans de Goede wrote:
Hi,
On 01-09-15 22:03, Stephen Warren wrote:
On 08/22/2015 11:04 AM, Hans de Goede wrote:
Add generic fs support, so that commands like ls, load and test -e
can be
used on ubifs.
@@ -530,6 +531,28 @@ int get_device_and_partition(const char *ifnam
Reminder... let me know if there is any comment.
Rgds,
Vikas
> -Original Message-
> From: Vikas MANOCHA
> Sent: Friday, September 11, 2015 11:28 AM
> To: u-boot@lists.denx.de; s...@denx.de; grmo...@opensource.altera.com;
> jt...@openedev.com; ma...@denx.de
> Cc: Vikas MANOCHA
> Subject: [
On 21 September 2015 at 18:28, Thomas Chou wrote:
> Convert altera_spi to driver model
Thanks for the patch, Thomas.
>
> Signed-off-by: Thomas Chou
Reviewed-by: Jagan Teki
> ---
> drivers/spi/Kconfig | 8 ++
> drivers/spi/altera_spi.c | 197
> ++--
On 09/17/2015 12:02 AM, Gong Qianyu wrote:
> From: Mingkai Hu
>
> Config Security Level Register is different between different SoCs,
> so put the CSL register definition into the arch speicific directory.
s/speicific/specific
>
> Signed-off-by: Mingkai Hu
> Signed-off-by: Gong Qianyu
> --
On Mon, Sep 21, 2015 at 2:31 PM, Stephen Warren wrote:
> I haven't tested SF support recently (only MMC). However, it should still
> work:-) Are you using ci_udc? If so, make sure you have this very recent
> patch:
>
>> commit b337b3b2a53f112a217f4bd31307b02f830bb787
>> Author: Stephen Warren
>>
On Thu, 2015-09-17 at 15:02 +0800, Gong Qianyu wrote:
> get_clocks() should not be limited by ESDHC.
>
> Signed-off-by: Gong Qianyu
> ---
> common/board_f.c | 2 +-
> include/configs/BSC9132QDS.h | 1 +
> include/configs/MPC8308RDB.h | 1 +
> include/configs/MPC837XEMD
On 09/21/2015 11:13 AM, Fabio Estevam wrote:
Hi Stephen,
On Wed, Jun 11, 2014 at 7:03 PM, Stephen Warren wrote:
From: Stephen Warren
This allows SPI Flash to be programmed using DFU.
Signed-off-by: Stephen Warren
Is this still working in mainline U-boot?
I haven't tested SF support rec
On 09/17/2015 12:06 AM, Gong Qianyu wrote:
> Signed-off-by: Gong Qianyu
> ---
> board/freescale/ls1043ardb/cpld.c | 18 ++
> board/freescale/ls1043ardb/cpld.h | 1 +
> 2 files changed, 19 insertions(+)
>
Squash this patch with nand boot patch.
York
_
On 09/17/2015 12:06 AM, Gong Qianyu wrote:
> Signed-off-by: Gong Qianyu
> ---
> board/freescale/ls1043ardb/cpld.c | 17 +
> board/freescale/ls1043ardb/cpld.h | 1 +
> 2 files changed, 18 insertions(+)
Squash this patch with SD boot patch.
York
___
On 09/17/2015 12:06 AM, Gong Qianyu wrote:
> From: Mingkai Hu
>
> LS1043ARDB Specification:
> -
> Memory subsystem:
> * 2GByte DDR4 SDRAM (32bit but)
Do you mean "bus" here?
> * 128 Mbyte NOR flash single-chip memory
> * 512 Mbyte NAND flash
> * 16 Mbyte high-speed
On 09/17/2015 12:02 AM, Gong Qianyu wrote:
> get_clocks() should not be limited by ESDHC.
>
> Signed-off-by: Gong Qianyu
> ---
> common/board_f.c | 2 +-
> include/configs/BSC9132QDS.h | 1 +
> include/configs/MPC8308RDB.h | 1 +
> include/configs/MPC837XEMDS.h |
On 09/17/2015 12:05 AM, Gong Qianyu wrote:
> From: Shaohui Xie
>
> Remove the redundant byte swap of the ucode before uploading to IRAM.
>
> Signed-off-by: Hou Zhiqiang
> Signed-off-by: Shaohui Xie
> Signed-off-by: Mingkai Hu
> Signed-off-by: Gong Qianyu
> ---
> drivers/net/fm/eth.c | 69
On 09/17/2015 12:06 AM, Gong Qianyu wrote:
> From: Mingkai Hu
>
> Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
> ARMv8 cores and 2rd generation of Chassis.
>
> Signed-off-by: Li Yang
> Signed-off-by: Hou Zhiqiang
> Signed-off-by: Mingkai Hu
> Signed-off-by: Gong Qian
Hi Stephen,
On Wed, Jun 11, 2014 at 7:03 PM, Stephen Warren wrote:
> From: Stephen Warren
>
> This allows SPI Flash to be programmed using DFU.
>
> Signed-off-by: Stephen Warren
Is this still working in mainline U-boot?
I am getting the following error on the PC host side:
sudo dfu-util -D u
Gentle ping.
On Sun, Aug 30, 2015 at 11:42:31AM +0300, Nikita Kiryanov wrote:
> This series adds the following functionality to the splash_source library:
> - load splash image from filesystem formatted usb storage
> - load splash image from filesystem formatted mmc storage
> - load splash image f
Hi Wenyou,
> On Sep 16, 2015, at 11:22 , Wenyou Yang wrote:
>
> According to the SDHC specification, stopping the SD Clock is by setting
> the SD Clock Enable bit in the Clock Control register at 0, instead of
> setting all bits at 0.
>
> Before stopping the SD clock, we need to make sure all S
Hi Tom,
> On Sep 18, 2015, at 22:27 , Tom Rini wrote:
>
> On Fri, Sep 18, 2015 at 09:32:47AM +0200, Lukasz Majewski wrote:
>> Hi Tom,
>>
>>> On Thu, Sep 17, 2015 at 04:43:33PM +0200, Lukasz Majewski wrote:
>>>
Hi Tom,
> On Monday, September 14, 2015 at 01:22:20 PM, Lukasz Majews
Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled. Each SoC has its own defconfig file
for the build-test coverage. Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y
This has been unused since commit f4e190e317b8 ("ARM: uniphier:
enable SPL_OF_CONTROL").
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/include/mach/platdevice.h | 24
1 file changed, 24 deletions(-)
delete mode 100644 arch/arm/mach-uniphier/include/mach/pla
The UART I/O ports for PH1-Pro4 has no input enable controlling.
This code is useless.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S
b/arch/arm/mach-un
Without this, build fails if CONFIG_MICRO_SUPPORT_CARD is disabled.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/spl.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-uniphier/spl.c b/arch/arm/mach-uniphier/spl.c
index f0df9b1..4c3cad3 100644
--- a/arch/arm/ma
I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify
they belong to UniPhier SoC family.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Kconfig| 14 +++---
arch/arm/mach-uniphier/Makefile | 8
arch/arm/mach-uniphier/inclu
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/Makefile | 4 +-
arch/arm/dts/uniphier-ph1-ld6b-ref.dts | 1 +
arch/arm/dts/uniphier-proxstream2-gentil.dts
Masahiro Yamada (14):
ARM: uniphier: remove unused header file
ARM: uniphier: remove useless wrapper functions
ARM: uniphier: refactor LED function
ARM: uniphier: move CONFIG_SUPPORT_CARD_* macros to local file
ARM: uniphier: allow to disable CONFIG_MICRO_SUPPORT_CARD
ARM: uniphier:
The wrapper functions, uniphier_board_*, are just making function
calls complex. Remove them.
Also, use empty inline functions in case CONFIG_MICRO_SUPPORT_CARD
is disabled, so that prototype checking works.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_early_init_r.c | 5 +
The macro, led_write(), is now only used in C sources. There is no
more reason to keep the tricky assembly macro. Replace it with a
new C function led_puts().
Also, rename board.h to micro-support-card.h.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/board_common.c |
Currently, IECTRL is enabled after pin-mux settings for the low-level
debugging for PH1-LD4 and PH1-sLD8. While IECTRL is disabled, input
signals are pulled-down, i.e. glitch signal (Low to High transition)
problem occurs if pin-mux is set up first. As a result, one invalid
character is input to
It is no longer necessary to define CONFIG_SUPPORT_CARD_* globally.
Move them to a C file as local macros. Also, rename the C file.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Makefile | 2 +-
.../{support_card.c => micro-support-card.c} |
Move init code of low-level debug into a single file.
This is helpful to create an image that runs on multiple SoCs.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/Makefile | 2 +
arch/arm/mach-uniphier/debug_ll.S| 112 +++
arch/
Currently, the USB boot mode is supported by external loader and
U-boot proper image is put on the section 0. This commit allows
access there.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/init_page_table.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/ar
Currently, console=ttyS0 is hard-coded in CONFIG_EXTRA_ENV_SETTINGS
and it replaces the bootargs in the chosen node of the device tree
passed to the kernel. This is not preferable because I am going to
add some boards whose console is not ttyS0.
Drop bootargs settings from U-Boot's environment an
The DDR SDRAM initialization code has not been mainlined yet, but
U-Boot proper should work.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/uniphier-ph1-pro5-4kbox.dts | 64 ++
arch/arm/mach-uniphier/Kconfig
On Mon, 2015-09-21 at 15:19 +0200, Hans de Goede wrote:
> Hi,
>
> On 21-09-15 14:19, Ian Campbell wrote:
> > On Mon, 2015-09-21 at 13:24 +0200, Hans de Goede wrote:
> > > Hi,
> > >
> > > On 21-09-15 12:22, Ian Campbell wrote:
> > > > On Sun, 2015-09-20 at 15:39 -0400, Hans de Goede wrote:
> > > >
Hi,
On 21-09-15 14:19, Ian Campbell wrote:
On Mon, 2015-09-21 at 13:24 +0200, Hans de Goede wrote:
Hi,
On 21-09-15 12:22, Ian Campbell wrote:
On Sun, 2015-09-20 at 15:39 -0400, Hans de Goede wrote:
We know when u-boot is written to its own partition, in this case the
layout always is:
eb 0
Hello Jaehoon,
On 09/21/2015 02:47 PM, Jaehoon Chung wrote:
Hi, Przemyslaw.
On 09/21/2015 09:26 PM, Przemyslaw Marczak wrote:
The proper CPU ID for those Exynos variants is 0x5422,
but before the 0x5800 was set. This commit fix this back.
Changes:
- set cpu id to 0x5422 instead of 0x5800
- re
Convert altera_spi to driver model
Signed-off-by: Thomas Chou
---
drivers/spi/Kconfig | 8 ++
drivers/spi/altera_spi.c | 197 ++-
2 files changed, 119 insertions(+), 86 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8
Hi, Przemyslaw.
On 09/21/2015 09:26 PM, Przemyslaw Marczak wrote:
> The proper CPU ID for those Exynos variants is 0x5422,
> but before the 0x5800 was set. This commit fix this back.
>
> Changes:
> - set cpu id to 0x5422 instead of 0x5800
> - remove macro proid_is_exynos5800()
> - add macro proid
This commit adds driver for Exynos54xx ADC subsystem.
The driver is implemented using driver model,
amd provides ADC uclass's operations:
- adc_init()
- adc_data()
This driver uses sdelay() function on pooling, so it can
be used before the delay timer is inited.
The basic parameters of ADC conver
This commit adds additional file with implementation of board
detection code for Odroid-XU3/XU4.
The detection depends on compatible found in fdt:
- "samsung,exynos5" - uses Exynos5 generic code
- "samsung,odroidxu3" - try detect XU3 revision
There are few revisions of Odroid XU3/XU4, each can be
Signed-off-by: Przemyslaw Marczak
---
Changes V2:
- none
---
arch/arm/dts/exynos5422-odroidxu3.dts | 7 +++
configs/odroid-xu3_defconfig | 3 +++
2 files changed, 10 insertions(+)
diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts
b/arch/arm/dts/exynos5422-odroidxu3.dts
index d0a86
This commit adds common ADC node, which is disabled as default.
Signed-off-by: Przemyslaw Marczak
---
Changes V2:
- new commit
---
arch/arm/dts/exynos54xx.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi
index bd3619d..da
This driver allows I/O operations on the Samsung S2MPS11 PMIC,
which provides lots of LDO/BUCK outputs.
To enable it, update defconfig with:
- CONFIG_PMIC_S2MPS11
and additional, if were not defined:
- CONFIG_CMD_PMIC
- CONFIG_ERRNO_STR
The binding info: doc/device-tree-bindings/pmic/s2mps11.txt
This ADC is required for Odroid's board revision detection.
The pre-reloc request is enabled, since board detection will
be done in one of early function call.
Signed-off-by: Przemyslaw Marczak
---
Changes V2:
- new commit
---
arch/arm/dts/exynos5422-odroidxu3.dts | 5 +
1 file changed, 5 in
The proper CPU ID for those Exynos variants is 0x5422,
but before the 0x5800 was set. This commit fix this back.
Changes:
- set cpu id to 0x5422 instead of 0x5800
- remove macro proid_is_exynos5800()
- add macro proid_is_exynos5422()
- change the calls to proid_is_exynos5800() with new macro
Sign
The CPU name for Exynos was concatenated with cpu id,
but for new Exynos platforms, like Chromebook Peach Pi
based on Exynos5800, the name of SoC variant does not
include the real SoC cpu id (0x5422).
For such case, the CPU name should be defined in device tree.
This commit introduces new device-
The function get_board_type() is called in two places by common code,
but the returned pointer was never check.
This commit adds checking the returned pointer, before use it.
Signed-off-by: Przemyslaw Marczak
---
Changes V2:
- new commit
---
board/samsung/common/board.c | 4 ++--
board/samsung/
This platform is based on Exynos5800 but the cpu id is 0x5422.
This doesn't fit the common Exynos SoC name convention, so now,
the CPU name is defined by device tree string, to be printed
properly.
Signed-off-by: Przemyslaw Marczak
---
Changes V2:
- move cpu name from config to dts
---
arch/arm/
This commit adds:
- new uclass id: UCLASS_ADC
- new uclass driver: drivers/adc/adc-uclass.c
The uclass's implementation is as simple as needed and provides functions:
- adc_init() - init ADC conversion
- adc_data() - convert and return data
- adc_data_mask() - return ADC data mask
- adc_channel_si
This patchset adds:
- CPU model in dts for Chromebook Peach Pi as Exynos5800
- set the cpu id of Exynos5422 to 0x5422
- S2MPS11 PMIC I/O driver
- Exynos5420-compatible (9-channel, 12-bit) ADC driver
- new file for Exynos5: exynos5-dt-types.c
- board detection for Odroid XU3 / XU3lite / XU4
- fixed
On Mon, 2015-09-21 at 13:24 +0200, Hans de Goede wrote:
> Hi,
>
> On 21-09-15 12:22, Ian Campbell wrote:
> > On Sun, 2015-09-20 at 15:39 -0400, Hans de Goede wrote:
> > > We know when u-boot is written to its own partition, in this case the
> > > layout always is:
> > >
> > > eb 0 spl
> > > eb 1
Hello Jaehoon,
Jaehoon Chung wrote:
> Dear, Tobias.
>
> On 09/21/2015 06:34 PM, Tobias Jakobi wrote:
>> Hello,
>>
>> Jaehoon Chung wrote:
>>> Hi,
>>>
>>> On 09/21/2015 08:18 AM, Tobias Jakobi wrote:
Hello,
currently operation on Exynos4412-based Odroid devices is broken.
Forgot to ask this: What about the first three patches?
- Tobias
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Hello,
Jaehoon Chung wrote:
> Hi,
>
> On 09/21/2015 08:18 AM, Tobias Jakobi wrote:
>> Hello,
>>
>> currently operation on Exynos4412-based Odroid devices is broken.
>>
>> The bootloader stops with this message:
>> Card did not respond to voltage select!
>> *** Warning - MMC init failed, using def
On Mon, Sep 21, 2015 at 04:21:11PM +0530, Mugunthan V N wrote:
> On Monday 07 September 2015 02:22 PM, Mugunthan V N wrote:
> > This patch seires enables cpsw to adopt driver model. This has
> > been tested on AM335x beagle bone black and GP EVM (logs [1]).
> > Also pushed a branch for testing [2]
Hi,
On 21-09-15 12:22, Ian Campbell wrote:
On Sun, 2015-09-20 at 15:39 -0400, Hans de Goede wrote:
We know when u-boot is written to its own partition, in this case the
layout always is:
eb 0 spl
eb 1 spl-backup
eb 2 u-boot
eb 3 u-boot-backup
eb: erase-block
So if we cannot load u-boot from
Hi, Tobias,
On 09/21/2015 08:00 PM, Tobias Jakobi wrote:
> Forgot to ask this: What about the first three patches?
Will check and review them.
Best Regards,
Jaehoon Chung
>
> - Tobias
>
>
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On Monday 07 September 2015 02:22 PM, Mugunthan V N wrote:
> This patch seires enables cpsw to adopt driver model. This has
> been tested on AM335x beagle bone black and GP EVM (logs [1]).
> Also pushed a branch for testing [2]
>
> This patch depends on [3] for getting cpsw address space from DT
>
On Tuesday 15 September 2015 07:41 PM, Mugunthan V N wrote:
> This patch seires enables omap_hsmmc to adopt driver model. This
> has been tested on AM335x beagle bone black and GP EVM (logs [1]).
> Also pushed a branch for testing [2]
>
> [1]: http://pastebin.ubuntu.com/12417667/
> [2]: git://git.
On Sun, 2015-09-20 at 15:39 -0400, Hans de Goede wrote:
> We know when u-boot is written to its own partition, in this case the
> layout always is:
>
> eb 0 spl
> eb 1 spl-backup
> eb 2 u-boot
> eb 3 u-boot-backup
>
> eb: erase-block
>
> So if we cannot load u-boot from its primary offset we kno
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