On 09/17/2015 12:06 AM, Gong Qianyu wrote: > From: Mingkai Hu <mingkai...@freescale.com> > > Freescale LayerScape with Chassis Generation 2 is a set of SoCs with > ARMv8 cores and 2rd generation of Chassis. > > Signed-off-by: Li Yang <le...@freescale.com> > Signed-off-by: Hou Zhiqiang <b48...@freescale.com> > Signed-off-by: Mingkai Hu <mingkai...@freescale.com> > Signed-off-by: Gong Qianyu <qianyu.g...@freescale.com> > --- > V2: > remove FSL_LS102xA_DEVDISR3_PCIE from immap_lsch2.h > > arch/arm/cpu/armv8/Makefile | 1 + > arch/arm/cpu/armv8/fsl-lsch2/Makefile | 12 + > arch/arm/cpu/armv8/fsl-lsch2/README | 10 + > arch/arm/cpu/armv8/fsl-lsch2/cpu.c | 414 ++++++++++++++++++
Too much duplication. Please work with Alison/Prabhakar to move out the common code in cpu.c. York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot