From: Peter Feiner
Adds ramblocks' names to their backing files when using -mem-path. Eases
introspection and debugging.
Signed-off-by: Peter Feiner
---
On Tue, Jan 8, 2013 at 2:04 PM, Anthony Liguori wrote:
>
> Yes, please submit the oneliner.
Here it is :)
The commit should
From: Peter Feiner
Adds ramblocks' names to their backing files when using -mem-path. Eases
introspection and debugging.
Signed-off-by: Peter Feiner
---
The commit should probably be called "exec: add ramblocks' names to -mem-path
files" since the paths aren't deter
no Cc: line for qemu-stable, the
Andreas> released version will keep the thinko. Changing debug output
Andreas> from stdout to stderr would've also been a change of its own
Andreas> that is not even mentioned in the commit message.
Thanks for the comments. Too late for this patch, but will try to do
better next time.
Peter C
>>>>> "Andreas" == Andreas Färber writes:
Andreas> Am 05.08.2013 11:18, schrieb Peter Maydell:
>> On 5 August 2013 02:21, Peter Chubb
>> wrote:
>>> Reads to unassigned memory now return non-zero (since patch
>>> 9b8c69243585). T
From: Peter Feiner
On a slow VM (e.g., nested), you see the "setup" state when you query the
migration status.
Signed-off-by: Peter Feiner
---
qapi-schema.json |2 +-
qmp-commands.hx |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/qapi-schema.j
> "Prashant" == Prashant Vaibhav writes:
Prashant> Sorry I should have been more precise about that. I don't
Prashant> mean a standalone disassembler (objdump should handle that),
Prashant> I meant a simple instruction bundle decoder to decode the op
Prashant> code, arguments, predicate etc.
From: Peter Feiner
Adds control registers that govern virtual address translation to query-cpus.
Given these registers and the guest's physical memory, which can be obtained
with dump-guest-memory, a client can perform virtual-to-physical translations.
This is useful for debuggin
Jean-Christophe wrote:
This is fine by me ...
> * Unify function and type naming
> * use dynamic cast whenever possible
> * simplify Debug printf.
> * use new style device intialization.
>
> Signed-off-by: Jean-Christophe DUBOIS
Reviewed-by: Peter Chubb
Peter C
On 4/16/07, Aurelien Jarno <[EMAIL PROTECTED]> wrote:
Is it possible (even hackish) to ignore openbios an jump directly to the
kernel when using -kernel?
No. The kernel queries the BIOS for "hardware" configuration.
While working on getting SunOS to boot under qemu, I ran into a very
odd bug, and I'm not sure whose fault it is.
The SunOS bootloader tries to install trap 0 by writing to the trap
table. The trap table is in the .text (read-only) section of the
OpenBIOS ROM.
The bug is that the write to the r
whole sparc bios is loaded read/write?
On 2/16/07, Paul Brook <[EMAIL PROTECTED]> wrote:
On Friday 16 February 2007 16:55, Peter wrote:
> While working on getting SunOS to boot under qemu, I ran into a very
> odd bug, and I'm not sure whose fault it is.
>
> The SunOS boot
Where is the policy of silently ignoring ROM writes implemented? It
may not be the proper behavior for sparc, and I'd like to tinker with
it. I'm just not sure where the write is getting suppressed (or,
alternatively, where the exception is getting suppressed).
On 2/16/07, Paul Brook <[EMAIL PR
There are a number of bugs in OpenBIOS, and at least one in qemu.
Your best bet is to check the OpenBIOS mailing list, where I've
discussed a number of the OpenBIOS issues.
On 2/27/07, Markus Schiltknecht <[EMAIL PROTECTED]> wrote:
Hi,
the qemu documentation states about sparc emulation: "... P
hw/sun4m.c, line 154:
m48t59_write(nvram, i++, 0x80); /* Sun4m OBP */
This is not a machine type recognized by SunOS (and probably other
early versions of Solaris). According to idprom.h (some which is
quoted at http://www.sunmanagers.org/archives/1993/0050.html), the
only recognized sun4m I
On 2/27/07, Blue Swirl <[EMAIL PROTECTED]> wrote:
In Linux the IDs are listed in include/asm-sparc/machines.h, there are much
more than just these two.
There are much more than those two in the original file as well.
These are the only two supported by SunOS 4.x (sun4m).
So should this be adde
I've been searching high and low for the "SuperSPARC User's Guide".
At one time it was published as Sun part number 801-4272-01 and TI
part number 2647726-9761. A previous TI version was apparently
published as SPKU005 (and possibly 2647726-9721, although
that could be a typo).
Sun and TI don't
Public bug reported:
We've hit this issue twice so far, but don't have an obvious repro yet.
It's pretty rare for us to hit it but I'm still trying so I can get a
core and backtrace. The guest was Windows running a constant workload.
We were using VirtIO SCSI drivers in both cases.
In both cases
Hi Thomas,
Thanks for looking. We're using version 2.3.0.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1646610
Title:
"Assertion `!r->req.sg' failed." during live migration with VirtIO
Status in
Thanks Thomas. Will do.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1646610
Title:
"Assertion `!r->req.sg' failed." during live migration with VirtIO
Status in QEMU:
Incomplete
Bug descriptio
On 4 August 2012 20:27, Aakanksha Pudipeddi wrote:
> I came across this while working with qemu for a project. It looks like
> there is no support for mrrc/mcrr in qemu which results in the linux
> arch_timer code throwing a reserved instruction exception. Could you please
> let me know if anybody
On 6 August 2012 03:16, Peter A. G. Crosthwaite
wrote:
> Added VMSD stub for SSI slaves. Fields may be added to this VMSD for generic
> SSI slave state (e.g. the CS line state).
This is more me being confused about how this should work than a
review comment, but it seems a bit odd that we
On 6 August 2012 10:13, Peter Maydell wrote:
> On 6 August 2012 03:16, Peter A. G. Crosthwaite
> wrote:
>> Added VMSD stub for SSI slaves. Fields may be added to this VMSD for generic
>> SSI slave state (e.g. the CS line state).
>
> This is more me being confused about h
On 6 August 2012 03:16, Peter A. G. Crosthwaite
wrote:
> Added default CS behaviour for SSI slaves. SSI devices can set a property
> to enable CS behaviour which will create a GPIO on the device which is the
> CS. Tristating of the bus on SSI transfers is implemented.
>
> Signed-
On 6 August 2012 03:16, Peter A. G. Crosthwaite
wrote:
> Slave creation function that can be used to create an SSI slave without
> qdev_init() being called. This give machine models a change to set properties.
Not convinced about this one -- I think that if machine models need to
d
On 6 August 2012 03:16, Peter A. G. Crosthwaite
wrote:
> Allow multiple qdev_init_gpio_in() calls for the one device. The first call
> will
> define GPIOs 0-N-1, the next GPIOs N- ... . Allows different GPIOs to be
> handled
> with different handlers. Needed when two levels o
On 6 August 2012 03:16, Peter A. G. Crosthwaite
wrote:
> To be more consistent with the newer ways of error signalling. That and SIGABT
> is easier to debug with than exit(1).
>
> Signed-off-by: Peter A. G. Crosthwaite
Reviewed-by: Peter Maydell
-- PMM
On 6 August 2012 03:16, Peter A. G. Crosthwaite
wrote:
> Added a FIFO API that can be used to create and operate byte FIFOs.
I'm not asking for actual conversions, but it would be nice to see a
list of some devices that could in principle be moved to using this FIFO,
as an indicatio
On 6 August 2012 03:16, Peter A. G. Crosthwaite
wrote:
> Added SPI controller to the reference design, with two n25q128 spi-flashes
> connected.
>
> Signed-off-by: Peter A. G. Crosthwaite
> ---
> hw/petalogix_ml605_mmu.c | 28 +++-
> 1 files c
On 6 August 2012 04:25, Peter A. G. Crosthwaite
wrote:
> +static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
> +{
> +bool page_aligned = false;
> +unsigned int n, begin;
> +const uint16_t block_size = s->blksize & 0x0fff;
> +uint32_t boundary
On 6 August 2012 04:25, Peter A. G. Crosthwaite
wrote:
> +static uint64_t
> +exynos4210_sdhci_readfn(void *opaque, target_phys_addr_t offset, unsigned
> size)
> +{
> +Exynos4SDHCIState *s = (Exynos4SDHCIState *)opaque;
> +uint32_t ret;
> +
> +switch (offs
On 6 August 2012 04:25, Peter A. G. Crosthwaite
wrote:
> From: Igor Mitsyanko
>
> Device model for standard SD Host Controller Interface (SDHCI) compliant with
> version 2.00 of SD association specification.
> +typedef struct ADMADescr {
> +target_phys_addr_t addr;
>
On 6 August 2012 12:28, Igor Mitsyanko wrote:
> On 08/06/2012 02:30 PM, Peter Maydell wrote:
>>> +static void get_adma_description(SDHCIState *s, ADMADescr *dscr)
>>> +{
>>> +uint32_t adma1 = 0;
>>> +uint64_t adma2 = 0;
>>> +targe
Ping? Patchwork url: http://patchwork.ozlabs.org/patch/172731/
-- PMM
On 23 July 2012 19:06, Peter Maydell wrote:
> Fix the SNDCTL_DSP_MAP{IN,OUT}BUF ioctl definitions so that they
> refer to a suitably defined target struct layout rather than hardcoding
> the ioctl number. T
Ping?
Patchwork url: http://patchwork.ozlabs.org/patch/172732/
-- PMM
On 23 July 2012 19:07, Peter Maydell wrote:
> The code to initialise the target_to_host_errno_table[] array was
> accidentally inside the loop through checking and initialising all
> the supported ioctls. This was
Ping? Patchwork URL: http://patchwork.ozlabs.org/patch/172730/
let me know if you want a v2 patch rather than just hand-fixing
the signed-off-by line snafu.
thanks
-- PMM
On 23 July 2012 19:05, Peter Maydell wrote:
> The definitions for the ioctl numbers TARGET_BLKBSZGET and
> TARGET_BLK
On 6 August 2012 08:05, Peter A. G. Crosthwaite
wrote:
> Signed-off-by: Peter A. G. Crosthwaite
> ---
> target-arm/translate.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 29008a4..4
Fix a variety of typos in comments in target-arm files.
Signed-off-by: Peter Maydell
---
Includes all the ones I spotted but not the 'middel' fix which
Peter C has already submitted a patch for, so the two patches
shouldn't conflict.
target-arm/arm-semi.c|2 +-
t
On 6 August 2012 17:33, Peter Maydell wrote:
> Fix a variety of typos in comments in target-arm files.
> -/* Handling addition overflow with 64 bits inputs values is more
> - * tricky than with 32 bits values. */
> +/* Handling addition overflow with 64 bit inputs values is more
Fix a variety of typos in comments in target-arm files.
Signed-off-by: Peter Maydell
---
Changes v1->v2: s/inputs values/input values/
target-arm/arm-semi.c|2 +-
target-arm/cpu.h |2 +-
target-arm/helper.c |6 +++---
target-arm/neon_helper.c |
Move the init of the irqchip_inject_ioctl field of KVMState out of
kvm_irqchip_create() and into kvm_init(), so that kvm_set_irq()
can be used even when no irqchip is created (for architectures
that support async interrupt notification even without an in
kernel irqchip).
Signed-off-by: Peter
On Mon, Aug 6, 2012 at 7:29 PM, Peter Maydell wrote:
> On 6 August 2012 03:16, Peter A. G. Crosthwaite
> wrote:
>> Slave creation function that can be used to create an SSI slave without
>> qdev_init() being called. This give machine models a change to set
>> properties.
On Mon, Aug 6, 2012 at 7:38 PM, Peter Maydell wrote:
> On 6 August 2012 03:16, Peter A. G. Crosthwaite
> wrote:
>> Allow multiple qdev_init_gpio_in() calls for the one device. The first call
>> will
>> define GPIOs 0-N-1, the next GPIOs N- ... . Allows different GPIOs t
On Mon, Aug 6, 2012 at 7:25 PM, Peter Maydell wrote:
> On 6 August 2012 03:16, Peter A. G. Crosthwaite
> wrote:
>> Added default CS behaviour for SSI slaves. SSI devices can set a property
>> to enable CS behaviour which will create a GPIO on the device which is the
>> C
On Mon, Aug 6, 2012 at 7:50 PM, Peter Maydell wrote:
> On 6 August 2012 03:16, Peter A. G. Crosthwaite
> wrote:
>> Added SPI controller to the reference design, with two n25q128 spi-flashes
>> connected.
>>
>> Signed-off-by: Peter A. G. Crosthwaite
>> ---
On Mon, 2012-08-06 at 17:42 +0100, Peter Maydell wrote:
> Fix a variety of typos in comments in target-arm files.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Peter Crosthwaite
> ---
> Changes v1->v2: s/inputs values/input values/
>
> target-arm/arm-semi.c|
On Mon, Aug 6, 2012 at 7:48 PM, Peter Maydell wrote:
> On 6 August 2012 03:16, Peter A. G. Crosthwaite
> wrote:
>> Added a FIFO API that can be used to create and operate byte FIFOs.
>
> I'm not asking for actual conversions, but it would be nice to see a
> list of
pci.h, i2c.h) etc. Unless this is new
established policy, I dont really want to change the current adopted
approach.
Regards,
Peter
>
>
>> +
>> +#endif /* FIFO_H */
>
>
I think we are talking about corner cases here. If there is major
infrastructural developments needed to do this properly (which I think
there might very well be), then can we declare this issue out of scope
of this series and come back to this as an incremental development.
To summarise
On Tue, Aug 7, 2012 at 4:28 PM, Igor Mitsyanko wrote:
> On 08/07/2012 10:10 AM, Peter Crosthwaite wrote:
>>>>
>>>> +
>>>> +extern const VMStateDescription vmstate_fifo8;
>>>> +
>>>> +#define VMSTATE_FIFO8(_field, _state) {
On 7 August 2012 01:12, Peter Crosthwaite
wrote:
> On Mon, Aug 6, 2012 at 7:38 PM, Peter Maydell
> wrote:
>> On 6 August 2012 03:16, Peter A. G. Crosthwaite
>> wrote:
>>> +qemu_irq *all_irqs = g_new(qemu_irq, n + dev->num_gpio_in);
>>> +
On 6 August 2012 19:21, Phil Staub wrote:
> On Tue, Jun 12, 2012 at 10:28:14AM -0400, qemu-devel-requ...@nongnu.org wrote:
>> From: Richard Henderson
>> On 2012-06-07 18:04, Maciej W. Rozycki wrote:
>> > I have verified this change with system emulation running the GDB test
>> > suite for the mi
On 7 August 2012 13:19, Christian Borntraeger wrote:
> +#if defined(TARGET_HAS_USB) && (TARGET_HAS_USB == 1)
> /* init USB devices */
> if (usb_enabled) {
> if (foreach_device_config(DEV_USB, usb_parse) < 0)
> exit(1);
> }
> +#endif
Whether there is USB or not
allows us to remove
some ugly TARGET_I386 ifdefs from target-independent code.
I've also implemented the DUMP_FPU flag for ARM, by reinstating
(somewhat modified) some code which had been #if'd out for years.
There should be no behaviour change for other architectures.
Peter
printouts include FPU register contents and info about
QEMU's condition-code optimisations.
Signed-off-by: Peter Maydell
---
cpu-all.h|3 +++
cpu-exec.c |2 +-
cpus.c |6 +-
exec.c | 12 ++--
moni
s not done by eg the i386 cpu_dump_state().
This display is gated on the CPU_DUMP_FPU flag, as for x86.
Signed-off-by: Peter Maydell
---
target-arm/translate.c | 42 --
1 file changed, 16 insertions(+), 26 deletions(-)
diff --git a/target-arm/translate.c
On 2 August 2012 10:14, Jan Kiszka wrote:
> On 2012-07-26 16:35, Peter Maydell wrote:
>> This patch series removes all uses of kvm_irqchip_in_kernel()
>> from architecture-independent code, by creating a set of more
>> specific functions instead to test for the particular as
On 7 August 2012 20:26, Markus Armbruster wrote:
> qemu-system-arm lm3s811evb
> qemu-system-arm lm3s6965evb
> qemu-system-arm: /work/armbru/qemu/hw/qdev.c:310: qdev_get_gpio_in:
> Assertion `n >= 0 && n < dev->num_gpio_in' failed.
This is fixed by http://patchwork.ozlabs.org/patch/1728
On 7 August 2012 20:55, Markus Armbruster wrote:
> Anthony Liguori writes:
>> Perhaps we could add a QEMUMachine parameter that indicates that the
>> machine doesn't start without special options.
>
> Recommend to make it a string that lists the mandatory options.
How are you going to say "need
ms we work with (Zynq and MB).
Regards,
Peter
On Mon, 2012-08-06 at 13:07 +1000, Peter A. G. Crosthwaite wrote:
> From: Anthony Liguori
>
> The current implementation of Interfaces is poorly designed. Each interface
> that an object implements ends up being an object that
On 8 August 2012 01:00, Anthony Liguori wrote:
>
> They need a per machine hook before and after devices are created. This is
> okay and it turns out it can be handy for other machines too that do
> similiar could not exist outside of a simulator features.
If it's 'before and after device creati
On 8 August 2012 08:50, Markus Armbruster wrote:
> Markus Armbruster writes:
>> The string should be suitable for inserting into -help.
>
> Sufficiently common cases can also be delegated to generic code:
>
> * Maximum number of CPUs
>
> Got that: QEMUMachine member max_cpus, main() enforces it
On 8 August 2012 08:38, 陳韋任 (Wei-Ren Chen) wrote:
> Just for research, we are studying if we can leave the guest page
> table walk to underlying hardware rather than using software emulation
> (like current approach). So, maybe (if *doable*) we can use x86 hardware
> to help us to walk guest (li
On 7 August 2012 15:52, Cornelia Huck wrote:
> +static void sch_handle_clear_func(SubchDev *sch)
> +{
> +struct pmcw *p = &sch->curr_status.pmcw;
> +struct scsw *s = &sch->curr_status.scsw;
> +int path;
> +
> +/* Path management: In our simple css, we always choose the only path. *
On 8 August 2012 10:04, Markus Armbruster wrote:
> Next problem: minimum RAM size.
>
> For instance, -M pc -m X, where X < 32KiB dies "qemu: fatal: Trying to
> execute code outside RAM or ROM at [...] Aborted (core dumped)" with
> TCG, and "KVM internal error. Suberror: 1" with KVM.
>
> Should a m
On 8 August 2012 07:25, Liu Ping Fan wrote:
> +static inline void atomic_sub(int i, Atomic *v)
> +{
> +asm volatile("lock; subl %1,%0"
> + : "+m" (v->counter)
> + : "ir" (i));
> +}
NAK. We don't want random inline assembly implementations of locking
primitives in QEMU,
On 8 August 2012 07:25, Liu Ping Fan wrote:
> From: Liu Ping Fan
>
> lock:
> qemu_device_tree_mutex
Looking at where it's used, this doesn't seem to have anything to do
with device trees (ie dtb, see www.devicetree.org) : poorly named lock?
-- PMM
Ping?
patchwork url: http://patchwork.ozlabs.org/patch/173202/
-- PMM
On 25 July 2012 16:29, Peter Maydell wrote:
> Add asm-generic/kvm_para.h to the set of non-architecture specific
> KVM kernel headers we copy into QEMU. This header may be included
> by an architecture's kvm
On 8 August 2012 14:18, Paolo Bonzini wrote:
> Il 08/08/2012 15:09, Stefan Hajnoczi ha scritto:
>> No need to roll our own or copy the implementation from the kernel.
>
> To some extent we need to because:
>
> 1. GCC atomics look ugly, :) do not provide rmb/wmb, and in some
> versions of GCC mb is
On 31 July 2012 19:18, Igor Mitsyanko wrote:
> On 07/31/2012 06:56 PM, Peter Maydell wrote:
>> On 27 July 2012 20:29, Igor Mitsyanko wrote:
>>>
>>> +VMSTATE_BUFFER_MULTIPLY(wp_groups, SDState, 1, NULL, 0,
>>> wpgrps_size,
>>> +
On 8 August 2012 20:16, Blue Swirl wrote:
> On Wed, Aug 8, 2012 at 8:17 AM, Cornelia Huck
> wrote:
>> On Tue, 7 Aug 2012 21:00:59 +
>> Blue Swirl wrote:
>>> Please use more descriptive names instead of acronyms, for example
>>> SubChStatus.
>>
>> I'd rather leave these at the well-known sc
On 24 June 2012 00:07, Alexander Graf wrote:
> Due to popular demand, we're updating the way we generate the MPIC
> node and interrupt lines based on what the current state of art is.
Any chance of a slightly more detailed commit message?
thanks
-- PMM
On 8 August 2012 23:40, Peter Maydell wrote:
> On 24 June 2012 00:07, Alexander Graf wrote:
>> Due to popular demand, we're updating the way we generate the MPIC
>> node and interrupt lines based on what the current state of art is.
>
> Any chance of a slightly mo
Add support for saving/loading bitmap.h bitmaps in vmstate.
Signed-off-by: Peter Maydell
---
This will be needed for saving/restoring the bitmap in sd.c which
is introduced by Igor's latest patchset; the relevant VMSTATE line is:
VMSTATE_BITMAP(wp_groups, SDState, 1, wpgrps_size),
From: Christoffer Dall
Add basic support for KVM on ARM architecture.
Signed-off-by: Christoffer Dall
[Rusty: updates to use KVM_ARM_VCPU_INIT, KVM_GET/SET_MSRS]
Signed-off-by: Rusty Russell
[PMM: Minor tweaks and code cleanup]
Signed-off-by: Peter Maydell
---
hw/arm_pic.c
Add presave/postload hooks to the ARM GIC common base class.
These will be used by the KVM in-kernel GIC subclass to sync
state between kernel and userspace when migrating.
Signed-off-by: Peter Maydell
---
hw/arm_gic_common.c | 10 ++
hw/arm_gic_internal.h |2 ++
2 files changed
)
* the kernel ABI for sending per-CPU interrupts for VGIC vs non-VGIC
is inconsistent (the former uses a vcpu ioctl, the latter encodes
cpu number in the irq number), and we should standardise on one
approach or the other
Christoffer Dall (1):
ARM: KVM: Add support for KVM on ARM arch
Implement support for using the KVM in-kernel GIC for ARM.
Signed-off-by: Peter Maydell
---
hw/a15mpcore.c | 11 +++-
hw/arm/Makefile.objs |1 +
hw/kvm/arm_gic.c | 153 ++
3 files changed, 164 insertions(+), 1 deletion(-)
create
This commit adds the ARM KVM headers. This is not to go to QEMU
upstream -- the correct path there is that the KVM code will be
committed to a mainline upstream kernel, and then upstream QEMU
can do a bulk header update from the upstream kernel, which will
allow us to drop this temporary commit.
T
Enable KVM on ARM hosts, now that all the necessary components
for it exist.
Signed-off-by: Peter Maydell
---
configure |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index b9a0b27..f7a825a 100755
--- a/configure
+++ b/configure
@@ -3797,7 +3797,7
On 9 August 2012 14:31, Markus Armbruster wrote:
> We create a number of default drives for machines to use: floppy,
> CD-ROM, SD card. Machines can suppress the ones they don't use, but
> few do. Fix that.
For clarity: what are the negative effects that result from
machines not saying no_flopp
On 9 August 2012 15:08, Markus Armbruster wrote:
> Peter Maydell writes:
>> For clarity: what are the negative effects that result from
>> machines not saying no_floppy &c ?
>
> "info block" shows the unused default drives. For instance,
>
> $
On 4 August 2012 18:57, Blue Swirl wrote:
> On Sat, Jul 28, 2012 at 1:48 PM, Peter Maydell
> wrote:
>> On 28 July 2012 13:31, Blue Swirl wrote:
>>> I'm getting this error, probably because now Valgrind support is enabled:
>>> CCcoroutine-ucontext.o
On 9 August 2012 21:01, Phil Staub wrote:
> On 08/09/2012 12:57 PM, Blue Swirl wrote:
>> On Tue, Aug 7, 2012 at 12:10 PM, Peter Maydell
>> wrote:
>>> For this purpose the usual approach is to follow up to the patch
>>> mail saying "Ping" and giving a u
On 9 August 2012 21:31, Blue Swirl wrote:
> Configuring with Clang compiler with -Werror would not work after
> improved checks:
> /tmp/qemu-conf--25992-.c:4:32: error: self-comparison always evaluates
> to true [-Werror,-Wtautological-compare]
> int main(void) { return preadv == preadv; }
> /tmp/
On 9 August 2012 20:25, Eduardo Habkost wrote:
> On Fri, Aug 03, 2012 at 03:42:39PM -0500, Anthony Liguori wrote:
>> Peter Maydell writes:
>> > For command line options which permit '?' meaning 'please list the
>> > permitted values', add support f
On Wed, Aug 8, 2012 at 5:22 PM, Markus Armbruster wrote:
> Peter Maydell writes:
>
>> On 7 August 2012 20:26, Markus Armbruster wrote:
>>> qemu-system-arm lm3s811evb
>>> qemu-system-arm lm3s6965evb
>>> qemu-system-arm: /work/armbru/qemu/hw/qdev
Resend of pull,
Edgars review addressed.
On Fri, Aug 10, 2012 at 12:30 PM, Peter A. G. Crosthwaite
wrote:
> are available in the git repository at:
>
> git://developer.petalogix.com/public/qemu.git ..BRANCH.NOT.VERIFIED..
>
> Anthony Liguori (1):
> qom: Reimplement In
Apoligies,
bad remote, please disregard.
On Fri, Aug 10, 2012 at 12:32 PM, Peter Crosthwaite
wrote:
> Resend of pull,
>
> Edgars review addressed.
>
> On Fri, Aug 10, 2012 at 12:30 PM, Peter A. G. Crosthwaite
> wrote:
>> are available in the git re
On Mon, 2012-08-06 at 10:13 +0100, Peter Maydell wrote:
> On 6 August 2012 03:16, Peter A. G. Crosthwaite
> wrote:
> > Added VMSD stub for SSI slaves. Fields may be added to this VMSD for generic
> > SSI slave state (e.g. the CS line state).
>
> This is more me being
On 10 August 2012 09:48, Andreas Färber wrote:
> Am 09.08.2012 22:36, schrieb Peter Maydell:
>> Maciej submitted some other MIPS patches at about the same time:
>> http://patchwork.ozlabs.org/project/qemu-devel/list/?submitter=4977
>> at least some of which got reviewed by
On 10 August 2012 09:53, Andreas Färber wrote:
> Am 10.08.2012 03:27, schrieb Peter A. G. Crosthwaite:
>> A -kernel argument must be specified for this machine. Gaurd against no
>> -kernel
>
> "Guard"
>
>> argument. Previously gave an unhelpful "ba
On Fri, Aug 10, 2012 at 7:15 PM, Andreas Färber wrote:
> Am 10.08.2012 05:16, schrieb Peter A. G. Crosthwaite:
>> From: Anthony Liguori
>>
>> The current implementation of Interfaces is poorly designed. Each interface
>> that an object implements ends up being an o
Ping!
Any further thoughts here?
There seem to be a few minor correction for PPM, but the sore-thumb
issue is the long/infinite ADMA. Is there an (easy) AIO based solution
to be had or do we need to do some sort of ptimer hack?
Regards,
Peter
On Tue, Aug 7, 2012 at 4:31 PM, Peter Crosthwaite
cumented and not used by libvirt,
simply drop them completely rather than reinstating them
with new style syntax. Instead, we fold the ?model and ?cpuid
output into the output of the plain "-cpu help" output. The
detailed output produced by ?dump is dropped.
Signed-of
Since the only user of the extended cpu_list_id() format
was the x86 ?model/?dump/?cpuid output, we can drop it
completely.
Signed-off-by: Peter Maydell
---
cpus.c|6 ++
linux-user/main.c |6 ++
target-i386/cpu.c |4 ++--
target-i386/cpu.h |4 ++--
4 files
are undocumented and not used by libvirt,
simply drop them completely rather than reinstating them
with new style syntax. Instead, we fold the ?model and ?cpuid
output into the output of the plain "-cpu help" output. The
detailed output produced by ?dump is dropped.
Peter Maydell (2):
targ
On 27 July 2012 20:29, Igor Mitsyanko wrote:
> Igor Mitsyanko (12):
> hw/sd.c: convert wp_groups in SDState to bitfield
> hw/sd.c: make sd_wp_addr() accept 64 bit address argument
> hw/sd.c: introduce wrapper for conversion address to wp group
> hw/sd.c: favour SD card type (SDSC or SDHC)
On 10 August 2012 03:11, Steven wrote:
> The function definition has a return address type tb_page_addr_t.
> tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
>
> I am wondering is this address the guest physical address or the host
> virtual address.
In linux-user mode the
The comment about the return address from get_page_addr_code() was
well out of date as phys_ram_base has not existed for some time.
Signed-off-by: Peter Maydell
---
cputlb.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/cputlb.c b/cputlb.c
index 0d1e252..d3e7b25
Last call for any ARM related patches to go into 1.2. My current
queue looks like this:
59cbd70 hw/sd.c: make sd_wp_addr() return bool
8b4cc14 hw/sd.c: make sd_dataready() return bool
025caa6 hw/sd.c: convert binary variables to bool
38d24e6 hw/sd.c: introduce wrapper for conversion address to wp
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