Public bug reported:
qemu-system-x86_64 -name manjaro -enable-kvm -cpu host -smp
cores=4,threads=1 -M q35 -m 8G -cdrom /mnt/Storage/ISO/manjaro-
gnome-20.0.3-minimal-200606-linux56.iso -machine type=pc,accel=kvm -vga
virtio -display sdl,gl=on Boots properly and has working 3d acceleration
with vir
Public bug reported:
building qemu 2.1.2 on slackware 14.1 with make -j6, libtool gives an
error. this is it, with some context:
LINK tests/qemu-iotests/socket_scm_helper
CPP optionrom/kvmvapic.asm
ASoptionrom/multiboot.o
ASoptionrom/linuxboot.o
lt LINK libcacard.la
ASopt
** Description changed:
building qemu 2.1.2 on slackware 14.1 with make -j6, libtool gives an
error. this is it, with some context:
- LINK tests/qemu-iotests/socket_scm_helper
- CPP optionrom/kvmvapic.asm
- ASoptionrom/multiboot.o
- ASoptionrom/linuxboot.o
+ LINK tests
** Description changed:
building qemu 2.1.2 on slackware 14.1 with make -j6, libtool gives an
error. this is it, with some context:
LINK tests/qemu-iotests/socket_scm_helper
CPP optionrom/kvmvapic.asm
ASoptionrom/multiboot.o
ASoptionrom/linuxboot.o
lt LINK libca
my bad; i missed the initial path element from the prefix.
** Changed in: qemu
Status: New => Invalid
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1384343
Title:
2.1.2 build broken with --
Hi,
On 4/13/25 10:02 PM, Alejandro Jimenez wrote:
> For the specified address range, walk the page table identifying regions
> as mapped or unmapped and invoke registered notifiers with the
> corresponding event type.
>
> Signed-off-by: Alejandro Jimenez
> ---
> hw/i386/amd_iommu.c | 74 +++
Hi,
On 5/2/25 4:15 AM, Alejandro Jimenez wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> Extracting the DTE from a given AMDVIAddressSpace pointer structure is a
> common operation re
Hi,
On 5/21/25 4:49 PM, Alejandro Jimenez wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email comes from a known sender and you know the content is safe.
>
>
> Hi Ethan,
>
> On 5/20/25 6:18 AM, Ethan MILON wrote:
>>
E could not be retrieved, it is not valid, or it is not
> setup
> + * for paging. In either case, ensure that if paging was previously
> in
> + * use then invalidate all existing mappings and then switch to use
> the
> + * no_dma memory region.
> + */
If the
amp; romask) | (val & ~romask)) & ~(val & w1cmask));
}
This corrects the type of oldval to match the return type of ldq_le_p().
Thanks,
Ethan
On 5/29/25 9:30 PM, Alejandro Jimenez wrote:
> Caution: External email. Do not open attachments or click links, unless this
> email c
@@ static void amdvi_set_quad(AMDVIState *s, hwaddr addr,
uint64_t val,
uint64_t romask, uint64_t w1cmask)
{
stq_le_p(&s->mmior[addr], val);
-stq_le_p(&s->romask[addr], romask);
+stq_le_p(&s->romask[addr], romask | w1cmask);
stq_le_p(&s->w1cmask[addr], w1cmask);
}
Thanks,
Ethan
> }
> }
>
> --
> 2.34.1
>
>
pci_bus_num(bus);
> +AMDVIAddressSpace *amdvi_dev_as;
> +amdvi_as_key *key;
>
> -iommu_as = s->address_spaces[bus_num];
> +amdvi_dev_as = amdvi_as_lookup(s, bus, devfn);
>
> /* allocate memory during the first run */
> -if (!iommu_as) {
> -iommu_as =
orq(s, AMDVI_MMIO_STATUS, AMDVI_MMIO_STATUS_COMP_INT);
> +s->evtlog_tail = evtlog_tail_next;
> +amdvi_writeq(s, AMDVI_MMIO_EVENT_TAIL, s->evtlog_tail);
> +
> +amdvi_assign_orq(s, AMDVI_MMIO_STATUS, AMDVI_MMIO_STATUS_EVENT_INT);
> amdvi_generate_msi_interrupt(s
On Wed, Feb 14, 2024 at 11:34:55AM -0300, Daniel Henrique Barboza wrote:
>
>
> On 2/7/24 06:34, Ethan Chen wrote:
> > Support specification Version 1.0.0-draft4 rapid-k model.
> > The specification url:
> > https://github.com/riscv-non-isa/iopmp-spec/blob/main/ri
stall_io_as. The operation of stall_io_as does
nothing but return a stall result to source device. Source device
should retry the transaction if it gets a stall result.
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig |4 +
hw/misc/meson.build
style (Daniel Henrique Barboza)
Thanks,
Ethan Chen
Ethan Chen (3):
hw/core: Add config stream
Add RISC-V IOPMP support
hw/riscv/virt: Add IOPMP support
docs/system/riscv/virt.rst| 12 +
hw/Kconfig|1 +
hw/core/Kconfig
Make other device can use /hw/core/stream.c by select this config.
Reviewed-by: Alistair Francis
Signed-off-by: Ethan Chen
---
hw/Kconfig | 1 +
hw/core/Kconfig | 3 +++
hw/core/meson.build | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/Kconfig b/hw
ce to machine. When iopmp option is "off"
, this option has no effect.
Signed-off-by: Ethan Chen
---
docs/system/riscv/virt.rst | 12
hw/riscv/Kconfig | 1 +
hw/riscv/virt.c| 110 -
include/hw/riscv/virt.h| 8 ++-
4 file
Hi Alistair,
IOPMP can applies all device. In this patch series, PCI devices on the bridge
can connect to IOPMP by pci_setup_iommu(), but other devices need change their
memory access address space from system memory to IOPMP by themself.
Thanks,
Ethan
On Fri, Jun 21, 2024 at 03:54:15PM +1000
On Wed, Jun 26, 2024 at 11:22:46AM +1000, Alistair Francis wrote:
>
> On Mon, Jun 24, 2024 at 11:47 AM Ethan Chen wrote:
> >
> > Hi Alistair,
> >
> > IOPMP can applies all device. In this patch series, PCI devices on the
> > bridge
> > can connec
On Thu, Aug 08, 2024 at 01:56:35PM +1000, Alistair Francis wrote:
> [EXTERNAL MAIL]
>
> On Mon, Jul 15, 2024 at 7:58 PM Ethan Chen via wrote:
> >
> > Support basic functions of IOPMP specification v0.9.1 rapid-k model.
> > The specification url:
> > https://gi
On Thu, Aug 08, 2024 at 02:25:04PM +1000, Alistair Francis wrote:
>
> On Mon, Jul 15, 2024 at 8:15 PM Ethan Chen via wrote:
> >
> > The iopmp_setup_cpu() function configures the RISCV CPU to support IOPMP and
> > specifies the CPU's RRID.
> >
> > Signed
On Thu, Aug 08, 2024 at 01:56:35PM +1000, Alistair Francis wrote:
> [EXTERNAL MAIL]
>
> On Mon, Jul 15, 2024 at 7:58 PM Ethan Chen via wrote:
> >
> > Support basic functions of IOPMP specification v0.9.1 rapid-k model.
> > The specification url:
> > https://gi
On Thu, Aug 08, 2024 at 02:23:56PM +1000, Alistair Francis wrote:
>
> On Mon, Jul 15, 2024 at 8:13 PM Ethan Chen via wrote:
> >
> > To enable system memory transactions through the IOPMP, memory regions must
> > be moved to the IOPMP downstream and then replac
On Thu, Aug 08, 2024 at 02:01:13PM +1000, Alistair Francis wrote:
>
> On Mon, Jul 15, 2024 at 8:15 PM Ethan Chen via wrote:
> >
> > - Add 'iopmp=on' option to enable IOPMP. It adds an iopmp device virt
> > machine
> > to protect all regions of s
On Mon, Aug 12, 2024 at 10:47:33AM +1000, Alistair Francis wrote:
> [EXTERNAL MAIL]
>
> On Fri, Aug 9, 2024 at 8:11 PM Ethan Chen wrote:
> >
> > On Thu, Aug 08, 2024 at 02:23:56PM +1000, Alistair Francis wrote:
> > >
> > > On Mon, Jul 15, 2024
On Mon, Aug 12, 2024 at 10:48:40AM +1000, Alistair Francis wrote:
> [EXTERNAL MAIL]
>
> On Fri, Aug 9, 2024 at 8:14 PM Ethan Chen wrote:
> >
> > On Thu, Aug 08, 2024 at 02:01:13PM +1000, Alistair Francis wrote:
> > >
> > > On Mon, Jul 15, 2024
Hi Dainel,
Sorry for the delayed response. I've been busy over the past two months.
I plan to submit the next version of the patch within two weeks.
Thanks,
Ethan Chen
On Mon, May 27, 2024 at 09:09:49AM -0300, Daniel Henrique Barboza wrote:
> Hi Ethan,
>
>
> Did you send
On Mon, Jan 22, 2024 at 04:01:12PM +1000, Alistair Francis wrote:
> On Thu, Dec 21, 2023 at 4:38 PM Ethan Chen wrote:
> >
> > On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote:
> > > On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via
> > > w
If a requestor device is connected to the IOPMP device, its memory access will
be checked by the IOPMP rule.
- Add 'iopmp=on' option to add an iopmp device and make the Generic PCI Express
Bridge connect to IOPMP.
Signed-off-by: Ethan Chen
---
docs/system/riscv/virt.rst | 6
stall support, transaction information which need requestor device
support.
- Remove iopmp_cascade option for virt machine
- Refine 'addr' range checks switch case (Daniel)
Ethan Chen (2):
hw/misc/riscv_iopmp: Add RISC-V IOPMP device
hw/riscv/virt: Add IOPMP support
docs/sy
success with fabricated
data depending on IOPMP ERR_CFG register value.
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig |3 +
hw/misc/meson.build |1 +
hw/misc/riscv_iopmp.c | 1002 +
hw/misc/trace-events |4 +
include
: Ethan Chen
---
accel/tcg/cputlb.c| 9 +++-
include/exec/memory.h | 30
system/memory.c | 104 ++
3 files changed, 141 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 117b516739..edb3715017
on every access.
Signed-off-by: Ethan Chen
---
accel/tcg/cputlb.c | 17 -
system/physmem.c | 4
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 117b516739..9c0db4d9e2 100644
--- a/accel/tcg/cputlb.c
+++ b/accel
On Wed, Jun 12, 2024 at 01:43:41PM +0100, Peter Maydell wrote:
>
> On Wed, 12 Jun 2024 at 10:02, Ethan Chen via wrote:
> >
> > Allow the memory region to have different behaviors for read and fetch
> > operations.
> >
> > For example RISCV IOPMP will rai
from the access type when creating iotlb? I think the section
might be wrong in this situation.
Thanks,
Ethan
>
>
On Thu, Jun 13, 2024 at 05:26:03PM +0800, LIU Zhiwei wrote:
>
> Hi Ethan,
>
> On 2024/6/12 11:17, Ethan Chen wrote:
> > Support basic functions of IOPMP specification v0.9.1 rapid-k model.
> > The specification url:
> > https://github.com/riscv-non-isa/
On Mon, Jun 17, 2024 at 07:28:33PM +0800, LIU Zhiwei wrote:
>
> On 2024/6/12 11:17, Ethan Chen wrote:
> > Support basic functions of IOPMP specification v0.9.1 rapid-k model.
> > The specification url:
> > https://github.com/riscv-non-isa/iopmp-spec/releases/tag/v0.9.1
>
On Mon, Jun 17, 2024 at 02:09:34PM +0200, Stefan Weil wrote:
> [EXTERNAL MAIL]
>
> Am 12.06.24 um 05:17 schrieb Ethan Chen via:
> > Support basic functions of IOPMP specification v0.9.1 rapid-k model.
> > The specification url:
> > https://github.com/riscv-non-isa/iop
Support specification Version 1.0.0-draft4 rapid-k model.
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig | 3 +
hw/misc/meson.build | 1 +
hw/misc/riscv_iopmp.c | 881 ++
include/hw/misc/riscv_iopmp.h | 322 +
4
functionalities required
by IOPMP, including:
- Support specify source-id (SID)
- Support asynchronous I/O to handle stall transcations
Ethan Chen (6):
exec/memory: Introduce the translate_size function within the IOMMU
class
system/physmem: IOMMU: Invoke the translate_size function if it is
Signed-off-by: Ethan Chen
---
hw/dma/Kconfig | 3 +
hw/dma/atcdmac300.c | 435
hw/dma/meson.build | 1 +
include/hw/dma/atcdmac300.h | 171 ++
4 files changed, 610 insertions(+)
create mode 100644 hw/dma
IOMMU have size information during translation.
Signed-off-by: Ethan Chen
---
include/exec/memory.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 9087d02769..5520b7c8c0 100644
--- a/include/exec/memory.h
+++ b
Signed-off-by: Ethan Chen
---
system/physmem.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/system/physmem.c b/system/physmem.c
index fc2b0fee01..53b6ab735c 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -432,8 +432,13 @@ static MemoryRegionSection
Signed-off-by: Ethan Chen
---
include/exec/memattrs.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index d04170aa27..e27b4fab00 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -64,6 +64,9 @@ typedef struct
- Add 'iopmp=on' option to enable iopmp
- Add 'iopmp_cascade=on' option to enable iopmp cascading.
Signed-off-by: Ethan Chen
---
hw/riscv/Kconfig| 2 ++
hw/riscv/virt.c | 72 +++--
include/hw/riscv/virt.h | 10 +-
On Tue, Nov 21, 2023 at 03:22:18PM +1000, Alistair Francis wrote:
> On Tue, Nov 14, 2023 at 7:48 PM Ethan Chen via wrote:
> >
> > - Add 'iopmp=on' option to enable a iopmp device and a dma device
> > connect to the iopmp device
> > - Add 'iopmp_ca
On Tue, Nov 21, 2023 at 03:28:13PM +1000, Alistair Francis wrote:
> On Tue, Nov 21, 2023 at 3:24 PM Alistair Francis wrote:
> >
> > On Tue, Nov 14, 2023 at 7:49 PM Ethan Chen via
> > wrote:
> > >
> > > Make other device can use /hw/core/stream.c by select
- IOPMP: Refine error message and remove unused variable
- VIRT: Document new options
atcdmac300 is only added when iopmp is enabled
serial setting should not be changed
Ethan Chen (4):
hw/core: Add config stream
Add RISC-V IOPMP support
hw/dma: Add Andes
memory access. IOPMP will do
additional partially hit check with transaction info.
If the source device does not support transaction info. IOPMP will not check
partially hit.
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig | 4 +
hw/misc/meson.build
iothread property to make the device run on
iothread.
To send transaction information to IOPMP streamsink, function
transaction_info_push is called before memory access.
Signed-off-by: Ethan Chen
---
hw/dma/Kconfig | 4 +
hw/dma/atcdmac300.c | 566
Make other device can use /hw/core/stream.c by select this config.
Signed-off-by: Ethan Chen
---
hw/Kconfig | 1 +
hw/core/Kconfig | 3 +++
hw/core/meson.build | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/Kconfig b/hw/Kconfig
index 9ca7b38c31..e4d153dce7
=on' option to add second iopmp device which is cascaded by
first iopmp device to machine. When iopmp option is "off", this option has no
effect.
Signed-off-by: Ethan Chen
---
docs/system/riscv/virt.rst | 11 +++
hw/riscv/Kconfig
Ping.
https://patchew.org/QEMU/20231122053251.440723-1-etha...@andestech.com/
On Wed, Nov 22, 2023 at 01:32:47PM +0800, Ethan Chen wrote:
> This series implements IOPMP specification v1.0.0-draft4 rapid-k model.
> The specification url:
> https://github.com/riscv-non-isa/iopmp-spec/
On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote:
> On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via wrote:
> >
> > This series implements IOPMP specification v1.0.0-draft4 rapid-k model.
> > The specification url:
> > https://github.com/riscv-n
)
Support PCI device
Drop IOPMP device create helper function (Alistair Francis)
- Remove ATCDMAC300 (Alistair Francis)
- VIRT: Make PCIe bridge connect to IOPMP
Modify document for IOPMP options
Add IOPMP fdt
Thanks,
Ethan Chen
Ethan Chen (3):
hw/core: Add config
Make other device can use /hw/core/stream.c by select this config.
Reviewed-by: Alistair Francis
Signed-off-by: Ethan Chen
---
hw/Kconfig | 1 +
hw/core/Kconfig | 3 +++
hw/core/meson.build | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/Kconfig b/hw
stall_io_as. The operation of stall_io_as does
nothing but return a stall result to source device. Source device
should retry the transaction if it gets a stall result.
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig |4 +
hw/misc/meson.build
ce to machine. When iopmp option is "off"
, this option has no effect.
Signed-off-by: Ethan Chen
---
docs/system/riscv/virt.rst | 12
hw/riscv/Kconfig | 1 +
hw/riscv/virt.c| 110 -
include/hw/riscv/virt.h| 8 ++-
4 file
Ping again.
On Tue, Dec 05, 2023 at 03:48:07PM +0800, Ethan Chen wrote:
> Ping.
> https://patchew.org/QEMU/20231122053251.440723-1-etha...@andestech.com/
>
> On Wed, Nov 22, 2023 at 01:32:47PM +0800, Ethan Chen wrote:
> > This series implements IOPMP specification v1.0.0-dr
On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote:
> On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via wrote:
> >
> > This series implements IOPMP specification v1.0.0-draft4 rapid-k model.
> > The specification url:
> > https://github.com/riscv-n
On Mon, Dec 18, 2023 at 02:04:06PM +1000, Alistair Francis wrote:
> On Wed, Nov 22, 2023 at 3:35 PM Ethan Chen via wrote:
> >
> > Support specification Version 1.0.0-draft4 rapid-k model.
> > The specification url:
> > https://github.com/riscv-n
On Mon, Nov 06, 2023 at 10:34:41AM +, Peter Maydell wrote:
> On Mon, 6 Nov 2023 at 01:57, Ethan Chen wrote:
> >
> > On Fri, Nov 03, 2023 at 10:34:28AM +, Peter Maydell wrote:
> > > On Fri, 3 Nov 2023 at 03:29, Ethan Chen wrote:
> > > >
> > &g
On Tue, Nov 07, 2023 at 10:53:40AM +, Peter Maydell wrote:
> On Tue, 7 Nov 2023 at 03:02, Ethan Chen wrote:
> >
> > On Mon, Nov 06, 2023 at 10:34:41AM +, Peter Maydell wrote:
> > > What AXI bus signals? You already get address and size in the
> > > actu
Make other device can use /hw/core/stream.c by select this config.
Signed-off-by: Ethan Chen
---
hw/core/Kconfig | 3 +++
hw/core/meson.build | 1 +
2 files changed, 4 insertions(+)
diff --git a/hw/core/Kconfig b/hw/core/Kconfig
index 9397503656..628dc3d883 100644
--- a/hw/core/Kconfig
- Add 'iopmp=on' option to enable a iopmp device and a dma device
connect to the iopmp device
- Add 'iopmp_cascade=on' option to enable iopmp cascading.
Signed-off-by: Ethan Chen
---
hw/riscv/Kconfig| 2 ++
hw/riscv
: Convert ATCDMAC burst to AXI burst
- ATCDMAC300: Send transaction_info to IOPMP StreamSink
Ethan Chen (4):
hw/core: Add config stream
Add RISC-V IOPMP support
hw/dma: Add Andes ATCDMAC300 support
hw/riscv/virt: Add IOPMP support
hw/core/Kconfig | 3 +
hw/core
Signed-off-by: Ethan Chen
---
hw/dma/Kconfig | 4 +
hw/dma/atcdmac300.c | 566
hw/dma/meson.build | 1 +
include/hw/dma/atcdmac300.h | 180
4 files changed, 751 insertions(+)
create mode 100644 hw/dma/atcdmac300
Support specification Version 1.0.0-draft4 rapid-k model.
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig | 4 +
hw/misc/meson.build | 1 +
hw/misc/riscv_iopmp.c | 967 ++
include/hw/misc
On Tue, Nov 14, 2023 at 02:50:21PM -0300, Daniel Henrique Barboza wrote:
>
>
> On 11/14/23 06:47, Ethan Chen wrote:
> > - Add 'iopmp=on' option to enable a iopmp device and a dma device
> > connect to the iopmp device
> > - Add 'iopmp_ca
On Wed, Oct 25, 2023 at 11:14:42AM -0400, Peter Xu wrote:
> On Wed, Oct 25, 2023 at 01:14:26PM +0800, Ethan Chen wrote:
> > Signed-off-by: Ethan Chen
> > ---
> > system/physmem.c | 9 +++--
> > 1 file changed, 7 insertions(+), 2 deletions(-)
> >
> >
On Wed, Oct 25, 2023 at 04:56:22PM +0200, David Hildenbrand wrote:
> On 25.10.23 07:14, Ethan Chen wrote:
> > IOMMU have size information during translation.
> >
>
> Can you add some more information why we would want this and how the backend
> can do "better&
I found that after add size information it is still not enough for IOPMP to
reject partially hit error. Access is separated in flatview_read_continue and
lost the start address information. I will fix it in next version.
Address start, address end will be added to MemTxAttr, translate_size wil
y is still important.
For example, an entry may mean permission of a device memory region. We do
not want to see one DMA transfer can access mutilple devices, although DMA
have permissions from multiple entries.
Thanks,
Ethan Chen
On Fri, Oct 27, 2023 at 12:13:50PM -0400, Peter Xu wrote:
> Add cc list.
>
> On Fri, Oct 27, 2023 at 12:02:24PM -0400, Peter Xu wrote:
> > On Fri, Oct 27, 2023 at 11:28:36AM +0800, Ethan Chen wrote:
> > > On Thu, Oct 26, 2023 at 10:20:41AM -0400, Peter Xu wrote:
> >
On Mon, Oct 30, 2023 at 11:02:30AM -0400, Peter Xu wrote:
> On Mon, Oct 30, 2023 at 02:00:54PM +0800, Ethan Chen wrote:
> > On Fri, Oct 27, 2023 at 12:13:50PM -0400, Peter Xu wrote:
> > > Add cc list.
> > >
> > > On Fri, Oct 27, 2023 at 12:02:24PM -0400, Pe
- Add 'iopmp=on' option to enable a iopmp device and a dma device
connect to the iopmp device
- Add 'iopmp_cascade=on' option to enable iopmp cascading.
Signed-off-by: Ethan Chen
---
hw/riscv/Kconfig| 2 ++
hw/riscv
Signed-off-by: Ethan Chen
---
hw/dma/Kconfig | 3 +
hw/dma/atcdmac300.c | 460
hw/dma/meson.build | 1 +
include/hw/dma/atcdmac300.h | 171 ++
4 files changed, 635 insertions(+)
create mode 100644 hw/dma
transaction info in attrs_to_index instead of using
translate_size().
- IOPMP: Fix some partially hit transactions are not detected.
- ATCDMAC300: Fix write stall is not resumed correctly.
- ATCDMAC300: Fix some partially hit errors are not detected.
Ethan Chen (4):
exec/memattrs: Add
Support specification Version 1.0.0-draft4 rapid-k model.
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig | 3 +
hw/misc/meson.build | 1 +
hw/misc/riscv_iopmp.c | 902 ++
include/hw/misc/riscv_iopmp.h | 330 +
4
Signed-off-by: Ethan Chen
---
include/exec/memattrs.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index d04170aa27..fc15e5d7d3 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -64,6 +64,12 @@ typedef struct
On Thu, Nov 02, 2023 at 09:49:17AM -0400, Peter Xu wrote:
> On Thu, Nov 02, 2023 at 05:40:12PM +0800, Ethan Chen wrote:
> > Signed-off-by: Ethan Chen
> > ---
> > include/exec/memattrs.h | 6 ++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a
On Thu, Nov 02, 2023 at 01:53:05PM +, Peter Maydell wrote:
> On Thu, 2 Nov 2023 at 13:49, Peter Xu wrote:
> >
> > On Thu, Nov 02, 2023 at 05:40:12PM +0800, Ethan Chen wrote:
> > > Signed-off-by: Ethan Chen
> > > ---
> > > include/exec/mema
On Fri, Nov 03, 2023 at 10:34:28AM +, Peter Maydell wrote:
> On Fri, 3 Nov 2023 at 03:29, Ethan Chen wrote:
> >
> > On Thu, Nov 02, 2023 at 01:53:05PM +, Peter Maydell wrote:
> > > On Thu, 2 Nov 2023 at 13:49, Peter Xu wrote:
> > > >
> > &g
scade option for virt machine
- Refine 'addr' range checks switch case (Daniel)
Ethan Chen (8):
memory: Introduce memory region fetch operation
system/physmem: Support IOMMU granularity smaller than TARGET_PAGE
size
target/riscv: Add support for IOPMP
hw/misc/riscv_iopmp: A
Signed-off-by: Ethan Chen
---
target/riscv/cpu_cfg.h| 2 ++
target/riscv/cpu_helper.c | 18 +++---
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
index fb7eebde52..2946fec20c 100644
--- a/target/riscv/cpu_cfg.h
address space is blocked_ followed by
the lacked permissions.
The operation of a blocked region can trigger an IOPMP interrupt, a bus
error, or it can respond with success and fabricated data, depending on
the value of the IOPMP ERR_CFG register.
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig
same page, ensuring that the IOMMU is
checked on every access.
Signed-off-by: Ethan Chen
---
accel/tcg/cputlb.c | 20
system/physmem.c | 4
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index edb3715017
for fetch operations.
Signed-off-by: Ethan Chen
---
accel/tcg/cputlb.c| 9 +++-
include/exec/memory.h | 30
system/memory.c | 104 ++
system/trace-events | 2 +
4 files changed, 143 insertions(+), 2 deletions(-)
diff --git a
specified memory
regions in system memory with the IOMMU regions of the IOPMP. It also
adds entries to a protection map that records the relationship between
physical address regions and the IOPMP, which is used by the IOPMP DMA
API to send transaction information.
Signed-off-by: Ethan Chen
---
hw/misc
The iopmp_setup_cpu() function configures the RISCV CPU to support IOPMP and
specifies the CPU's RRID.
Signed-off-by: Ethan Chen
---
hw/misc/riscv_iopmp.c | 6 ++
include/hw/misc/riscv_iopmp.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/hw/misc/riscv_iopmp.c b/hw
The iopmp_dma_rw() function performs memory read/write operations to system
memory with support for IOPMP. It sends transaction information to the IOPMP
for partial hit detection.
Signed-off-by: Ethan Chen
---
hw/misc/riscv_iopmp.c | 68 +++
include/hw
- Add 'iopmp=on' option to enable IOPMP. It adds an iopmp device virt machine
to protect all regions of system memory, and configures RRID of CPU.
Signed-off-by: Ethan Chen
---
docs/system/riscv/virt.rst | 5 +++
hw/riscv/Kconfig | 1 +
hw/riscv/virt.c
On Tue, Nov 05, 2024 at 03:36:07PM -0300, Daniel Henrique Barboza wrote:
> [EXTERNAL MAIL]
>
> Hi Ethan,
>
>
> Do you plan to send a new version of this work? It seems to me that we're
> a couple of reviews away from getting it merged.
>
Hi Daniel,
Thanks for c
same page, ensuring that the IOMMU is
checked on every access.
Signed-off-by: Ethan Chen
Acked-by: Alistair Francis
---
accel/tcg/cputlb.c | 20
system/physmem.c | 4
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
Make other device can use /hw/core/stream.c by select this config.
Reviewed-by: Alistair Francis
Signed-off-by: Ethan Chen
---
hw/Kconfig | 1 +
hw/core/Kconfig | 3 +++
hw/core/meson.build | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/Kconfig b/hw
for fetch operations.
Signed-off-by: Ethan Chen
---
accel/tcg/cputlb.c| 9 +++-
include/exec/memory.h | 27 +++
system/memory.c | 104 ++
system/trace-events | 2 +
4 files changed, 140 insertions(+), 2 deletions(-)
diff --git a
Signed-off-by: Ethan Chen
Reviewed-by: Alistair Francis
---
target/riscv/cpu.c| 3 +++
target/riscv/cpu_cfg.h| 2 ++
target/riscv/cpu_helper.c | 18 +++---
3 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index
emove iopmp_cascade option for virt machine
- Refine 'addr' range checks switch case (Daniel)
Ethan Chen (8):
hw/core: Add config stream
memory: Introduce memory region fetch operation
system/physmem: Support IOMMU granularity smaller than TARGET_PAGE
size
target/riscv: Add su
ess)
* err_msiaddrh: 0x0 (high-part 32-bit address)
* msi_rrid: 0
(Range: 0-65535. Specifies the rrid used by the IOPMP to send the MSI.)
Signed-off-by: Ethan Chen
---
hw/misc/Kconfig |4 +
hw/misc/meson.build |1 +
hw/misc/riscv_iopmp.c | 2
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